diff options
| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/MC/Mips/mips2 | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/MC/Mips/mips2')
| -rw-r--r-- | test/MC/Mips/mips2/invalid-mips3.s | 4 | ||||
| -rw-r--r-- | test/MC/Mips/mips2/invalid-mips32r2.s | 2 | ||||
| -rw-r--r-- | test/MC/Mips/mips2/invalid-mips4-wrong-error.s | 2 | ||||
| -rw-r--r-- | test/MC/Mips/mips2/invalid-mips5-wrong-error.s | 76 | ||||
| -rw-r--r-- | test/MC/Mips/mips2/valid.s | 29 |
5 files changed, 75 insertions, 38 deletions
diff --git a/test/MC/Mips/mips2/invalid-mips3.s b/test/MC/Mips/mips2/invalid-mips3.s index 458c416..e72b228 100644 --- a/test/MC/Mips/mips2/invalid-mips3.s +++ b/test/MC/Mips/mips2/invalid-mips3.s @@ -15,6 +15,8 @@ daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + daddu $24,$2,18079 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + daddu $19,26943 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ddiv $zero,$k0,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ddivu $zero,$s0,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled @@ -40,6 +42,8 @@ dsrlv $s3,$t2,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsub $a3,$s6,$a4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsubu $a1,$a1,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + dsubu $15,$11,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + dsubu $14,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled eret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.l.d $f26,$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.l.s $f12,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips2/invalid-mips32r2.s b/test/MC/Mips/mips2/invalid-mips32r2.s index 72a570a..6dc8159 100644 --- a/test/MC/Mips/mips2/invalid-mips32r2.s +++ b/test/MC/Mips/mips2/invalid-mips32r2.s @@ -13,7 +13,9 @@ cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled eret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ldxc1 $f8,$s7($t7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips2/invalid-mips4-wrong-error.s b/test/MC/Mips/mips2/invalid-mips4-wrong-error.s index 193f6d7..28a98ba 100644 --- a/test/MC/Mips/mips2/invalid-mips4-wrong-error.s +++ b/test/MC/Mips/mips2/invalid-mips4-wrong-error.s @@ -6,6 +6,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction scd $15,-8243($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips2/invalid-mips5-wrong-error.s b/test/MC/Mips/mips2/invalid-mips5-wrong-error.s index 0c58c6c..5eaeaa2 100644 --- a/test/MC/Mips/mips2/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips2/invalid-mips5-wrong-error.s @@ -6,41 +6,41 @@ # RUN: FileCheck %s < %t1 .set noat - abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips2/valid.s b/test/MC/Mips/mips2/valid.s index 9c3706e..34843bc 100644 --- a/test/MC/Mips/mips2/valid.s +++ b/test/MC/Mips/mips2/valid.s @@ -6,21 +6,36 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] + bc1fl 50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,-8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] + bc1tl -8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 c.sf.d $f30,$f0 @@ -113,6 +128,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -123,15 +140,27 @@ swl $15,13694($s3) swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 |