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| author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
| commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
| tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/MC | |
| parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
| download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 | |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/MC')
290 files changed, 18617 insertions, 1655 deletions
diff --git a/test/MC/AArch64/arm64-be-datalayout.s b/test/MC/AArch64/arm64-be-datalayout.s index f448a4b..a5b48f1 100644 --- a/test/MC/AArch64/arm64-be-datalayout.s +++ b/test/MC/AArch64/arm64-be-datalayout.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple arm64_be %s | llvm-readobj -section-data -sections | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple aarch64_be %s | llvm-readobj -section-data -sections | FileCheck %s // CHECK: 0000: 00123456 789ABCDE foo: .xword 0x123456789abcde diff --git a/test/MC/AArch64/arm64-diags.s b/test/MC/AArch64/arm64-diags.s index cf00e98..f8138bd 100644 --- a/test/MC/AArch64/arm64-diags.s +++ b/test/MC/AArch64/arm64-diags.s @@ -159,6 +159,15 @@ ldr q1, [x3, w3, sxtw #1] ldp w1, w2, [x2], #16 ldp w2, w2, [x2], #16 ldp x1, x1, [x2] + ldp s1, s1, [x1], #8 + ldp s1, s1, [x1, #8]! + ldp s1, s1, [x1, #8] + ldp d1, d1, [x1], #16 + ldp d1, d1, [x1, #16]! + ldp d1, d1, [x1, #16] + ldp q1, q1, [x1], #32 + ldp q1, q1, [x1, #32]! + ldp q1, q1, [x1, #32] ldr x2, [x2], #8 ldr x2, [x2, #8]! @@ -185,6 +194,33 @@ ldr q1, [x3, w3, sxtw #1] ; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt ; CHECK-ERRORS: ldp x1, x1, [x2] ; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp s1, s1, [x1], #8 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp s1, s1, [x1, #8]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp s1, s1, [x1, #8] +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp d1, d1, [x1], #16 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp d1, d1, [x1, #16]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp d1, d1, [x1, #16] +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp q1, q1, [x1], #32 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp q1, q1, [x1, #32]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp q1, q1, [x1, #32] +; CHECK-ERRORS: ^ ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source ; CHECK-ERRORS: ldr x2, [x2], #8 ; CHECK-ERRORS: ^ diff --git a/test/MC/AArch64/arm64-system-encoding.s b/test/MC/AArch64/arm64-system-encoding.s index 87f8f8a..eb29117 100644 --- a/test/MC/AArch64/arm64-system-encoding.s +++ b/test/MC/AArch64/arm64-system-encoding.s @@ -135,6 +135,8 @@ foo: msr VTTBR_EL2, x3 msr SPSel, x3 msr S3_2_C11_C6_4, x1 + msr S0_0_C0_C0_0, x0 + msr S1_2_C3_C4_5, x2 ; CHECK: msr ACTLR_EL1, x3 ; encoding: [0x23,0x10,0x18,0xd5] ; CHECK: msr ACTLR_EL2, x3 ; encoding: [0x23,0x10,0x1c,0xd5] ; CHECK: msr ACTLR_EL3, x3 ; encoding: [0x23,0x10,0x1e,0xd5] @@ -213,6 +215,8 @@ foo: ; CHECK: msr VTTBR_EL2, x3 ; encoding: [0x03,0x21,0x1c,0xd5] ; CHECK: msr SPSEL, x3 ; encoding: [0x03,0x42,0x18,0xd5] ; CHECK: msr S3_2_C11_C6_4, x1 ; encoding: [0x81,0xb6,0x1a,0xd5] +; CHECK: msr S0_0_C0_C0_0, x0 ; encoding: [0x00,0x00,0x00,0xd5] +; CHECK: msr S1_2_C3_C4_5, x2 ; encoding: [0xa2,0x34,0x0a,0xd5] mrs x3, ACTLR_EL1 mrs x3, ACTLR_EL2 diff --git a/test/MC/AArch64/basic-a64-diagnostics.s b/test/MC/AArch64/basic-a64-diagnostics.s index 5293131..07e6d01 100644 --- a/test/MC/AArch64/basic-a64-diagnostics.s +++ b/test/MC/AArch64/basic-a64-diagnostics.s @@ -3679,26 +3679,26 @@ // CHECK-ERROR-NEXT: ^ // Now check some invalid generic names - mrs xzr, s2_5_c11_c13_2 mrs x12, s3_8_c11_c13_2 - mrs x13, s3_3_c12_c13_2 mrs x19, s3_2_c15_c16_2 mrs x30, s3_2_c15_c1_8 -// CHECK-ERROR-NEXT: error: expected readable system register -// CHECK-ERROR-NEXT: mrs xzr, s2_5_c11_c13_2 -// CHECK-ERROR-NEXT: ^ + mrs x4, s4_7_c15_c15_7 + mrs x14, s3_7_c16_c15_7 // CHECK-ERROR-NEXT: error: expected readable system register // CHECK-ERROR-NEXT: mrs x12, s3_8_c11_c13_2 // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: expected readable system register -// CHECK-ERROR-NEXT: mrs x13, s3_3_c12_c13_2 -// CHECK-ERROR-NEXT: ^ -// CHECK-ERROR-NEXT: error: expected readable system register // CHECK-ERROR-NEXT: mrs x19, s3_2_c15_c16_2 // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: expected readable system register // CHECK-ERROR-NEXT: mrs x30, s3_2_c15_c1_8 // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: expected readable system register +// CHECK-ERROR-NEXT: mrs x4, s4_7_c15_c15_7 +// CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: expected readable system register +// CHECK-ERROR-NEXT: mrs x14, s3_7_c16_c15_7 +// CHECK-ERROR-NEXT: ^ //------------------------------------------------------------------------------ // Test and branch (immediate) diff --git a/test/MC/AArch64/basic-a64-instructions.s b/test/MC/AArch64/basic-a64-instructions.s index 140ea33..dd8dfd4 100644 --- a/test/MC/AArch64/basic-a64-instructions.s +++ b/test/MC/AArch64/basic-a64-instructions.s @@ -370,23 +370,29 @@ _func: add w11, w13, w15, lsl #0 add w9, w3, wzr, lsl #10 add w17, w29, w20, lsl #31 + add w17, w29, w20, lsl #(31-2) // CHECK: add w11, w13, w15 // encoding: [0xab,0x01,0x0f,0x0b] // CHECK: add w9, w3, wzr, lsl #10 // encoding: [0x69,0x28,0x1f,0x0b] // CHECK: add w17, w29, w20, lsl #31 // encoding: [0xb1,0x7f,0x14,0x0b] +// CHECK: add w17, w29, w20, lsl #29 // encoding: [0xb1,0x77,0x14,0x0b] add w21, w22, w23, lsr #0 add w24, w25, w26, lsr #18 add w27, w28, w29, lsr #31 + add w27, w28, w29, lsr #(31-2) // CHECK: add w21, w22, w23, lsr #0 // encoding: [0xd5,0x02,0x57,0x0b] // CHECK: add w24, w25, w26, lsr #18 // encoding: [0x38,0x4b,0x5a,0x0b] // CHECK: add w27, w28, w29, lsr #31 // encoding: [0x9b,0x7f,0x5d,0x0b] +// CHECK: add w27, w28, w29, lsr #29 // encoding: [0x9b,0x77,0x5d,0x0b] add w2, w3, w4, asr #0 add w5, w6, w7, asr #21 add w8, w9, w10, asr #31 + add w8, w9, w10, asr #(31-2) // CHECK: add w2, w3, w4, asr #0 // encoding: [0x62,0x00,0x84,0x0b] // CHECK: add w5, w6, w7, asr #21 // encoding: [0xc5,0x54,0x87,0x0b] // CHECK: add w8, w9, w10, asr #31 // encoding: [0x28,0x7d,0x8a,0x0b] +// CHECK: add w8, w9, w10, asr #29 // encoding: [0x28,0x75,0x8a,0x0b] add x3, x5, x7 add xzr, x3, x5 @@ -400,23 +406,29 @@ _func: add x11, x13, x15, lsl #0 add x9, x3, xzr, lsl #10 add x17, x29, x20, lsl #63 + add x17, x29, x20, lsl #(63-5) // CHECK: add x11, x13, x15 // encoding: [0xab,0x01,0x0f,0x8b] // CHECK: add x9, x3, xzr, lsl #10 // encoding: [0x69,0x28,0x1f,0x8b] // CHECK: add x17, x29, x20, lsl #63 // encoding: [0xb1,0xff,0x14,0x8b] +// CHECK: add x17, x29, x20, lsl #58 // encoding: [0xb1,0xeb,0x14,0x8b] add x21, x22, x23, lsr #0 add x24, x25, x26, lsr #18 add x27, x28, x29, lsr #63 + add x17, x29, x20, lsr #(63-5) // CHECK: add x21, x22, x23, lsr #0 // encoding: [0xd5,0x02,0x57,0x8b] // CHECK: add x24, x25, x26, lsr #18 // encoding: [0x38,0x4b,0x5a,0x8b] // CHECK: add x27, x28, x29, lsr #63 // encoding: [0x9b,0xff,0x5d,0x8b] +// CHECK: add x17, x29, x20, lsr #58 // encoding: [0xb1,0xeb,0x54,0x8b] add x2, x3, x4, asr #0 add x5, x6, x7, asr #21 add x8, x9, x10, asr #63 + add x17, x29, x20, asr #(63-5) // CHECK: add x2, x3, x4, asr #0 // encoding: [0x62,0x00,0x84,0x8b] // CHECK: add x5, x6, x7, asr #21 // encoding: [0xc5,0x54,0x87,0x8b] // CHECK: add x8, x9, x10, asr #63 // encoding: [0x28,0xfd,0x8a,0x8b] +// CHECK: add x17, x29, x20, asr #58 // encoding: [0xb1,0xeb,0x94,0x8b] adds w3, w5, w7 adds wzr, w3, w5 @@ -4786,12 +4798,16 @@ _func: mrs x12, s3_7_c15_c1_5 mrs x13, s3_2_c11_c15_7 + mrs x14, s1_3_c9_c2_1 msr s3_0_c15_c0_0, x12 msr s3_7_c11_c13_7, x5 + msr s1_3_c9_c2_1, x4 // CHECK: mrs x12, {{s3_7_c15_c1_5|S3_7_C15_C1_5}} // encoding: [0xac,0xf1,0x3f,0xd5] -// CHECK: mrs x13, {{s3_2_c11_c15_7|S3_2_C11_C15_7}} // encoding: [0xed,0xbf,0x3a,0xd5] +// CHECK: mrs x13, {{s3_2_c11_c15_7|S3_2_C11_C15_7}} // encoding: [0xed,0xbf,0x3a,0xd5] +// CHECK: mrs x14, {{s1_3_c9_c2_1|S1_3_C9_C2_1}} // encoding: [0x2e,0x92,0x2b,0xd5] // CHECK: msr {{s3_0_c15_c0_0|S3_0_C15_C0_0}}, x12 // encoding: [0x0c,0xf0,0x18,0xd5] -// CHECK: msr {{s3_7_c11_c13_7|S3_7_C11_C13_7}}, x5 // encoding: [0xe5,0xbd,0x1f,0xd5] +// CHECK: msr {{s3_7_c11_c13_7|S3_7_C11_C13_7}}, x5 // encoding: [0xe5,0xbd,0x1f,0xd5] +// CHECK: msr {{s1_3_c9_c2_1|S1_3_C9_C2_1}}, x4 // encoding: [0x24,0x92,0x0b,0xd5] //------------------------------------------------------------------------------ // Unconditional branch (immediate) diff --git a/test/MC/AArch64/elf_osabi_flags.s b/test/MC/AArch64/elf_osabi_flags.s new file mode 100644 index 0000000..68cb385 --- /dev/null +++ b/test/MC/AArch64/elf_osabi_flags.s @@ -0,0 +1,5 @@ +# RUN: llvm-mc -filetype=obj -triple aarch64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=AARCH64-OSABI %s +# AARCH64-OSABI: OS/ABI: SystemV (0x0) + +# RUN: llvm-mc -filetype=obj -triple aarch64-linux-gnu %s -o -| llvm-readobj -h | FileCheck --check-prefix=AARCH64-LINUX-OSABI %s +# AARCH64-LINUX-OSABI: OS/ABI: GNU/Linux (0x3) diff --git a/test/MC/AArch64/inst-directive-diagnostic.s b/test/MC/AArch64/inst-directive-diagnostic.s new file mode 100644 index 0000000..8abad5e --- /dev/null +++ b/test/MC/AArch64/inst-directive-diagnostic.s @@ -0,0 +1,19 @@ +// RUN: not llvm-mc %s -triple=aarch64-none-linux-gnu -filetype asm -o - 2>&1 \ +// RUN: | FileCheck -check-prefix CHECK-ERROR %s + + .align 2 + .global diagnostics + .type diagnostics,%function +diagnostics: +.Label: + .inst +// CHECK-ERROR: expected expression following directive + + .inst 0x5e104020, +// CHECK-ERROR: expected expression + + .inst .Label +// CHECK-ERROR: expected constant expression + + .inst 0x5e104020 0x5e104020 +// CHECK-ERROR: unexpected token in directive diff --git a/test/MC/AArch64/inst-directive.s b/test/MC/AArch64/inst-directive.s new file mode 100644 index 0000000..6a4b64e --- /dev/null +++ b/test/MC/AArch64/inst-directive.s @@ -0,0 +1,24 @@ +// RUN: llvm-mc %s -triple=aarch64-none-linux-gnu -filetype=asm -o - \ +// RUN: | FileCheck %s --check-prefix=CHECK-ASM +// RUN: llvm-mc %s -triple=aarch64-none-linux-gnu -filetype=obj -o - \ +// RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ + + .section .inst.aarch64_inst + + .align 2 + .global aarch64_inst + .type aarch64_inst,%function +aarch64_inst: + .inst 0x5e104020 + +// CHECK-ASM: .align 2 +// CHECK-ASM: .globl aarch64_inst +// CHECK-ASM: .type aarch64_inst,@function +// CHECK-ASM: aarch64_inst: +// CHECK-ASM: .inst 0x5E104020 + +// CHECK-OBJ: Section { +// CHECK-OBJ: Name: .inst.aarch64_inst +// CHECK-OBJ: SectionData ( +// CHECK-OBJ-NEXT: 0000: 2040105E +// CHECK-OBJ-NEXT: ) diff --git a/test/MC/AArch64/ldr-pseudo-diagnostics.s b/test/MC/AArch64/ldr-pseudo-diagnostics.s new file mode 100644 index 0000000..e32c516 --- /dev/null +++ b/test/MC/AArch64/ldr-pseudo-diagnostics.s @@ -0,0 +1,14 @@ +//RUN: not llvm-mc -triple=aarch64-linux-gnu - < %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s + +// simple test +.section a, "ax", @progbits +f1: + ldr w0, =0x100000001 +// CHECK-ERROR: error: Immediate too large for register +// CHECK-ERROR: ldr w0, =0x100000001 +// CHECK-ERROR: ^ +f2: + ldr w0, =-0x80000001 +// CHECK-ERROR: error: Immediate too large for register +// CHECK-ERROR: ldr w0, =-0x80000001 +// CHECK-ERROR: ^ diff --git a/test/MC/AArch64/ldr-pseudo.s b/test/MC/AArch64/ldr-pseudo.s index 6c82fb9..1bdb5d6 100644 --- a/test/MC/AArch64/ldr-pseudo.s +++ b/test/MC/AArch64/ldr-pseudo.s @@ -23,21 +23,21 @@ f1: .section b,"ax",@progbits // CHECK-LABEL: f3: f3: - ldr x0, =0x10001 -// CHECK: ldr x0, .Ltmp[[TMP0:[0-9]+]] + ldr w0, =0x10001 +// CHECK: ldr w0, .Ltmp[[TMP0:[0-9]+]] // loading multiple constants .section c,"ax",@progbits // CHECK-LABEL: f4: f4: - ldr x0, =0x10002 -// CHECK: ldr x0, .Ltmp[[TMP1:[0-9]+]] + ldr w0, =0x10002 +// CHECK: ldr w0, .Ltmp[[TMP1:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 adds x0, x0, #1 adds x0, x0, #1 - ldr x0, =0x10003 -// CHECK: ldr x0, .Ltmp[[TMP2:[0-9]+]] + ldr w0, =0x10003 +// CHECK: ldr w0, .Ltmp[[TMP2:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 @@ -45,8 +45,8 @@ f4: .section d,"ax",@progbits // CHECK-LABEL: f5: f5: - ldr x0, =0x10004 -// CHECK: ldr x0, .Ltmp[[TMP3:[0-9]+]] + ldr w0, =0x10004 +// CHECK: ldr w0, .Ltmp[[TMP3:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 adds x0, x0, #1 @@ -54,8 +54,8 @@ f5: adds x0, x0, #1 adds x0, x0, #1 adds x0, x0, #1 - ldr x0, =0x10004 -// CHECK: ldr x0, .Ltmp[[TMP4:[0-9]+]] + ldr w0, =0x10004 +// CHECK: ldr w0, .Ltmp[[TMP4:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 adds x0, x0, #1 @@ -67,8 +67,8 @@ f5: .section e,"ax",@progbits // CHECK-LABEL: f6: f6: - ldr x0, =0x10006 -// CHECK: ldr x0, .Ltmp[[TMP5:[0-9]+]] + ldr w0, =0x10006 +// CHECK: ldr w0, .Ltmp[[TMP5:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 adds x0, x0, #1 @@ -84,8 +84,8 @@ f7: // CHECK-LABEL: f8: f8: adds x0, x0, #1 - ldr x0, =0x10007 -// CHECK: ldr x0, .Ltmp[[TMP6:[0-9]+]] + ldr w0, =0x10007 +// CHECK: ldr w0, .Ltmp[[TMP6:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 @@ -97,22 +97,22 @@ f8: .section g,"ax",@progbits // CHECK-LABEL: f9: f9: - ldr x0, =foo -// CHECK: ldr x0, .Ltmp[[TMP7:[0-9]+]] + ldr w0, =foo +// CHECK: ldr w0, .Ltmp[[TMP7:[0-9]+]] // load a symbol from another section .section h,"ax",@progbits // CHECK-LABEL: f10: f10: - ldr x0, =f5 -// CHECK: ldr x0, .Ltmp[[TMP8:[0-9]+]] + ldr w0, =f5 +// CHECK: ldr w0, .Ltmp[[TMP8:[0-9]+]] // load a symbol from the same section .section i,"ax",@progbits // CHECK-LABEL: f11: f11: - ldr x0, =f12 -// CHECK: ldr x0, .Ltmp[[TMP9:[0-9]+]] + ldr w0, =f12 +// CHECK: ldr w0, .Ltmp[[TMP9:[0-9]+]] ldr w0,=0x3C000 // CHECK: ldr w0, .Ltmp[[TMP10:[0-9]+]] @@ -127,12 +127,12 @@ f12: f13: adds x0, x0, #1 adds x0, x0, #1 - ldr x0, =0x101 -// CHECK: movz x0, #0x101 + ldr w0, =0x101 +// CHECK: movz w0, #0x101 adds x0, x0, #1 adds x0, x0, #1 - ldr x0, =bar -// CHECK: ldr x0, .Ltmp[[TMP11:[0-9]+]] + ldr w0, =bar +// CHECK: ldr w0, .Ltmp[[TMP11:[0-9]+]] adds x0, x0, #1 adds x0, x0, #1 // @@ -141,27 +141,70 @@ f13: // usage in macro .macro useit_in_a_macro - ldr x0, =0x10008 - ldr x0, =baz + ldr w0, =0x10008 + ldr w0, =baz .endm .section k,"ax",@progbits // CHECK-LABEL: f14: f14: useit_in_a_macro -// CHECK: ldr x0, .Ltmp[[TMP12:[0-9]+]] -// CHECK: ldr x0, .Ltmp[[TMP13:[0-9]+]] +// CHECK: ldr w0, .Ltmp[[TMP12:[0-9]+]] +// CHECK: ldr w0, .Ltmp[[TMP13:[0-9]+]] // usage with expressions .section l, "ax", @progbits // CHECK-LABEL: f15: f15: - ldr x0, =0x10001+8 -// CHECK: ldr x0, .Ltmp[[TMP14:[0-9]+]] + ldr w0, =0x10001+8 +// CHECK: ldr w0, .Ltmp[[TMP14:[0-9]+]] adds x0, x0, #1 - ldr x0, =bar+4 -// CHECK: ldr x0, .Ltmp[[TMP15:[0-9]+]] + ldr w0, =bar+4 +// CHECK: ldr w0, .Ltmp[[TMP15:[0-9]+]] adds x0, x0, #1 +// usage with 64-bit regs +.section m, "ax", @progbits +// CHECK-LABEL: f16: +f16: + ldr x0, =0x0102030405060708 +// CHECK: ldr x0, .Ltmp[[TMP16:[0-9]+]] + add x0, x0, #1 + ldr w0, =bar +// CHECK: ldr w0, .Ltmp[[TMP17:[0-9]+]] + ldr x0, =bar+16 +// CHECK: ldr x0, .Ltmp[[TMP18:[0-9]+]] + add x0, x0, #1 + ldr x0, =0x100000001 +// CHECK: ldr x0, .Ltmp[[TMP19:[0-9]+]] + ldr x1, =-0x80000001 +// CHECK: ldr x1, .Ltmp[[TMP20:[0-9]+]] + ldr x2, =0x10001 +// CHECK: ldr x2, .Ltmp[[TMP21:[0-9]+]] + +// check range for 32-bit regs +.section n, "ax", @progbits +// CHECK-LABEL: f17: +f17: + ldr w0, =0xFFFFFFFF +// CHECK: ldr w0, .Ltmp[[TMP22:[0-9]+]] + add w0, w0, #1 + ldr w1, =-0x7FFFFFFF +// CHECK: ldr w1, .Ltmp[[TMP23:[0-9]+]] + add w0, w0, #1 + ldr w0, =-1 +// CHECK: ldr w0, .Ltmp[[TMP24:[0-9]+]] + add w0, w0, #1 + +// make sure the same contant uses different pools for 32- and 64-bit registers +.section o, "ax", @progbits +// CHECK-LABEL: f18: +f18: + ldr w0, =0x320064 +// CHECK: ldr w0, .Ltmp[[TMP25:[0-9]+]] + add w0, w0, #1 + ldr x1, =0x320064 +// CHECK: ldr x1, .Ltmp[[TMP26:[0-9]+]] + // // Constant Pools // @@ -174,6 +217,7 @@ f15: // CHECK: .align 2 // CHECK: .Ltmp[[TMP1]] // CHECK: .word 65538 +// CHECK: .align 2 // CHECK: .Ltmp[[TMP2]] // CHECK: .word 65539 @@ -181,6 +225,7 @@ f15: // CHECK: .align 2 // CHECK: .Ltmp[[TMP3]] // CHECK: .word 65540 +// CHECK: .align 2 // CHECK: .Ltmp[[TMP4]] // CHECK: .word 65540 @@ -188,6 +233,7 @@ f15: // CHECK: .align 2 // CHECK: .Ltmp[[TMP5]] // CHECK: .word 65542 +// CHECK: .align 2 // CHECK: .Ltmp[[TMP6]] // CHECK: .word 65543 @@ -208,6 +254,7 @@ f15: // CHECK: .align 2 // CHECK: .Ltmp[[TMP9]] // CHECK: .word f12 +// CHECK: .align 2 // CHECK: .Ltmp[[TMP10]] // CHECK: .word 245760 @@ -220,6 +267,7 @@ f15: // CHECK: .align 2 // CHECK: .Ltmp[[TMP12]] // CHECK: .word 65544 +// CHECK: .align 2 // CHECK: .Ltmp[[TMP13]] // CHECK: .word baz @@ -227,5 +275,45 @@ f15: // CHECK: .align 2 // CHECK: .Ltmp[[TMP14]] // CHECK: .word 65545 +// CHECK: .align 2 // CHECK: .Ltmp[[TMP15]] // CHECK: .word bar+4 + +// CHECK: .section m,"ax",@progbits +// CHECK: .align 3 +// CHECK: .Ltmp[[TMP16]] +// CHECK: .xword 72623859790382856 +// CHECK: .align 2 +// CHECK: .Ltmp[[TMP17]] +// CHECK: .word bar +// CHECK: .align 3 +// CHECK: .Ltmp[[TMP18]] +// CHECK: .xword bar+16 +// CHECK: .align 3 +// CHECK: .Ltmp[[TMP19]] +// CHECK: .xword 4294967297 +// CHECK: .align 3 +// CHECK: .Ltmp[[TMP20]] +// CHECK: .xword -2147483649 +// CHECK: .align 3 +// CHECK: .Ltmp[[TMP21]] +// CHECK: .xword 65537 + +// CHECK: .section n,"ax",@progbits +// CHECK: .align 2 +// CHECK: .Ltmp[[TMP22]] +// CHECK: .word 4294967295 +// CHECK: .align 2 +// CHECK: .Ltmp[[TMP23]] +// CHECK: .word -2147483647 +// CHECK: .align 2 +// CHECK: .Ltmp[[TMP24]] +// CHECK: .word -1 + +// CHECK: .section o,"ax",@progbits +// CHECK: .align 2 +// CHECK: .Ltmp[[TMP25]] +// CHECK: .word 3276900 +// CHECK: .align 3 +// CHECK: .Ltmp[[TMP26]] +// CHECK: .xword 3276900 diff --git a/test/MC/AArch64/single-slash.s b/test/MC/AArch64/single-slash.s new file mode 100644 index 0000000..c4c266c --- /dev/null +++ b/test/MC/AArch64/single-slash.s @@ -0,0 +1,6 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu < %s | FileCheck %s + +// Test that a single slash is not mistaken as the start of comment. + +//CHECK: movz x0, #0x10 + movz x0, #(32 / 2) diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s index a4b6bda..a4c100e 100644 --- a/test/MC/ARM/arm_instructions.s +++ b/test/MC/ARM/arm_instructions.s @@ -1,6 +1,6 @@ @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s \ @ RUN: | FileCheck %s -check-prefix=ALL -@ RUN: llvm-mc -mcpu=cortex-a9-mp -triple armv7-unknown-nacl -show-encoding %s \ +@ RUN: llvm-mc -mcpu=cortex-a9 -triple armv7-unknown-nacl -show-encoding %s \ @ RUN: | FileCheck %s -check-prefix=NACL @ RUN: llvm-mc -mcpu=cortex-a8 -mattr=+nacl-trap -triple armv7 -show-encoding %s \ @ RUN: | FileCheck %s -check-prefix=NACL diff --git a/test/MC/ARM/coff-debugging-secrel.ll b/test/MC/ARM/coff-debugging-secrel.ll index f37b19e..0e5c8e6 100644 --- a/test/MC/ARM/coff-debugging-secrel.ll +++ b/test/MC/ARM/coff-debugging-secrel.ll @@ -17,16 +17,16 @@ entry: !llvm.module.flags = !{!9, !10} !0 = metadata !{i32 1, i32 0, metadata !1, null} -!1 = metadata !{i32 786478, metadata !2, metadata !3, metadata !"function", metadata !"function", metadata !"", i32 1, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, void ()* @function, null, null, metadata !6, i32 1} ; [ DW_TAG_subprogram ], [line 1], [def], [function] +!1 = metadata !{metadata !"0x2e\00function\00function\00\001\000\001\000\006\000\000\001", metadata !2, metadata !3, metadata !4, null, void ()* @function, null, null, metadata !6} ; [ DW_TAG_subprogram ], [line 1], [def], [function] !2 = metadata !{metadata !"/Users/compnerd/work/llvm/test/MC/ARM/reduced.c", metadata !"/Users/compnerd/work/llvm"} -!3 = metadata !{i32 786473, metadata !2} ; [ DW_TAG_file_type] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] -!4 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ], [line 0, size 0, align 0, offset 0] [from ] +!3 = metadata !{metadata !"0x29", metadata !2} ; [ DW_TAG_file_type] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] +!4 = metadata !{metadata !"0x15\00\000\000\000\000\000\000", i32 0, null, null, metadata !5, null, null, null} ; [ DW_TAG_subroutine_type ], [line 0, size 0, align 0, offset 0] [from ] !5 = metadata !{null} !6 = metadata !{} -!7 = metadata !{i32 786449, metadata !2, i32 12, metadata !"clang version 3.5.0", i1 false, metadata !"", i32 0, metadata !6, metadata !6, metadata !8, metadata !6, metadata !6, metadata !"", i32 1} ; [ DW_TAG_compile_unit ] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] [DW_LANG_C99] +!7 = metadata !{metadata !"0x11\0012\00clang version 3.5.0\000\00\000\00\001", metadata !2, metadata !6, metadata !6, metadata !8, metadata !6, metadata !6} ; [ DW_TAG_compile_unit ] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] [DW_LANG_C99] !8 = metadata !{metadata !1} !9 = metadata !{i32 2, metadata !"Dwarf Version", i32 4} -!10 = metadata !{i32 1, metadata !"Debug Info Version", i32 1} +!10 = metadata !{i32 1, metadata !"Debug Info Version", i32 2} ; CHECK-ITANIUM: Relocations [ ; CHECK-ITANIUM: Section {{.*}} .debug_info { @@ -42,8 +42,10 @@ entry: ; CHECK-MSVC: Relocations [ ; CHECK-MSVC: Section {{.*}} .debug$S { -; CHECK-MSVC: 0xC IMAGE_REL_ARM_SECREL function -; CHECK-MSVC: 0x10 IMAGE_REL_ARM_SECTION function +; CHECK-MSVC: 0x2C IMAGE_REL_ARM_SECREL function +; CHECK-MSVC: 0x30 IMAGE_REL_ARM_SECTION function +; CHECK-MSVC: 0x48 IMAGE_REL_ARM_SECREL function +; CHECK-MSVC: 0x4C IMAGE_REL_ARM_SECTION function ; CHECK-MSVC: } ; CHECK-MSVC: ] diff --git a/test/MC/ARM/coff-file.s b/test/MC/ARM/coff-file.s index f0dd29a..d3f26f4 100644 --- a/test/MC/ARM/coff-file.s +++ b/test/MC/ARM/coff-file.s @@ -21,7 +21,7 @@ // CHECK-SCN: Symbols [ // CHECK-SCN: Symbol { // CHECK-SCN: Name: .file -// CHECK-SCN: Section: (65534) +// CHECK-SCN: Section: IMAGE_SYM_DEBUG (-2) // CHECK-SCN: StorageClass: File // CHECK-SCN: AuxFileRecord { // CHECK-SCN: FileName: null-padded.asm @@ -29,7 +29,7 @@ // CHECK-SCN: } // CHECK-SCN: Symbol { // CHECK-SCN: Name: .file -// CHECK-SCN: Section: (65534) +// CHECK-SCN: Section: IMAGE_SYM_DEBUG (-2) // CHECK-SCN: StorageClass: File // CHECK-SCN: AuxFileRecord { // CHECK-SCN: FileName: eighteen-chars.asm @@ -37,7 +37,7 @@ // CHECK-SCN: } // CHECK-SCN: Symbol { // CHECK-SCN: Name: .file -// CHECK-SCN: Section: (65534) +// CHECK-SCN: Section: IMAGE_SYM_DEBUG (-2) // CHECK-SCN: StorageClass: File // CHECK-SCN: AuxFileRecord { // CHECK-SCN: FileName: multiple-auxiliary-entries.asm diff --git a/test/MC/ARM/coproc-diag.s b/test/MC/ARM/coproc-diag.s new file mode 100644 index 0000000..c96f2db --- /dev/null +++ b/test/MC/ARM/coproc-diag.s @@ -0,0 +1,10 @@ +# Special test to make sure we don't error on VFP co-proc access +@ RUN: llvm-mc -triple=armv5 < %s | FileCheck %s +@ RUN: llvm-mc -triple=armv6 < %s | FileCheck %s + + @ p10 and p11 are reserved for NEON, but accessible on v5/v6 + ldc p10, cr0, [r0], {0x20} + ldc2 p11, cr0, [r0], {0x21} + ldcl p11, cr0, [r0], {0x20} + +@ CHECK-NOT: error: invalid operand for instruction diff --git a/test/MC/ARM/cps.s b/test/MC/ARM/cps.s new file mode 100644 index 0000000..a848b22 --- /dev/null +++ b/test/MC/ARM/cps.s @@ -0,0 +1,17 @@ +@ RUN: llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF + + cpsie f + cpsie i, #3 + cps #0 + +@ CHECK: cpsie f @ encoding: [0x61,0xb6] +@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85] +@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81] + +@ UNDEF-DAG: cpsie f @ encoding: [0x61,0xb6] +@ UNDEF-DAG: error: instruction requires: +@ UNDEF-DAG: error: instruction 'cps' requires effect for M-class diff --git a/test/MC/ARM/d16.s b/test/MC/ARM/d16.s new file mode 100644 index 0000000..aa549a3 --- /dev/null +++ b/test/MC/ARM/d16.s @@ -0,0 +1,24 @@ +@ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,-d16 2>&1 | FileCheck %s --check-prefix=D32 +@ RUN: not llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,+d16 2>&1 | FileCheck %s --check-prefix=D16 + +@ D32-NOT: error: + +@ D16: invalid operand for instruction +@ D16-NEXT: vadd.f64 d1, d2, d16 +vadd.f64 d1, d2, d16 + +@ D16: invalid operand for instruction +@ D16-NEXT: vadd.f64 d1, d17, d6 +vadd.f64 d1, d17, d6 + +@ D16: invalid operand for instruction +@ D16-NEXT: vadd.f64 d19, d7, d6 +vadd.f64 d19, d7, d6 + +@ D16: invalid operand for instruction +@ D16-NEXT: vcvt.f64.f32 d22, s4 +vcvt.f64.f32 d22, s4 + +@ D16: invalid operand for instruction +@ D16-NEXT: vcvt.f32.f64 s26, d30 +vcvt.f32.f64 s26, d30 diff --git a/test/MC/ARM/diagnostics.s b/test/MC/ARM/diagnostics.s index 88c5fb5..6b9574b 100644 --- a/test/MC/ARM/diagnostics.s +++ b/test/MC/ARM/diagnostics.s @@ -491,3 +491,133 @@ foo2: @ CHECK-ERRORS: ^ @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16 @ CHECK-ERRORS: ^ + + str r0, [r0, #4]! + str r0, [r0, r1]! + str r0, [r0], #4 + str r0, [r0], r1 + strh r0, [r0, #2]! + strh r0, [r0, r1]! + strh r0, [r0], #2 + strh r0, [r0], r1 + strb r0, [r0, #1]! + strb r0, [r0, r1]! + strb r0, [r0], #1 + strb r0, [r0], r1 +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: str r0, [r0, #4]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: str r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: str r0, [r0], #4 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: str r0, [r0], r1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strh r0, [r0, #2]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strh r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strh r0, [r0], #2 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strh r0, [r0], r1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strb r0, [r0, #1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strb r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strb r0, [r0], #1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: source register and base register can't be identical +@ CHECK-ERRORS: strb r0, [r0], r1 +@ CHECK-ERRORS: ^ + + ldr r0, [r0, #4]! + ldr r0, [r0, r1]! + ldr r0, [r0], #4 + ldr r0, [r0], r1 + ldrh r0, [r0, #2]! + ldrh r0, [r0, r1]! + ldrh r0, [r0], #2 + ldrh r0, [r0], r1 + ldrsh r0, [r0, #2]! + ldrsh r0, [r0, r1]! + ldrsh r0, [r0], #2 + ldrsh r0, [r0], r1 + ldrb r0, [r0, #1]! + ldrb r0, [r0, r1]! + ldrb r0, [r0], #1 + ldrb r0, [r0], r1 + ldrsb r0, [r0, #1]! + ldrsb r0, [r0, r1]! + ldrsb r0, [r0], #1 + ldrsb r0, [r0], r1 +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldr r0, [r0, #4]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldr r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldr r0, [r0], #4 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldr r0, [r0], r1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrh r0, [r0, #2]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrh r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrh r0, [r0], #2 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrh r0, [r0], r1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsh r0, [r0, #2]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsh r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsh r0, [r0], #2 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsh r0, [r0], r1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrb r0, [r0, #1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrb r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrb r0, [r0], #1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrb r0, [r0], r1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsb r0, [r0, #1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsb r0, [r0, r1]! +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsb r0, [r0], #1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: destination register and base register can't be identical +@ CHECK-ERRORS: ldrsb r0, [r0], r1 +@ CHECK-ERRORS: ^ diff --git a/test/MC/ARM/directive-arch_extension-crc.s b/test/MC/ARM/directive-arch_extension-crc.s index 9e4deda..1359b1f 100644 --- a/test/MC/ARM/directive-arch_extension-crc.s +++ b/test/MC/ARM/directive-arch_extension-crc.s @@ -37,21 +37,21 @@ crc: nocrc: crc32b r0, r1, r2 @ CHECK-V7: error: instruction requires: crc armv8 -@ CHECK-V8: error: instruction requires: crc arm-mode +@ CHECK-V8: error: instruction requires: crc crc32h r0, r1, r2 @ CHECK-V7: error: instruction requires: crc armv8 -@ CHECK-V8: error: instruction requires: crc arm-mode +@ CHECK-V8: error: instruction requires: crc crc32w r0, r1, r2 @ CHECK-V7: error: instruction requires: crc armv8 -@ CHECK-V8: error: instruction requires: crc arm-mode +@ CHECK-V8: error: instruction requires: crc crc32cb r0, r1, r2 @ CHECK-V7: error: instruction requires: crc armv8 -@ CHECK-V8: error: instruction requires: crc arm-mode +@ CHECK-V8: error: instruction requires: crc crc32ch r0, r1, r2 @ CHECK-V7: error: instruction requires: crc armv8 -@ CHECK-V8: error: instruction requires: crc arm-mode +@ CHECK-V8: error: instruction requires: crc crc32cw r0, r1, r2 @ CHECK-V7: error: instruction requires: crc armv8 -@ CHECK-V8: error: instruction requires: crc arm-mode +@ CHECK-V8: error: instruction requires: crc diff --git a/test/MC/ARM/directive-arch_extension-fp.s b/test/MC/ARM/directive-arch_extension-fp.s index 0327dd7..f2b4dc2 100644 --- a/test/MC/ARM/directive-arch_extension-fp.s +++ b/test/MC/ARM/directive-arch_extension-fp.s @@ -1,11 +1,11 @@ @ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK @ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK @ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK @ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK .syntax unified @@ -153,192 +153,131 @@ fp: .type nofp,%function nofp: vmrs r0, mvfr2 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vselgt.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vselge.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vseleq.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vselvs.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vmaxnm.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vminnm.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vselgt.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vselge.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vseleq.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vselvs.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vmaxnm.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vminnm.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtb.f64.f16 d0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtb.f16.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtt.f64.f16 d0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtt.f16.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f32 s0, s1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f64 d0, d1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f32 s0, s1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f64 d0, d1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f32 s0, s1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f64 d0, d1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 diff --git a/test/MC/ARM/directive-arch_extension-idiv.s b/test/MC/ARM/directive-arch_extension-idiv.s index c63bbfb..88614ea 100644 --- a/test/MC/ARM/directive-arch_extension-idiv.s +++ b/test/MC/ARM/directive-arch_extension-idiv.s @@ -43,11 +43,11 @@ noidiv: udiv r0, r1, r2 @ CHECK-ARMv6: error: instruction requires: divide in ARM @ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode -@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode +@ CHECK-ARMv7: error: instruction requires: divide in ARM @ CHECK-THUMBv7: error: instruction requires: divide in THUMB sdiv r0, r1, r2 @ CHECK-ARMv6: error: instruction requires: divide in ARM @ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode -@ CHECK-ARMv7: error: instruction requires: divide in ARM arm-mode +@ CHECK-ARMv7: error: instruction requires: divide in ARM @ CHECK-THUMBv7: error: instruction requires: divide in THUMB diff --git a/test/MC/ARM/directive-arch_extension-mode-switch.s b/test/MC/ARM/directive-arch_extension-mode-switch.s new file mode 100644 index 0000000..7e4159f --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-mode-switch.s @@ -0,0 +1,17 @@ +@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null %s 2>&1 | FileCheck %s + +@ Ensure that a mode switch does not revert the architectural features that were +@ alternated explicitly. + + .syntax unified + + .arch_extension noidiv + + .arm + udiv r0, r0, r1 +@ CHECK: instruction requires: divide in ARM + + .thumb + udiv r0, r0, r1 +@ CHECK: instruction requires: divide in THUMB + diff --git a/test/MC/ARM/directive-arch_extension-simd.s b/test/MC/ARM/directive-arch_extension-simd.s index c9dbf21..14359c6 100644 --- a/test/MC/ARM/directive-arch_extension-simd.s +++ b/test/MC/ARM/directive-arch_extension-simd.s @@ -1,11 +1,11 @@ @ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK @ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK @ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V7 +@ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK @ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \ -@ RUN: | FileCheck %s -check-prefix CHECK-V8 +@ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK .syntax unified @@ -125,151 +125,103 @@ simd: .type nosimd,%function nosimd: vmaxnm.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vminnm.f32 s0, s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vmaxnm.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vminnm.f64 d0, d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvta.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtn.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtp.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.s32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.u32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.s32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vcvtm.u32.f64 s0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f32 s0, s1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f64 d0, d1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintz.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f32 s0, s1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f64 d0, d1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintr.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f32 s0, s1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f64 d0, d1 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintx.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrinta.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintn.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintp.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f32.f32 s0, s0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 vrintm.f64.f64 d0, d0 -@ CHECK-V7: error: instruction requires: FPARMv8 -@ CHECK-V8: error: instruction requires: double precision VFP FPARMv8 +@ CHECK: error: instruction requires: FPARMv8 diff --git a/test/MC/ARM/directive-arch_extension-toggle.s b/test/MC/ARM/directive-arch_extension-toggle.s new file mode 100644 index 0000000..c3fb901 --- /dev/null +++ b/test/MC/ARM/directive-arch_extension-toggle.s @@ -0,0 +1,8 @@ +@ RUN: llvm-mc -triple armv7-eabi -mattr hwdiv -filetype asm -o /dev/null %s + + .syntax unified + .thumb + + udiv r0, r1, r2 + .arch_extension idiv + udiv r0, r1, r2 diff --git a/test/MC/ARM/directive-eabi_attribute-2.s b/test/MC/ARM/directive-eabi_attribute-2.s deleted file mode 100644 index 8f00ac8..0000000 --- a/test/MC/ARM/directive-eabi_attribute-2.s +++ /dev/null @@ -1,98 +0,0 @@ -@ RUN: llvm-mc -triple armv7-elf -filetype asm -o - %s | FileCheck %s - - .syntax unified - .thumb - - .eabi_attribute Tag_CPU_raw_name, "Cortex-A9" -@ CHECK: .eabi_attribute 4, "Cortex-A9" - .eabi_attribute Tag_CPU_name, "cortex-a9" -@ CHECK: .cpu cortex-a9 - .eabi_attribute Tag_CPU_arch, 10 -@ CHECK: .eabi_attribute 6, 10 - .eabi_attribute Tag_CPU_arch_profile, 'A' -@ CHECK: .eabi_attribute 7, 65 - .eabi_attribute Tag_ARM_ISA_use, 0 -@ CHECK: .eabi_attribute 8, 0 - .eabi_attribute Tag_THUMB_ISA_use, 2 -@ CHECK: .eabi_attribute 9, 2 - .eabi_attribute Tag_FP_arch, 3 -@ CHECK: .eabi_attribute 10, 3 - .eabi_attribute Tag_WMMX_arch, 0 -@ CHECK: .eabi_attribute 11, 0 - .eabi_attribute Tag_Advanced_SIMD_arch, 1 -@ CHECK: .eabi_attribute 12, 1 - .eabi_attribute Tag_PCS_config, 2 -@ CHECK: .eabi_attribute 13, 2 - .eabi_attribute Tag_ABI_PCS_R9_use, 0 -@ CHECK: .eabi_attribute 14, 0 - .eabi_attribute Tag_ABI_PCS_RW_data, 0 -@ CHECK: .eabi_attribute 15, 0 - .eabi_attribute Tag_ABI_PCS_RO_data, 0 -@ CHECK: .eabi_attribute 16, 0 - .eabi_attribute Tag_ABI_PCS_GOT_use, 0 -@ CHECK: .eabi_attribute 17, 0 - .eabi_attribute Tag_ABI_PCS_wchar_t, 4 -@ CHECK: .eabi_attribute 18, 4 - .eabi_attribute Tag_ABI_FP_rounding, 1 -@ CHECK: .eabi_attribute 19, 1 - .eabi_attribute Tag_ABI_FP_denormal, 2 -@ CHECK: .eabi_attribute 20, 2 - .eabi_attribute Tag_ABI_FP_exceptions, 1 -@ CHECK: .eabi_attribute 21, 1 - .eabi_attribute Tag_ABI_FP_user_exceptions, 1 -@ CHECK: .eabi_attribute 22, 1 - .eabi_attribute Tag_ABI_FP_number_model, 3 -@ CHECK: .eabi_attribute 23, 3 - .eabi_attribute Tag_ABI_align_needed, 1 -@ CHECK: .eabi_attribute 24, 1 - .eabi_attribute Tag_ABI_align_preserved, 2 -@ CHECK: .eabi_attribute 25, 2 - .eabi_attribute Tag_ABI_enum_size, 3 -@ CHECK: .eabi_attribute 26, 3 - .eabi_attribute Tag_ABI_HardFP_use, 0 -@ CHECK: .eabi_attribute 27, 0 - .eabi_attribute Tag_ABI_VFP_args, 1 -@ CHECK: .eabi_attribute 28, 1 - .eabi_attribute Tag_ABI_WMMX_args, 0 -@ CHECK: .eabi_attribute 29, 0 - .eabi_attribute Tag_ABI_FP_optimization_goals, 1 -@ CHECK: .eabi_attribute 31, 1 - .eabi_attribute Tag_compatibility, 1 -@ CHECK: .eabi_attribute 32, 1 - .eabi_attribute Tag_compatibility, 1, "aeabi" -@ CHECK: .eabi_attribute 32, 1, "aeabi" - .eabi_attribute Tag_CPU_unaligned_access, 0 -@ CHECK: .eabi_attribute 34, 0 - .eabi_attribute Tag_FP_HP_extension, 0 -@ CHECK: .eabi_attribute 36, 0 - .eabi_attribute Tag_ABI_FP_16bit_format, 0 -@ CHECK: .eabi_attribute 38, 0 - .eabi_attribute Tag_MPextension_use, 0 -@ CHECK: .eabi_attribute 42, 0 - .eabi_attribute Tag_DIV_use, 0 -@ CHECK: .eabi_attribute 44, 0 - .eabi_attribute Tag_nodefaults, 0 -@ CHECK: .eabi_attribute 64, 0 - .eabi_attribute Tag_also_compatible_with, "gnu" -@ CHECK: .eabi_attribute 65, "gnu" - .eabi_attribute Tag_T2EE_use, 0 -@ CHECK: .eabi_attribute 66, 0 - .eabi_attribute Tag_conformance, "2.09" -@ CHECK: .eabi_attribute 67, "2.09" - .eabi_attribute Tag_Virtualization_use, 0 -@ CHECK: .eabi_attribute 68, 0 - -@ ===--- Compatibility Checks ---=== - - .eabi_attribute Tag_ABI_align8_needed, 1 -@ CHECK: .eabi_attribute 24, 1 - .eabi_attribute Tag_ABI_align8_preserved, 2 -@ CHECK: .eabi_attribute 25, 2 - -@ ===--- GNU AS Compatibility Checks ---=== - - .eabi_attribute 2 * 2 + 1, "cortex-a9" -@ CHECK: .cpu cortex-a9 - .eabi_attribute 2 * 2 + 2, 5 * 2 -@ CHECK: .eabi_attribute 6, 10 - diff --git a/test/MC/ARM/directive-eabi_attribute.s b/test/MC/ARM/directive-eabi_attribute.s index c060b80..e2f1f9b 100644 --- a/test/MC/ARM/directive-eabi_attribute.s +++ b/test/MC/ARM/directive-eabi_attribute.s @@ -1,56 +1,247 @@ +@ RUN: llvm-mc -triple armv7-elf -filetype asm -o - %s | FileCheck %s @ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o - \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s - -@ CHECK: Name: .ARM.attribute -@ CHECK: SectionData ( - -@ <format-version> -@ CHECK: 41 - -@ <section-length> -@ CHECK: 250000 00 - -@ <vendor-name> "aeabi\0" -@ CHECK: 616561 626900 - -@ <file-tag> -@ CHECK: 01 - -@ <size> -@ CHECK: 1B000000 - -@ <attribute>* - - .eabi_attribute 6, 10 -@ CHECK: 060A - - .eabi_attribute 7, 65 -@ CHECK: 0741 - - .eabi_attribute 8, 1 -@ CHECK: 0801 - - .eabi_attribute 9, 2 -@ CHECK: 0902 - - .eabi_attribute 10, 3 -@ CHECK: 0A03 - - .eabi_attribute 12, 1 -@ CHECK: 0C01 - - .eabi_attribute 20, 1 -@ CHECK: 1401 - - .eabi_attribute 21, 1 -@ CHECK: 1501 - - .eabi_attribute 23, 3 -@ CHECK: 1703 - - .eabi_attribute 24, 1 -@ CHECK: 1801 - - .eabi_attribute 25, 1 -@ CHECK: 1901 -@ CHECK: ) +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s --check-prefix=CHECK-OBJ + + .syntax unified + .thumb + + .eabi_attribute Tag_CPU_raw_name, "Cortex-A9" +@ CHECK: .eabi_attribute 4, "Cortex-A9" +@ CHECK-OBJ: Tag: 4 +@ CHECK-OBJ-NEXT: TagName: CPU_raw_name +@ CHECK-OBJ-NEXT: Value: CORTEX-A9 + .eabi_attribute Tag_CPU_name, "cortex-a9" +@ CHECK: .cpu cortex-a9 +@ CHECK-OBJ: Tag: 5 +@ CHECK-OBJ-NEXT: TagName: CPU_name +@ CHECK-OBJ-NEXT: Value: CORTEX-A9 + .eabi_attribute Tag_CPU_arch, 10 +@ CHECK: .eabi_attribute 6, 10 +@ CHECK-OBJ: Tag: 6 +@ CHECK-OBJ-NEXT: Value: 10 +@ CHECK-OBJ-NEXT: TagName: CPU_arch +@ CHECK-OBJ-NEXT: Description: ARM v7 + .eabi_attribute Tag_CPU_arch_profile, 'A' +@ CHECK: .eabi_attribute 7, 65 +@ CHECK-OBJ: Tag: 7 +@ CHECK-OBJ-NEXT: Value: 65 +@ CHECK-OBJ-NEXT: TagName: CPU_arch_profile +@ CHECK-OBJ-NEXT: Description: Application + .eabi_attribute Tag_ARM_ISA_use, 0 +@ CHECK: .eabi_attribute 8, 0 +@ CHECK-OBJ: Tag: 8 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ARM_ISA_use +@ CHECK-OBJ-NEXT: Description: Not Permitted + .eabi_attribute Tag_THUMB_ISA_use, 2 +@ CHECK: .eabi_attribute 9, 2 +@ CHECK-OBJ: Tag: 9 +@ CHECK-OBJ-NEXT: Value: 2 +@ CHECK-OBJ-NEXT: TagName: THUMB_ISA_use +@ CHECK-OBJ-NEXT: Description: Thumb-2 + .eabi_attribute Tag_FP_arch, 3 +@ CHECK: .eabi_attribute 10, 3 +@ CHECK-OBJ: Tag: 10 +@ CHECK-OBJ-NEXT: Value: 3 +@ CHECK-OBJ-NEXT: TagName: FP_arch +@ CHECK-OBJ-NEXT: Description: VFPv3 + .eabi_attribute Tag_WMMX_arch, 0 +@ CHECK: .eabi_attribute 11, 0 +@ CHECK-OBJ: Tag: 11 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: WMMX_arch +@ CHECK-OBJ-NEXT: Description: Not Permitted + .eabi_attribute Tag_Advanced_SIMD_arch, 1 +@ CHECK: .eabi_attribute 12, 1 +@ CHECK-OBJ: Tag: 12 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: Advanced_SIMD_arch +@ CHECK-OBJ-NEXT: Description: NEONv1 + .eabi_attribute Tag_PCS_config, 2 +@ CHECK: .eabi_attribute 13, 2 +@ CHECK-OBJ: Tag: 13 +@ CHECK-OBJ-NEXT: Value: 2 +@ CHECK-OBJ-NEXT: TagName: PCS_config +@ CHECK-OBJ-NEXT: Description: Linux Application + .eabi_attribute Tag_ABI_PCS_R9_use, 0 +@ CHECK: .eabi_attribute 14, 0 +@ CHECK-OBJ: Tag: 14 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_PCS_R9_use +@ CHECK-OBJ-NEXT: Description: v6 + .eabi_attribute Tag_ABI_PCS_RW_data, 0 +@ CHECK: .eabi_attribute 15, 0 +@ CHECK-OBJ: Tag: 15 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_PCS_RW_data +@ CHECK-OBJ-NEXT: Description: Absolute + .eabi_attribute Tag_ABI_PCS_RO_data, 0 +@ CHECK: .eabi_attribute 16, 0 +@ CHECK-OBJ: Tag: 16 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_PCS_RO_data +@ CHECK-OBJ-NEXT: Description: Absolute + .eabi_attribute Tag_ABI_PCS_GOT_use, 0 +@ CHECK: .eabi_attribute 17, 0 +@ CHECK-OBJ: Tag: 17 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_PCS_GOT_use +@ CHECK-OBJ-NEXT: Description: Not Permitted + .eabi_attribute Tag_ABI_PCS_wchar_t, 4 +@ CHECK: .eabi_attribute 18, 4 +@ CHECK-OBJ: Tag: 18 +@ CHECK-OBJ-NEXT: Value: 4 +@ CHECK-OBJ-NEXT: TagName: ABI_PCS_wchar_t +@ CHECK-OBJ-NEXT: Description: 4-byte + .eabi_attribute Tag_ABI_FP_rounding, 1 +@ CHECK: .eabi_attribute 19, 1 +@ CHECK-OBJ: Tag: 19 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_rounding +@ CHECK-OBJ-NEXT: Description: Runtime + .eabi_attribute Tag_ABI_FP_denormal, 2 +@ CHECK: .eabi_attribute 20, 2 +@ CHECK-OBJ: Tag: 20 +@ CHECK-OBJ-NEXT: Value: 2 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_denormal +@ CHECK-OBJ-NEXT: Description: Sign Only + .eabi_attribute Tag_ABI_FP_exceptions, 1 +@ CHECK: .eabi_attribute 21, 1 +@ CHECK-OBJ: Tag: 21 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_exceptions +@ CHECK-OBJ-NEXT: Description: IEEE-754 + .eabi_attribute Tag_ABI_FP_user_exceptions, 1 +@ CHECK: .eabi_attribute 22, 1 +@ CHECK-OBJ: Tag: 22 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_user_exceptions +@ CHECK-OBJ-NEXT: Description: IEEE-754 + .eabi_attribute Tag_ABI_FP_number_model, 3 +@ CHECK: .eabi_attribute 23, 3 +@ CHECK-OBJ: Tag: 23 +@ CHECK-OBJ-NEXT: Value: 3 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_number_model +@ CHECK-OBJ-NEXT: Description: IEEE-754 + .eabi_attribute Tag_ABI_align_needed, 1 +@ CHECK: .eabi_attribute 24, 1 +@ CHECK-OBJ: Tag: 24 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: ABI_align_needed +@ CHECK-OBJ-NEXT: Description: 8-byte alignment + .eabi_attribute Tag_ABI_align_preserved, 2 +@ CHECK: .eabi_attribute 25, 2 +@ CHECK-OBJ: Tag: 25 +@ CHECK-OBJ-NEXT: Value: 2 +@ CHECK-OBJ-NEXT: TagName: ABI_align_preserved +@ CHECK-OBJ-NEXT: Description: 8-byte data and code alignment + .eabi_attribute Tag_ABI_enum_size, 3 +@ CHECK: .eabi_attribute 26, 3 +@ CHECK-OBJ: Tag: 26 +@ CHECK-OBJ-NEXT: Value: 3 +@ CHECK-OBJ-NEXT: TagName: ABI_enum_size +@ CHECK-OBJ-NEXT: Description: External Int32 + .eabi_attribute Tag_ABI_HardFP_use, 0 +@ CHECK: .eabi_attribute 27, 0 +@ CHECK-OBJ: Tag: 27 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_HardFP_use +@ CHECK-OBJ-NEXT: Description: Tag_FP_arch + .eabi_attribute Tag_ABI_VFP_args, 1 +@ CHECK: .eabi_attribute 28, 1 +@ CHECK-OBJ: Tag: 28 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: ABI_VFP_args +@ CHECK-OBJ-NEXT: Description: AAPCS VFP + .eabi_attribute Tag_ABI_WMMX_args, 0 +@ CHECK: .eabi_attribute 29, 0 +@ CHECK-OBJ: Tag: 29 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_WMMX_args +@ CHECK-OBJ-NEXT: Description: AAPCS + .eabi_attribute Tag_ABI_FP_optimization_goals, 1 +@ CHECK: .eabi_attribute 31, 1 +@ CHECK-OBJ: Tag: 31 +@ CHECK-OBJ-NEXT: Value: 1 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_optimization_goals +@ CHECK-OBJ-NEXT: Description: Speed + .eabi_attribute Tag_compatibility, 1 +@ CHECK: .eabi_attribute 32, 1 + .eabi_attribute Tag_compatibility, 1, "aeabi" +@ CHECK: .eabi_attribute 32, 1, "aeabi" +@ CHECK-OBJ: Tag: 32 +@ CHECK-OBJ-NEXT: Value: 1, AEABI +@ CHECK-OBJ-NEXT: TagName: compatibility +@ CHECK-OBJ-NEXT: Description: AEABI Conformant + .eabi_attribute Tag_CPU_unaligned_access, 0 +@ CHECK: .eabi_attribute 34, 0 +@ CHECK-OBJ: Tag: 34 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: CPU_unaligned_access +@ CHECK-OBJ-NEXT: Description: Not Permitted + .eabi_attribute Tag_FP_HP_extension, 0 +@ CHECK: .eabi_attribute 36, 0 +@ CHECK-OBJ: Tag: 36 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: FP_HP_extension +@ CHECK-OBJ-NEXT: Description: If Available + .eabi_attribute Tag_ABI_FP_16bit_format, 0 +@ CHECK: .eabi_attribute 38, 0 +@ CHECK-OBJ: Tag: 38 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: ABI_FP_16bit_format +@ CHECK-OBJ-NEXT: Description: Not Permitte + .eabi_attribute Tag_MPextension_use, 0 +@ CHECK: .eabi_attribute 42, 0 +@ CHECK-OBJ: Tag: 42 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: MPextension_use +@ CHECK-OBJ-NEXT: Description: Not Permitted + .eabi_attribute Tag_DIV_use, 0 +@ CHECK: .eabi_attribute 44, 0 +@ CHECK-OBJ: Tag: 44 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: DIV_use +@ CHECK-OBJ-NEXT: Description: If Available + .eabi_attribute Tag_nodefaults, 0 +@ CHECK: .eabi_attribute 64, 0 +@ CHECK-OBJ: Tag: 64 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: nodefaults +@ CHECK-OBJ-NEXT: Description: Unspecified Tags UNDEFINED + .eabi_attribute Tag_also_compatible_with, "gnu" +@ CHECK: .eabi_attribute 65, "gnu" +@ CHECK-OBJ: Tag: 65 +@ CHECK-OBJ-NEXT: TagName: also_compatible_with +@ CHECK-OBJ-NEXT: Value: GNU + .eabi_attribute Tag_T2EE_use, 0 +@ CHECK: .eabi_attribute 66, 0 +@ CHECK-OBJ: Tag: 66 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: T2EE_use +@ CHECK-OBJ-NEXT: Description: Not Permitted + .eabi_attribute Tag_conformance, "2.09" +@ CHECK: .eabi_attribute 67, "2.09" +@ CHECK-OBJ: Tag: 67 +@ CHECK-OBJ-NEXT: TagName: conformance +@ CHECK-OBJ-NEXT: Value: 2.09 + .eabi_attribute Tag_Virtualization_use, 0 +@ CHECK: .eabi_attribute 68, 0 +@ CHECK-OBJ: Tag: 68 +@ CHECK-OBJ-NEXT: Value: 0 +@ CHECK-OBJ-NEXT: TagName: Virtualization_use +@ CHECK-OBJ-NEXT: Description: Not Permitted + +@ ===--- Compatibility Checks ---=== + + .eabi_attribute Tag_ABI_align8_needed, 1 +@ CHECK: .eabi_attribute 24, 1 + .eabi_attribute Tag_ABI_align8_preserved, 2 +@ CHECK: .eabi_attribute 25, 2 + +@ ===--- GNU AS Compatibility Checks ---=== + + .eabi_attribute 2 * 2 + 1, "cortex-a9" +@ CHECK: .cpu cortex-a9 + .eabi_attribute 2 * 2 + 2, 5 * 2 +@ CHECK: .eabi_attribute 6, 10 diff --git a/test/MC/ARM/directive-fpu-instrs.s b/test/MC/ARM/directive-fpu-instrs.s new file mode 100644 index 0000000..ec97a77 --- /dev/null +++ b/test/MC/ARM/directive-fpu-instrs.s @@ -0,0 +1,16 @@ +// RUN: llvm-mc -triple armv7-unknown-linux-gnueabi -mattr=+vfp3,-neon %s + +.fpu neon +VAND d3, d5, d5 +vldr d21, [r7, #296] + +@ .thumb should not disable the prior .fpu neon +.thumb + +vmov q4, q11 @ v4si +str r6, [r7, #264] +mov r6, r5 +vldr d21, [r7, #296] +add r9, r7, #216 + +fstmfdd sp!, {d8, d9, d10, d11, d12, d13, d14, d15} diff --git a/test/MC/ARM/directive-thumb_func.s b/test/MC/ARM/directive-thumb_func.s new file mode 100644 index 0000000..f82e0d1 --- /dev/null +++ b/test/MC/ARM/directive-thumb_func.s @@ -0,0 +1,22 @@ +@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s -check-prefix CHECK-EABI + +@ NOTE: this test ensures that both forms are accepted for MachO +@ RUN: llvm-mc -triple armv7-darwin -filetype asm -o /dev/null %s + + .syntax unified + + .thumb_func +no_suffix: + bx lr + + .thumb_func suffix +suffix: + bx lr + +// CHECK-EABI: error: unexpected token in directive +// CHECK-EABI: .thumb_func suffix +// CHECK-EABI: ^ + +// CHECK-EABI-NOT: error: invalid instruction + diff --git a/test/MC/ARM/directive-unsupported.s b/test/MC/ARM/directive-unsupported.s new file mode 100644 index 0000000..0b1f9ba --- /dev/null +++ b/test/MC/ARM/directive-unsupported.s @@ -0,0 +1,68 @@ +@ RUN: not llvm-mc -triple thumbv7-windows -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + +@ RUN: not llvm-mc -triple armv7-darwin -filetype asm -o /dev/null %s 2>&1 \ +@ RUN: | FileCheck %s + + .syntax unified + + .arch armv7 + +// CHECK: error: unknown directive +// CHECK: .arch armv7 +// CHECK: ^ + + .cpu cortex-a7 + +// CHECK: error: unknown directive +// CHECK: .cpu cortex-a7 +// CHECK: ^ + + .fpu neon + +// CHECK: error: unknown directive +// CHECK: .fpu neon +// CHECK: ^ + + .eabi_attribute 0, 0 + +// CHECK: error: unknown directive +// CHECK: .eabi_attribute 0, 0 +// CHECK: ^ + + .inst 0xdefe + +// CHECK: error: unknown directive +// CHECK: .inst 0xdefe +// CHECK: ^ + + .inst.n 0xdefe + +// CHECK: error: unknown directive +// CHECK: .inst.n 0xdefe +// CHECK: ^ + + .inst.w 0xdefe + +// CHECK: error: unknown directive +// CHECK: .inst.w 0xdefe +// CHECK: ^ + + .object_arch armv7 + +// CHECK: error: unknown directive +// CHECK: .object_arch armv7 +// CHECK: ^ + + .tlsdescseq undefined + +// CHECK: error: unknown directive +// CHECK: .tlsdescseq undefined +// CHECK: ^ + + .fnstart + +// CHECK: error: unknown directive +// CHECK: .fnstart +// CHECK: ^ + diff --git a/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s b/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s new file mode 100644 index 0000000..5bf8fbd --- /dev/null +++ b/test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s @@ -0,0 +1,66 @@ +// RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -fdebug-compilation-dir=/tmp -dwarf-version 2 2>&1 | FileCheck -check-prefix MESSAGES %s +// RUN: llvm-dwarfdump %t | FileCheck -check-prefix DWARF %s +// RUN: llvm-objdump -r %t | FileCheck -check-prefix RELOC %s + + .section .text, "ax" +a: + mov r0, r0 + + .section foo, "ax" +b: + mov r1, r1 + +// MESSAGES: warning: DWARF2 only supports one section per compilation unit + +// DWARF: .debug_abbrev contents: +// DWARF: Abbrev table for offset: 0x00000000 +// DWARF: [1] DW_TAG_compile_unit DW_CHILDREN_yes +// DWARF: DW_AT_stmt_list DW_FORM_data4 +// DWARF: DW_AT_low_pc DW_FORM_addr +// DWARF: DW_AT_high_pc DW_FORM_addr +// DWARF: DW_AT_name DW_FORM_string +// DWARF: DW_AT_comp_dir DW_FORM_string +// DWARF: DW_AT_producer DW_FORM_string +// DWARF: DW_AT_language DW_FORM_data2 + +// DWARF: .debug_info contents: +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_compile_unit [1] +// CHECK-NOT-DWARF: DW_TAG_ +// DWARF: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) +// DWARF: DW_AT_high_pc [DW_FORM_addr] (0x0000000000000004) + +// DWARF: 0x{{[0-9a-f]+}}: DW_TAG_label [2] * +// DWARF-NEXT: DW_AT_name [DW_FORM_string] ("a") + + +// DWARF: .debug_aranges contents: +// DWARF-NEXT: Address Range Header: length = 0x00000024, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00 +// DWARF-NEXT: [0x00000000 - 0x00000004) +// DWARF-NEXT: [0x00000000 - 0x00000004) + +// DWARF: .debug_line contents: +// DWARF: 0x0000000000000000 7 0 1 0 0 is_stmt +// DWARF-NEXT: 0x0000000000000004 7 0 1 0 0 is_stmt end_sequence +// DWARF: 0x0000000000000000 11 0 1 0 0 is_stmt +// DWARF-NEXT: 0x0000000000000004 11 0 1 0 0 is_stmt end_sequence + + +// DWARF: .debug_ranges contents: +// DWARF-NOT: {{0-9a-f}} +// DWARF: .debug_pubnames contents: + + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_info]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_abbrev +// RELOC-NEXT: 0000000c R_ARM_ABS32 .debug_line +// RELOC-NEXT: R_ARM_ABS32 .text +// RELOC-NEXT: R_ARM_ABS32 .text +// RELOC-NEXT: R_ARM_ABS32 .text +// RELOC-NEXT: R_ARM_ABS32 foo + +// RELOC-NOT: RELOCATION RECORDS FOR [.rel.debug_ranges]: + +// RELOC: RELOCATION RECORDS FOR [.rel.debug_aranges]: +// RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_info +// RELOC-NEXT: 00000010 R_ARM_ABS32 .text +// RELOC-NEXT: 00000018 R_ARM_ABS32 foo diff --git a/test/MC/ARM/dwarf-asm-multiple-sections.s b/test/MC/ARM/dwarf-asm-multiple-sections.s index ed1b89e..0eb8bab 100644 --- a/test/MC/ARM/dwarf-asm-multiple-sections.s +++ b/test/MC/ARM/dwarf-asm-multiple-sections.s @@ -1,7 +1,7 @@ // RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -fdebug-compilation-dir=/tmp // RUN: llvm-dwarfdump %t | FileCheck -check-prefix DWARF %s // RUN: llvm-objdump -r %t | FileCheck -check-prefix RELOC %s -// RUN: not llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 2 2>&1 | FileCheck -check-prefix VERSION %s +// RUN: llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 2 2>&1 | FileCheck -check-prefix VERSION %s // RUN: not llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 1 2>&1 | FileCheck -check-prefix DWARF1 %s // RUN: not llvm-mc < %s -triple=armv7-linux-gnueabi -filetype=obj -o %t -g -dwarf-version 5 2>&1 | FileCheck -check-prefix DWARF5 %s .section .text, "ax" @@ -25,7 +25,7 @@ b: // DWARF: .debug_info contents: // DWARF: 0x{{[0-9a-f]+}}: DW_TAG_compile_unit [1] // CHECK-NOT-DWARF: DW_TAG_ -// DWARF: DW_AT_ranges [DW_FORM_data4] (0x00000000) +// DWARF: DW_AT_ranges [DW_FORM_data4] (0x00000000 // DWARF: 0x{{[0-9a-f]+}}: DW_TAG_label [2] * // DWARF-NEXT: DW_AT_name [DW_FORM_string] ("a") @@ -73,7 +73,7 @@ b: // RELOC-NEXT: 00000018 R_ARM_ABS32 foo -// VERSION: {{.*}} error: DWARF2 only supports one section per compilation unit +// VERSION: {{.*}} warning: DWARF2 only supports one section per compilation unit // DWARF1: Dwarf version 1 is not supported. // DWARF5: Dwarf version 5 is not supported. diff --git a/test/MC/ARM/ldr-pseudo-darwin.s b/test/MC/ARM/ldr-pseudo-darwin.s index a77f6d5..f04f533 100644 --- a/test/MC/ARM/ldr-pseudo-darwin.s +++ b/test/MC/ARM/ldr-pseudo-darwin.s @@ -156,35 +156,38 @@ f15: @ Constant Pools @ @ CHECK: .section __TEXT,b,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp0: @ CHECK: .long 65537 @ CHECK: .end_data_region @ CHECK: .section __TEXT,c,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp1: @ CHECK: .long 65538 +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp2: @ CHECK: .long 65539 @ CHECK: .end_data_region @ CHECK: .section __TEXT,d,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp3: @ CHECK: .long 65540 +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp4: @ CHECK: .long 65540 @ CHECK: .end_data_region @ CHECK: .section __TEXT,e,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp5: @ CHECK: .long 65542 +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp6: @ CHECK: .long 65543 @ CHECK: .end_data_region @@ -193,49 +196,52 @@ f15: @ CHECK-NOT: .section __TEXT,f,regular,pure_instructions @ CHECK: .section __TEXT,g,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp7: @ CHECK: .long foo @ CHECK: .end_data_region @ CHECK: .section __TEXT,h,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp8: @ CHECK: .long f5 @ CHECK: .end_data_region @ CHECK: .section __TEXT,i,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp9: @ CHECK: .long f12 @ CHECK: .end_data_region @ CHECK: .section __TEXT,j,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp10: @ CHECK: .long 257 +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp11: @ CHECK: .long bar @ CHECK: .end_data_region @ CHECK: .section __TEXT,k,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp12: @ CHECK: .long 65544 +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp13: @ CHECK: .long baz @ CHECK: .end_data_region @ CHECK: .section __TEXT,l,regular,pure_instructions -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp14: @ CHECK: .long 65545 +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp15: @ CHECK: .long bar+4 @ CHECK: .end_data_region diff --git a/test/MC/ARM/ltorg-darwin.s b/test/MC/ARM/ltorg-darwin.s index de6b7e9..3402f40 100644 --- a/test/MC/ARM/ltorg-darwin.s +++ b/test/MC/ARM/ltorg-darwin.s @@ -19,8 +19,8 @@ f2: b f3 .ltorg @ constant pool -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp0: @ CHECK: .long 65537 @ CHECK: .end_data_region @@ -41,8 +41,8 @@ f4: b f5 .ltorg @ constant pool -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp1: @ CHECK: .long 65538 @ CHECK: .end_data_region @@ -57,8 +57,8 @@ f5: b f6 .ltorg @ constant pool -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp2: @ CHECK: .long 65539 @ CHECK: .end_data_region @@ -92,8 +92,8 @@ f9: b f10 .ltorg @ constant pool -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp3: @ CHECK: .long bar @ CHECK: .end_data_region @@ -114,8 +114,8 @@ f11: b f12 .ltorg @ constant pool -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp4: @ CHECK: .long 65540 @ CHECK: .end_data_region @@ -141,8 +141,8 @@ f13: @ should have a non-empty constant pool at end of this section @ CHECK: .section __TEXT,e,regular,pure_instructions @ constant pool -@ CHECK: .align 2 @ CHECK: .data_region +@ CHECK: .align 2 @ CHECK-LABEL: Ltmp5: @ CHECK: .long 65541 @ CHECK: .end_data_region diff --git a/test/MC/ARM/move-banked-regs.s b/test/MC/ARM/move-banked-regs.s new file mode 100644 index 0000000..3fac846 --- /dev/null +++ b/test/MC/ARM/move-banked-regs.s @@ -0,0 +1,220 @@ +@ RUN: llvm-mc -triple armv7 -mattr=virtualization -show-encoding %s | FileCheck %s --check-prefix=CHECK-ARM +@ RUN: llvm-mc -triple thumbv7 -mattr=virtualization -show-encoding %s | FileCheck %s --check-prefix=CHECK-THUMB + + mrs r2, r8_usr + mrs r3, r9_usr + mrs r5, r10_usr + mrs r7, r11_usr + mrs r11, r12_usr + mrs r1, sp_usr + mrs r2, lr_usr +@ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x20,0xe1] +@ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x21,0xe1] +@ CHECK-ARM: mrs r5, r10_usr @ encoding: [0x00,0x52,0x22,0xe1] +@ CHECK-ARM: mrs r7, r11_usr @ encoding: [0x00,0x72,0x23,0xe1] +@ CHECK-ARM: mrs r11, r12_usr @ encoding: [0x00,0xb2,0x24,0xe1] +@ CHECK-ARM: mrs r1, sp_usr @ encoding: [0x00,0x12,0x25,0xe1] +@ CHECK-ARM: mrs r2, lr_usr @ encoding: [0x00,0x22,0x26,0xe1] +@ CHECK-THUMB: mrs r2, r8_usr @ encoding: [0xe0,0xf3,0x20,0x82] +@ CHECK-THUMB: mrs r3, r9_usr @ encoding: [0xe1,0xf3,0x20,0x83] +@ CHECK-THUMB: mrs r5, r10_usr @ encoding: [0xe2,0xf3,0x20,0x85] +@ CHECK-THUMB: mrs r7, r11_usr @ encoding: [0xe3,0xf3,0x20,0x87] +@ CHECK-THUMB: mrs r11, r12_usr @ encoding: [0xe4,0xf3,0x20,0x8b] +@ CHECK-THUMB: mrs r1, sp_usr @ encoding: [0xe5,0xf3,0x20,0x81] +@ CHECK-THUMB: mrs r2, lr_usr @ encoding: [0xe6,0xf3,0x20,0x82] + + mrs r2, r8_fiq + mrs r3, r9_fiq + mrs r5, r10_fiq + mrs r7, r11_fiq + mrs r11, r12_fiq + mrs r1, sp_fiq + mrs r2, lr_fiq + mrs r3, spsr_fiq +@ CHECK-ARM: mrs r2, r8_fiq @ encoding: [0x00,0x22,0x28,0xe1] +@ CHECK-ARM: mrs r3, r9_fiq @ encoding: [0x00,0x32,0x29,0xe1] +@ CHECK-ARM: mrs r5, r10_fiq @ encoding: [0x00,0x52,0x2a,0xe1] +@ CHECK-ARM: mrs r7, r11_fiq @ encoding: [0x00,0x72,0x2b,0xe1] +@ CHECK-ARM: mrs r11, r12_fiq @ encoding: [0x00,0xb2,0x2c,0xe1] +@ CHECK-ARM: mrs r1, sp_fiq @ encoding: [0x00,0x12,0x2d,0xe1] +@ CHECK-ARM: mrs r2, lr_fiq @ encoding: [0x00,0x22,0x2e,0xe1] +@ CHECK-ARM: mrs r3, SPSR_fiq @ encoding: [0x00,0x32,0x6e,0xe1] +@ CHECK-THUMB: mrs r2, r8_fiq @ encoding: [0xe8,0xf3,0x20,0x82] +@ CHECK-THUMB: mrs r3, r9_fiq @ encoding: [0xe9,0xf3,0x20,0x83] +@ CHECK-THUMB: mrs r5, r10_fiq @ encoding: [0xea,0xf3,0x20,0x85] +@ CHECK-THUMB: mrs r7, r11_fiq @ encoding: [0xeb,0xf3,0x20,0x87] +@ CHECK-THUMB: mrs r11, r12_fiq @ encoding: [0xec,0xf3,0x20,0x8b] +@ CHECK-THUMB: mrs r1, sp_fiq @ encoding: [0xed,0xf3,0x20,0x81] +@ CHECK-THUMB: mrs r2, lr_fiq @ encoding: [0xee,0xf3,0x20,0x82] +@ CHECK-THUMB: mrs r3, SPSR_fiq @ encoding: [0xfe,0xf3,0x20,0x83] + + mrs r4, lr_irq + mrs r9, sp_irq + mrs r1, spsr_irq +@ CHECK-ARM: mrs r4, lr_irq @ encoding: [0x00,0x43,0x20,0xe1] +@ CHECK-ARM: mrs r9, sp_irq @ encoding: [0x00,0x93,0x21,0xe1] +@ CHECK-ARM: mrs r1, SPSR_irq @ encoding: [0x00,0x13,0x60,0xe1] +@ CHECK-THUMB: mrs r4, lr_irq @ encoding: [0xe0,0xf3,0x30,0x84] +@ CHECK-THUMB: mrs r9, sp_irq @ encoding: [0xe1,0xf3,0x30,0x89] +@ CHECK-THUMB: mrs r1, SPSR_irq @ encoding: [0xf0,0xf3,0x30,0x81] + + mrs r1, lr_svc + mrs r3, sp_svc + mrs r5, spsr_svc +@ CHECK-ARM: mrs r1, lr_svc @ encoding: [0x00,0x13,0x22,0xe1] +@ CHECK-ARM: mrs r3, sp_svc @ encoding: [0x00,0x33,0x23,0xe1] +@ CHECK-ARM: mrs r5, SPSR_svc @ encoding: [0x00,0x53,0x62,0xe1] +@ CHECK-THUMB: mrs r1, lr_svc @ encoding: [0xe2,0xf3,0x30,0x81] +@ CHECK-THUMB: mrs r3, sp_svc @ encoding: [0xe3,0xf3,0x30,0x83] +@ CHECK-THUMB: mrs r5, SPSR_svc @ encoding: [0xf2,0xf3,0x30,0x85] + + mrs r5, lr_abt + mrs r7, sp_abt + mrs r9, spsr_abt +@ CHECK-ARM: mrs r5, lr_abt @ encoding: [0x00,0x53,0x24,0xe1] +@ CHECK-ARM: mrs r7, sp_abt @ encoding: [0x00,0x73,0x25,0xe1] +@ CHECK-ARM: mrs r9, SPSR_abt @ encoding: [0x00,0x93,0x64,0xe1] +@ CHECK-THUMB: mrs r5, lr_abt @ encoding: [0xe4,0xf3,0x30,0x85] +@ CHECK-THUMB: mrs r7, sp_abt @ encoding: [0xe5,0xf3,0x30,0x87] +@ CHECK-THUMB: mrs r9, SPSR_abt @ encoding: [0xf4,0xf3,0x30,0x89] + + mrs r9, lr_und + mrs r11, sp_und + mrs r12, spsr_und +@ CHECK-ARM: mrs r9, lr_und @ encoding: [0x00,0x93,0x26,0xe1] +@ CHECK-ARM: mrs r11, sp_und @ encoding: [0x00,0xb3,0x27,0xe1] +@ CHECK-ARM: mrs r12, SPSR_und @ encoding: [0x00,0xc3,0x66,0xe1] +@ CHECK-THUMB: mrs r9, lr_und @ encoding: [0xe6,0xf3,0x30,0x89] +@ CHECK-THUMB: mrs r11, sp_und @ encoding: [0xe7,0xf3,0x30,0x8b] +@ CHECK-THUMB: mrs r12, SPSR_und @ encoding: [0xf6,0xf3,0x30,0x8c] + + + mrs r2, lr_mon + mrs r4, sp_mon + mrs r6, spsr_mon +@ CHECK-ARM: mrs r2, lr_mon @ encoding: [0x00,0x23,0x2c,0xe1] +@ CHECK-ARM: mrs r4, sp_mon @ encoding: [0x00,0x43,0x2d,0xe1] +@ CHECK-ARM: mrs r6, SPSR_mon @ encoding: [0x00,0x63,0x6c,0xe1] +@ CHECK-THUMB: mrs r2, lr_mon @ encoding: [0xec,0xf3,0x30,0x82] +@ CHECK-THUMB: mrs r4, sp_mon @ encoding: [0xed,0xf3,0x30,0x84] +@ CHECK-THUMB: mrs r6, SPSR_mon @ encoding: [0xfc,0xf3,0x30,0x86] + + + mrs r6, elr_hyp + mrs r8, sp_hyp + mrs r10, spsr_hyp +@ CHECK-ARM: mrs r6, elr_hyp @ encoding: [0x00,0x63,0x2e,0xe1] +@ CHECK-ARM: mrs r8, sp_hyp @ encoding: [0x00,0x83,0x2f,0xe1] +@ CHECK-ARM: mrs r10, SPSR_hyp @ encoding: [0x00,0xa3,0x6e,0xe1] +@ CHECK-THUMB: mrs r6, elr_hyp @ encoding: [0xee,0xf3,0x30,0x86] +@ CHECK-THUMB: mrs r8, sp_hyp @ encoding: [0xef,0xf3,0x30,0x88] +@ CHECK-THUMB: mrs r10, SPSR_hyp @ encoding: [0xfe,0xf3,0x30,0x8a] + + + msr r8_usr, r2 + msr r9_usr, r3 + msr r10_usr, r5 + msr r11_usr, r7 + msr r12_usr, r11 + msr sp_usr, r1 + msr lr_usr, r2 +@ CHECK-ARM: msr r8_usr, r2 @ encoding: [0x02,0xf2,0x20,0xe1] +@ CHECK-ARM: msr r9_usr, r3 @ encoding: [0x03,0xf2,0x21,0xe1] +@ CHECK-ARM: msr r10_usr, r5 @ encoding: [0x05,0xf2,0x22,0xe1] +@ CHECK-ARM: msr r11_usr, r7 @ encoding: [0x07,0xf2,0x23,0xe1] +@ CHECK-ARM: msr r12_usr, r11 @ encoding: [0x0b,0xf2,0x24,0xe1] +@ CHECK-ARM: msr sp_usr, r1 @ encoding: [0x01,0xf2,0x25,0xe1] +@ CHECK-ARM: msr lr_usr, r2 @ encoding: [0x02,0xf2,0x26,0xe1] +@ CHECK-THUMB: msr r8_usr, r2 @ encoding: [0x82,0xf3,0x20,0x80] +@ CHECK-THUMB: msr r9_usr, r3 @ encoding: [0x83,0xf3,0x20,0x81] +@ CHECK-THUMB: msr r10_usr, r5 @ encoding: [0x85,0xf3,0x20,0x82] +@ CHECK-THUMB: msr r11_usr, r7 @ encoding: [0x87,0xf3,0x20,0x83] +@ CHECK-THUMB: msr r12_usr, r11 @ encoding: [0x8b,0xf3,0x20,0x84] +@ CHECK-THUMB: msr sp_usr, r1 @ encoding: [0x81,0xf3,0x20,0x85] +@ CHECK-THUMB: msr lr_usr, r2 @ encoding: [0x82,0xf3,0x20,0x86] + + msr r8_fiq, r2 + msr r9_fiq, r3 + msr r10_fiq, r5 + msr r11_fiq, r7 + msr r12_fiq, r11 + msr sp_fiq, r1 + msr lr_fiq, r2 + msr spsr_fiq, r3 +@ CHECK-ARM: msr r8_fiq, r2 @ encoding: [0x02,0xf2,0x28,0xe1] +@ CHECK-ARM: msr r9_fiq, r3 @ encoding: [0x03,0xf2,0x29,0xe1] +@ CHECK-ARM: msr r10_fiq, r5 @ encoding: [0x05,0xf2,0x2a,0xe1] +@ CHECK-ARM: msr r11_fiq, r7 @ encoding: [0x07,0xf2,0x2b,0xe1] +@ CHECK-ARM: msr r12_fiq, r11 @ encoding: [0x0b,0xf2,0x2c,0xe1] +@ CHECK-ARM: msr sp_fiq, r1 @ encoding: [0x01,0xf2,0x2d,0xe1] +@ CHECK-ARM: msr lr_fiq, r2 @ encoding: [0x02,0xf2,0x2e,0xe1] +@ CHECK-ARM: msr SPSR_fiq, r3 @ encoding: [0x03,0xf2,0x6e,0xe1] +@ CHECK-THUMB: msr r8_fiq, r2 @ encoding: [0x82,0xf3,0x20,0x88] +@ CHECK-THUMB: msr r9_fiq, r3 @ encoding: [0x83,0xf3,0x20,0x89] +@ CHECK-THUMB: msr r10_fiq, r5 @ encoding: [0x85,0xf3,0x20,0x8a] +@ CHECK-THUMB: msr r11_fiq, r7 @ encoding: [0x87,0xf3,0x20,0x8b] +@ CHECK-THUMB: msr r12_fiq, r11 @ encoding: [0x8b,0xf3,0x20,0x8c] +@ CHECK-THUMB: msr sp_fiq, r1 @ encoding: [0x81,0xf3,0x20,0x8d] +@ CHECK-THUMB: msr lr_fiq, r2 @ encoding: [0x82,0xf3,0x20,0x8e] +@ CHECK-THUMB: msr SPSR_fiq, r3 @ encoding: [0x93,0xf3,0x20,0x8e] + + msr lr_irq, r4 + msr sp_irq, r9 + msr spsr_irq, r11 +@ CHECK-ARM: msr lr_irq, r4 @ encoding: [0x04,0xf3,0x20,0xe1] +@ CHECK-ARM: msr sp_irq, r9 @ encoding: [0x09,0xf3,0x21,0xe1] +@ CHECK-ARM: msr SPSR_irq, r11 @ encoding: [0x0b,0xf3,0x60,0xe1] +@ CHECK-THUMB: msr lr_irq, r4 @ encoding: [0x84,0xf3,0x30,0x80] +@ CHECK-THUMB: msr sp_irq, r9 @ encoding: [0x89,0xf3,0x30,0x81] +@ CHECK-THUMB: msr SPSR_irq, r11 @ encoding: [0x9b,0xf3,0x30,0x80] + + msr lr_svc, r1 + msr sp_svc, r3 + msr spsr_svc, r5 +@ CHECK-ARM: msr lr_svc, r1 @ encoding: [0x01,0xf3,0x22,0xe1] +@ CHECK-ARM: msr sp_svc, r3 @ encoding: [0x03,0xf3,0x23,0xe1] +@ CHECK-ARM: msr SPSR_svc, r5 @ encoding: [0x05,0xf3,0x62,0xe1] +@ CHECK-THUMB: msr lr_svc, r1 @ encoding: [0x81,0xf3,0x30,0x82] +@ CHECK-THUMB: msr sp_svc, r3 @ encoding: [0x83,0xf3,0x30,0x83] +@ CHECK-THUMB: msr SPSR_svc, r5 @ encoding: [0x95,0xf3,0x30,0x82] + + msr lr_abt, r5 + msr sp_abt, r7 + msr spsr_abt, r9 +@ CHECK-ARM: msr lr_abt, r5 @ encoding: [0x05,0xf3,0x24,0xe1] +@ CHECK-ARM: msr sp_abt, r7 @ encoding: [0x07,0xf3,0x25,0xe1] +@ CHECK-ARM: msr SPSR_abt, r9 @ encoding: [0x09,0xf3,0x64,0xe1] +@ CHECK-THUMB: msr lr_abt, r5 @ encoding: [0x85,0xf3,0x30,0x84] +@ CHECK-THUMB: msr sp_abt, r7 @ encoding: [0x87,0xf3,0x30,0x85] +@ CHECK-THUMB: msr SPSR_abt, r9 @ encoding: [0x99,0xf3,0x30,0x84] + + msr lr_und, r9 + msr sp_und, r11 + msr spsr_und, r12 +@ CHECK-ARM: msr lr_und, r9 @ encoding: [0x09,0xf3,0x26,0xe1] +@ CHECK-ARM: msr sp_und, r11 @ encoding: [0x0b,0xf3,0x27,0xe1] +@ CHECK-ARM: msr SPSR_und, r12 @ encoding: [0x0c,0xf3,0x66,0xe1] +@ CHECK-THUMB: msr lr_und, r9 @ encoding: [0x89,0xf3,0x30,0x86] +@ CHECK-THUMB: msr sp_und, r11 @ encoding: [0x8b,0xf3,0x30,0x87] +@ CHECK-THUMB: msr SPSR_und, r12 @ encoding: [0x9c,0xf3,0x30,0x86] + + + msr lr_mon, r2 + msr sp_mon, r4 + msr spsr_mon, r6 +@ CHECK-ARM: msr lr_mon, r2 @ encoding: [0x02,0xf3,0x2c,0xe1] +@ CHECK-ARM: msr sp_mon, r4 @ encoding: [0x04,0xf3,0x2d,0xe1] +@ CHECK-ARM: msr SPSR_mon, r6 @ encoding: [0x06,0xf3,0x6c,0xe1] +@ CHECK-THUMB: msr lr_mon, r2 @ encoding: [0x82,0xf3,0x30,0x8c] +@ CHECK-THUMB: msr sp_mon, r4 @ encoding: [0x84,0xf3,0x30,0x8d] +@ CHECK-THUMB: msr SPSR_mon, r6 @ encoding: [0x96,0xf3,0x30,0x8c] + + msr elr_hyp, r6 + msr sp_hyp, r8 + msr spsr_hyp, r10 +@ CHECK-ARM: msr elr_hyp, r6 @ encoding: [0x06,0xf3,0x2e,0xe1] +@ CHECK-ARM: msr sp_hyp, r8 @ encoding: [0x08,0xf3,0x2f,0xe1] +@ CHECK-ARM: msr SPSR_hyp, r10 @ encoding: [0x0a,0xf3,0x6e,0xe1] +@ CHECK-THUMB: msr elr_hyp, r6 @ encoding: [0x86,0xf3,0x30,0x8e] +@ CHECK-THUMB: msr sp_hyp, r8 @ encoding: [0x88,0xf3,0x30,0x8f] +@ CHECK-THUMB: msr SPSR_hyp, r10 @ encoding: [0x9a,0xf3,0x30,0x8e] diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s index 8c72288..d142dba 100644 --- a/test/MC/ARM/neon-bitwise-encoding.s +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -29,18 +29,63 @@ vbic d16, d17, d16 vbic q8, q8, q9 + vbic q10, q11 + vbic d9, d1 + vbic.i16 d16, #0xFF00 + vbic.i16 q8, #0xFF00 + vbic.i16 d16, #0x00FF + vbic.i16 q8, #0x00FF vbic.i32 d16, #0xFF000000 - vbic.i32 q8, #0xFF000000 - vbic q10, q11 - vbic d9, d1 + vbic.i32 q8, #0xFF000000 + vbic.i32 d16, #0x00FF0000 + vbic.i32 q8, #0x00FF0000 + vbic.i32 d16, #0x0000FF00 + vbic.i32 q8, #0x0000FF00 + vbic.i32 d16, #0x000000FF + vbic.i32 q8, #0x000000FF @ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xf2] @ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xf2] -@ CHECK: vbic.i32 d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3] -@ CHECK: vbic.i32 q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3] @ CHECK: vbic q10, q10, q11 @ encoding: [0xf6,0x41,0x54,0xf2] @ CHECK: vbic d9, d9, d1 @ encoding: [0x11,0x91,0x19,0xf2] - +@ CHECK: vbic.i16 d16, #0xff00 @ encoding: [0x3f,0x0b,0xc7,0xf3] +@ CHECK: vbic.i16 q8, #0xff00 @ encoding: [0x7f,0x0b,0xc7,0xf3] +@ CHECK: vbic.i16 d16, #0xff @ encoding: [0x3f,0x09,0xc7,0xf3] +@ CHECK: vbic.i16 q8, #0xff @ encoding: [0x7f,0x09,0xc7,0xf3] +@ CHECK: vbic.i32 d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3] +@ CHECK: vbic.i32 q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3] +@ CHECK: vbic.i32 d16, #0xff0000 @ encoding: [0x3f,0x05,0xc7,0xf3] +@ CHECK: vbic.i32 q8, #0xff0000 @ encoding: [0x7f,0x05,0xc7,0xf3] +@ CHECK: vbic.i32 d16, #0xff00 @ encoding: [0x3f,0x03,0xc7,0xf3] +@ CHECK: vbic.i32 q8, #0xff00 @ encoding: [0x7f,0x03,0xc7,0xf3] +@ CHECK: vbic.i32 d16, #0xff @ encoding: [0x3f,0x01,0xc7,0xf3] +@ CHECK: vbic.i32 q8, #0xff @ encoding: [0x7f,0x01,0xc7,0xf3] + + vand.i16 d10, #0xff03 + vand.i16 q10, #0xff03 + vand.i16 d10, #0x03ff + vand.i16 q10, #0x03ff + vand.i32 d10, #0x03ffffff + vand.i32 q10, #0x03ffffff + vand.i32 d10, #0xff03ffff + vand.i32 q10, #0xff03ffff + vand.i32 d10, #0xffff03ff + vand.i32 q10, #0xffff03ff + vand.i32 d10, #0xffffff03 + vand.i32 q10, #0xffffff03 + +@ CHECK: vbic.i16 d10, #0xfc @ encoding: [0x3c,0xa9,0x87,0xf3] +@ CHECK: vbic.i16 q10, #0xfc @ encoding: [0x7c,0x49,0xc7,0xf3] +@ CHECK: vbic.i16 d10, #0xfc00 @ encoding: [0x3c,0xab,0x87,0xf3] +@ CHECK: vbic.i16 q10, #0xfc00 @ encoding: [0x7c,0x4b,0xc7,0xf3] +@ CHECK: vbic.i32 d10, #0xfc000000 @ encoding: [0x3c,0xa7,0x87,0xf3] +@ CHECK: vbic.i32 q10, #0xfc000000 @ encoding: [0x7c,0x47,0xc7,0xf3] +@ CHECK: vbic.i32 d10, #0xfc0000 @ encoding: [0x3c,0xa5,0x87,0xf3] +@ CHECK: vbic.i32 q10, #0xfc0000 @ encoding: [0x7c,0x45,0xc7,0xf3] +@ CHECK: vbic.i32 d10, #0xfc00 @ encoding: [0x3c,0xa3,0x87,0xf3] +@ CHECK: vbic.i32 q10, #0xfc00 @ encoding: [0x7c,0x43,0xc7,0xf3] +@ CHECK: vbic.i32 d10, #0xfc @ encoding: [0x3c,0xa1,0x87,0xf3] +@ CHECK: vbic.i32 q10, #0xfc @ encoding: [0x7c,0x41,0xc7,0xf3] vorn d16, d17, d16 vorn q8, q8, q9 diff --git a/test/MC/ARM/neon-mov-vfp.s b/test/MC/ARM/neon-mov-vfp.s new file mode 100644 index 0000000..6ee6bfd --- /dev/null +++ b/test/MC/ARM/neon-mov-vfp.s @@ -0,0 +1,32 @@ +@ RUN: not llvm-mc -mcpu=cortex-a8 -triple armv7-unknown-unknown -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=VFP --check-prefix=CHECK +@ RUN: not llvm-mc -mcpu=cortex-a8 -triple thumbv7-unknown-unknown -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=VFP --check-prefix=CHECK +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-unknown-unknown -show-encoding -mattr=+neon < %s 2>&1 | FileCheck %s --check-prefix=NEON --check-prefix=CHECK +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumbv7-unknown-unknown -show-encoding -mattr=+neon < %s 2>&1 | FileCheck %s --check-prefix=NEON --check-prefix=CHECK + +@ The 32-bit variants of the NEON scalar move instructions are also available +@ to any core with VFPv2 + +@ CHECK-DAG: vmov.32 d13[0], r6 @ encoding: +@ CHECK-DAG: vmov.32 d17[1], r9 @ encoding: +vmov.32 d13[0], r6 +vmov.32 d17[1], r9 + +@ VFP-DAG: error: instruction requires: NEON +@ VFP-DAG: error: instruction requires: NEON +@ NEON-DAG: vmov.8 d22[5], r2 @ encoding: +@ NEON-DAG: vmov.16 d3[2], r4 @ encoding: +vmov.8 d22[5], r2 +vmov.16 d3[2], r4 + +@ CHECK-DAG: vmov.32 r6, d13[0] @ encoding: +@ CHECK-DAG: vmov.32 r9, d17[1] @ encoding: +vmov.32 r6, d13[0] +vmov.32 r9, d17[1] + +@ VFP-DAG: error: instruction requires: NEON +@ VFP-DAG: error: instruction requires: NEON +@ NEON-DAG: vmov.s8 r2, d22[5] @ encoding: +@ NEON-DAG: vmov.u16 r4, d3[2] @ encoding: +vmov.s8 r2, d22[5] +vmov.u16 r4, d3[2] + diff --git a/test/MC/ARM/symbol-variants.s b/test/MC/ARM/symbol-variants.s index a10fe50..af1bc07 100644 --- a/test/MC/ARM/symbol-variants.s +++ b/test/MC/ARM/symbol-variants.s @@ -19,8 +19,8 @@ @ plt bl f04(PLT) bl f05(plt) -@ARM: 10 R_ARM_PLT32 f04 -@ARM: 14 R_ARM_PLT32 f05 +@ARM: 10 R_ARM_CALL f04 +@ARM: 14 R_ARM_CALL f05 @THUMB: 10 R_ARM_THM_CALL f04 @THUMB: 14 R_ARM_THM_CALL f05 diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index 19d17c2..2a79132 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -2,6 +2,8 @@ @ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @ RUN: not llvm-mc -triple=thumbv5-apple-darwin < %s 2> %t @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s +@ RUN: not llvm-mc -triple=thumbv7m < %s 2> %t +@ RUN: FileCheck --check-prefix=CHECK-ERRORS-V7M < %t %s @ RUN: not llvm-mc -triple=thumbv8 < %s 2> %t @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V8 < %t %s @@ -59,6 +61,13 @@ error: invalid operand for instruction ldm r2!, {r2, r3, r4} ldm r2!, {r2, r3, r4, r10} ldmdb r2!, {r2, r3, r4} + ldm r0, {r2, sp} + ldmia r0, {r2-r3, sp} + ldmia r0!, {r2-r3, sp} + ldmfd r2, {r1, r3-r6, sp} + ldmfd r2!, {r1, r3-r6, sp} + ldmdb r1, {r2, r3, sp} + ldmdb r1!, {r2, r3, sp} @ CHECK-ERRORS: error: registers must be in range r0-r7 @ CHECK-ERRORS: ldm r2!, {r5, r8} @ CHECK-ERRORS: ^ @@ -74,6 +83,27 @@ error: invalid operand for instruction @ CHECK-ERRORS-V8: error: writeback register not allowed in register list @ CHECK-ERRORS-V8: ldmdb r2!, {r2, r3, r4} @ CHECK-ERRORS-V8: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldm r0, {r2, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldmia r0, {r2-r3, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldmia r0!, {r2-r3, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldmfd r2, {r1, r3-r6, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldmfd r2!, {r1, r3-r6, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldmdb r1, {r2, r3, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: ldmdb r1!, {r2, r3, sp} +@ CHECK-ERRORS-V7M: ^ @ Invalid writeback and register lists for PUSH/POP pop {r1, r2, r10} @@ -91,6 +121,10 @@ error: invalid operand for instruction stm r1!, {r2, r9} stm r2!, {r2, r9} stmdb r2!, {r0, r2} + stm r1!, {r2, sp} + stmia r4!, {r0-r3, sp} + stmdb r1, {r2, r3, sp} + stmdb r1!, {r2, r3, sp} @ CHECK-ERRORS: error: instruction requires: thumb2 @ CHECK-ERRORS: stm r1, {r2, r6} @ CHECK-ERRORS: ^ @@ -103,6 +137,18 @@ error: invalid operand for instruction @ CHECK-ERRORS-V8: error: writeback register not allowed in register list @ CHECK-ERRORS-V8: stmdb r2!, {r0, r2} @ CHECK-ERRORS-V8: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: stm r1!, {r2, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: stmia r4!, {r0-r3, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: stmdb r1, {r2, r3, sp} +@ CHECK-ERRORS-V7M: ^ +@ CHECK-ERRORS-V7M: error: SP not allowed in register list +@ CHECK-ERRORS-V7M: stmdb r1!, {r2, r3, sp} +@ CHECK-ERRORS-V7M: ^ @ Out of range immediates for LSL instruction. lsls r4, r5, #-1 @@ -218,3 +264,14 @@ error: invalid operand for instruction ldr r4, [pc, #-12] @ CHECK-ERRORS: error: instruction requires: thumb2 +@------------------------------------------------------------------------------ +@ STC2{L}/LDC2{L} - requires thumb2 +@------------------------------------------------------------------------------ + stc2 p0, c8, [r1, #4] + stc2l p6, c2, [r7, #4] + ldc2 p0, c8, [r1, #4] + ldc2l p6, c2, [r7, #4] +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: invalid operand for instruction diff --git a/test/MC/ARM/thumb-not-mclass.s b/test/MC/ARM/thumb-not-mclass.s new file mode 100644 index 0000000..fec545e --- /dev/null +++ b/test/MC/ARM/thumb-not-mclass.s @@ -0,0 +1,26 @@ +@ RUN: not llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s 2> %t +@ RUN: FileCheck < %t %s +@ RUN: not llvm-mc -triple=thumbv6m -show-encoding < %s 2> %t +@ RUN: FileCheck < %t %s + .syntax unified + .globl _func + +@ Check that the assembler rejects thumb instructions that are not valid +@ on mclass. + +@------------------------------------------------------------------------------ +@ BLX (immediate) +@------------------------------------------------------------------------------ + blx _baz + +@ CHECK: error: instruction requires: !armv*m + +@------------------------------------------------------------------------------ +@ SETEND +@------------------------------------------------------------------------------ + + setend be + setend le + +@ CHECK: error: invalid operand for instruction +@ CHECK: error: invalid operand for instruction diff --git a/test/MC/ARM/thumb2-bxj.s b/test/MC/ARM/thumb2-bxj.s new file mode 100644 index 0000000..e60d1a4 --- /dev/null +++ b/test/MC/ARM/thumb2-bxj.s @@ -0,0 +1,10 @@ +@ RUN: llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF +@ RUN: not llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF + + bxj r2 + +@ CHECK: bxj r2 @ encoding: [0xc2,0xf3,0x00,0x8f] +@ UNDEF: error: instruction requires: arm-mode diff --git a/test/MC/ARM/thumb2-exception-return-mclass.s b/test/MC/ARM/thumb2-exception-return-mclass.s new file mode 100644 index 0000000..21669b0 --- /dev/null +++ b/test/MC/ARM/thumb2-exception-return-mclass.s @@ -0,0 +1,15 @@ +# RUN: not llvm-mc -triple thumbv7m -assemble < %s 2>&1 | FileCheck %s + + .text + +# CHECK: instruction requires: !armv*m +# CHECK-NEXT: srsdb sp, #7 + srsdb sp, #7 + +# CHECK: instruction requires: !armv*m +# CHECK-NEXT: rfeia r6 + rfeia r6 + +# CHECK: instruction requires: !armv*m +# CHECK-NEXT: subs pc, lr, #42 + subs pc, lr, #42 diff --git a/test/MC/ARM/thumb2-ldrb-ldrh.s b/test/MC/ARM/thumb2-ldrb-ldrh.s new file mode 100644 index 0000000..8c97987 --- /dev/null +++ b/test/MC/ARM/thumb2-ldrb-ldrh.s @@ -0,0 +1,51 @@ +@ RUN: not llvm-mc -triple thumbv7a-none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK +@ RUN: not llvm-mc -triple thumbv7m-none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK + +@ Thumb2 LDRS?[BH] are not valid when Rt == PC (these encodings are used for +@ preload hints). +@ We don't check the actual error messages here as they are currently not very +@ helpful, see http://llvm.org/bugs/show_bug.cgi?id=21066. + +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: + ldrb pc, [r0, #10] + ldrb.w pc, [r1, #10] + ldrb pc, [r2, #-5] + ldrb pc, [pc, #7] + ldrb.w pc, [pc, #7] + +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: + ldrsb pc, [r3, #10] + ldrsb.w pc, [r4, #10] + ldrsb pc, [r5, #-5] + ldrsb pc, [pc, #7] + ldrsb.w pc, [pc, #7] + +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: + ldrh pc, [r6, #10] + ldrh.w pc, [r7, #10] + ldrh pc, [r8, #-5] + ldrh pc, [pc, #7] + ldrh.w pc, [pc, #7] + +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: +@ CHECK: error: + ldrsh pc, [r9, #10] + ldrsh.w pc, [r10, #10] + ldrsh pc, [r11, #-5] + ldrsh pc, [pc, #7] + ldrsh.w pc, [pc, #7] diff --git a/test/MC/ARM/thumb2-ldrexd-strexd.s b/test/MC/ARM/thumb2-ldrexd-strexd.s new file mode 100644 index 0000000..3ffb0cb --- /dev/null +++ b/test/MC/ARM/thumb2-ldrexd-strexd.s @@ -0,0 +1,14 @@ +@ RUN: llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s | FileCheck %s +@ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=UNDEF + + ldrexd r0, r1, [r2] + strexd r3, r4, r5, [r6] + +@ CHECK: ldrexd r0, r1, [r2] @ encoding: [0xd2,0xe8,0x7f,0x01] +@ CHECK: strexd r3, r4, r5, [r6] @ encoding: [0xc6,0xe8,0x73,0x45] + +@ UNDEF: error: instruction requires: !armv*m +@ UNDEF: error: instruction requires: !armv*m diff --git a/test/MC/ARM/thumb2-mclass.s b/test/MC/ARM/thumb2-mclass.s index d9c96df..331ecc1 100644 --- a/test/MC/ARM/thumb2-mclass.s +++ b/test/MC/ARM/thumb2-mclass.s @@ -1,7 +1,7 @@ -@ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s -@ RUN: llvm-mc -triple=thumbv6m -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -triple=thumbv6m -show-encoding < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V6M %s +@ RUN: llvm-mc -triple=thumbv7m -show-encoding < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s + .syntax unified - .globl _func @ Check that the assembler can handle the documented syntax from the ARM ARM. @ These tests test instruction encodings specific to v6m & v7m (FeatureMClass). @@ -40,20 +40,12 @@ msr apsr, r0 msr apsr_nzcvq, r0 - msr apsr_g, r0 - msr apsr_nzcvqg, r0 msr iapsr, r0 msr iapsr_nzcvq, r0 - msr iapsr_g, r0 - msr iapsr_nzcvqg, r0 msr eapsr, r0 msr eapsr_nzcvq, r0 - msr eapsr_g, r0 - msr eapsr_nzcvqg, r0 msr xpsr, r0 msr xpsr_nzcvq, r0 - msr xpsr_g, r0 - msr xpsr_nzcvqg, r0 msr ipsr, r0 msr epsr, r0 msr iepsr, r0 @@ -62,22 +54,22 @@ msr primask, r0 msr control, r0 -@ CHECK: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88] -@ CHECK: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88] -@ CHECK: msr apsr_g, r0 @ encoding: [0x80,0xf3,0x00,0x84] -@ CHECK: msr apsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x00,0x8c] -@ CHECK: msr iapsr, r0 @ encoding: [0x80,0xf3,0x01,0x88] -@ CHECK: msr iapsr, r0 @ encoding: [0x80,0xf3,0x01,0x88] -@ CHECK: msr iapsr_g, r0 @ encoding: [0x80,0xf3,0x01,0x84] -@ CHECK: msr iapsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x01,0x8c] -@ CHECK: msr eapsr, r0 @ encoding: [0x80,0xf3,0x02,0x88] -@ CHECK: msr eapsr, r0 @ encoding: [0x80,0xf3,0x02,0x88] -@ CHECK: msr eapsr_g, r0 @ encoding: [0x80,0xf3,0x02,0x84] -@ CHECK: msr eapsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x02,0x8c] -@ CHECK: msr xpsr, r0 @ encoding: [0x80,0xf3,0x03,0x88] -@ CHECK: msr xpsr, r0 @ encoding: [0x80,0xf3,0x03,0x88] -@ CHECK: msr xpsr_g, r0 @ encoding: [0x80,0xf3,0x03,0x84] -@ CHECK: msr xpsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x03,0x8c] +@ CHECK-V6M: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88] +@ CHECK-V6M: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88] +@ CHECK-V6M: msr iapsr, r0 @ encoding: [0x80,0xf3,0x01,0x88] +@ CHECK-V6M: msr iapsr, r0 @ encoding: [0x80,0xf3,0x01,0x88] +@ CHECK-V6M: msr eapsr, r0 @ encoding: [0x80,0xf3,0x02,0x88] +@ CHECK-V6M: msr eapsr, r0 @ encoding: [0x80,0xf3,0x02,0x88] +@ CHECK-V6M: msr xpsr, r0 @ encoding: [0x80,0xf3,0x03,0x88] +@ CHECK-V6M: msr xpsr, r0 @ encoding: [0x80,0xf3,0x03,0x88] +@ CHECK-V7M: msr apsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x00,0x88] +@ CHECK-V7M: msr apsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x00,0x88] +@ CHECK-V7M: msr iapsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x01,0x88] +@ CHECK-V7M: msr iapsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x01,0x88] +@ CHECK-V7M: msr eapsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x02,0x88] +@ CHECK-V7M: msr eapsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x02,0x88] +@ CHECK-V7M: msr xpsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x03,0x88] +@ CHECK-V7M: msr xpsr_nzcvq, r0 @ encoding: [0x80,0xf3,0x03,0x88] @ CHECK: msr ipsr, r0 @ encoding: [0x80,0xf3,0x05,0x88] @ CHECK: msr epsr, r0 @ encoding: [0x80,0xf3,0x06,0x88] @ CHECK: msr iepsr, r0 @ encoding: [0x80,0xf3,0x07,0x88] diff --git a/test/MC/ARM/thumb_rewrites.s b/test/MC/ARM/thumb_rewrites.s new file mode 100644 index 0000000..c9d625e --- /dev/null +++ b/test/MC/ARM/thumb_rewrites.s @@ -0,0 +1,52 @@ +@ RUN: llvm-mc -triple thumbv6m -show-encoding < %s | FileCheck %s + + adds r0, r0, #8 +@ CHECK: adds r0, #8 @ encoding: [0x08,0x30] + + adds r0, r0, r0 +@ CHECK: adds r0, r0, r0 @ encoding: [0x00,0x18] + + add r0, r0, r8 +@ CHECK: add r0, r8 @ encoding: [0x40,0x44] + + add sp, sp, r0 +@ CHECK: add sp, r0 @ encoding: [0x85,0x44] + + add r0, r0, r1 +@ CHECK: add r0, r1 @ encoding: [0x08,0x44] + + add r2, r2, r3 +@ CHECK: add r2, r3 @ encoding: [0x1a,0x44] + + subs r0, r0, r0 +@ CHECK: subs r0, r0, r0 @ encoding: [0x00,0x1a] + + ands r0, r0, r1 +@ CHECK: ands r0, r1 @ encoding: [0x08,0x40] + + eors r0, r0, r1 +@ CHECK: eors r0, r1 @ encoding: [0x48,0x40] + + lsls r0, r0, r1 +@ CHECK: lsls r0, r1 @ encoding: [0x88,0x40] + + lsrs r0, r0, r1 +@ CHECK: lsrs r0, r1 @ encoding: [0xc8,0x40] + + asrs r0, r0, r1 +@ CHECK: asrs r0, r1 @ encoding: [0x08,0x41] + + adcs r0, r0, r1 +@ CHECK: adcs r0, r1 @ encoding: [0x48,0x41] + + sbcs r0, r0, r1 +@ CHECK: sbcs r0, r1 @ encoding: [0x88,0x41] + + rors r0, r0, r1 +@ CHECK: rors r0, r1 @ encoding: [0xc8,0x41] + + orrs r0, r0, r1 +@ CHECK: orrs r0, r1 @ encoding: [0x08,0x43] + + bics r0, r0, r1 +@ CHECK: bics r0, r1 @ encoding: [0x88,0x43] diff --git a/test/MC/ARM/thumbv7em.s b/test/MC/ARM/thumbv7em.s new file mode 100644 index 0000000..53ebff2 --- /dev/null +++ b/test/MC/ARM/thumbv7em.s @@ -0,0 +1,53 @@ +@ RUN: llvm-mc -triple=thumbv7em -show-encoding < %s | FileCheck %s +@ RUN: not llvm-mc -triple=thumbv7m -show-encoding 2>&1 < %s | FileCheck --check-prefix=CHECK-V7M %s + + .syntax unified + +@ Check that the assembler can handle the documented syntax from the ARM ARM. +@ These tests test instruction encodings specific to ARMv7E-M. + +@------------------------------------------------------------------------------ +@ MSR +@------------------------------------------------------------------------------ + + msr apsr_g, r0 + msr apsr_nzcvqg, r0 + msr iapsr_g, r0 + msr iapsr_nzcvqg, r0 + msr eapsr_g, r0 + msr eapsr_nzcvqg, r0 + msr xpsr_g, r0 + msr xpsr_nzcvqg, r0 + +@ CHECK: msr apsr_g, r0 @ encoding: [0x80,0xf3,0x00,0x84] +@ CHECK: msr apsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x00,0x8c] +@ CHECK: msr iapsr_g, r0 @ encoding: [0x80,0xf3,0x01,0x84] +@ CHECK: msr iapsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x01,0x8c] +@ CHECK: msr eapsr_g, r0 @ encoding: [0x80,0xf3,0x02,0x84] +@ CHECK: msr eapsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x02,0x8c] +@ CHECK: msr xpsr_g, r0 @ encoding: [0x80,0xf3,0x03,0x84] +@ CHECK: msr xpsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x03,0x8c] +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr apsr_g, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr apsr_nzcvqg, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr iapsr_g, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr iapsr_nzcvqg, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr eapsr_g, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr eapsr_nzcvqg, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr xpsr_g, r0 +@ CHECK-V7M-NEXT: ^ +@ CHECK-V7M: error: invalid operand for instruction +@ CHECK-V7M-NEXT: msr xpsr_nzcvqg, r0 +@ CHECK-V7M-NEXT: ^ diff --git a/test/MC/ARM/vfp4.s b/test/MC/ARM/vfp4.s index 8b1b0e0..1563b5a 100644 --- a/test/MC/ARM/vfp4.s +++ b/test/MC/ARM/vfp4.s @@ -6,7 +6,7 @@ @ ARM: vfma.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xe2,0xee] @ THUMB: vfma.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xa1,0x0b] -@ THUMB_V7EM-ERRORS: error: instruction requires: double precision VFP +@ THUMB_V7EM-ERRORS: error: invalid operand for instruction @ THUMB_V7EM-ERRORS-NEXT: vfma.f64 d16, d18, d17 vfma.f64 d16, d18, d17 @@ -17,7 +17,7 @@ vfma.f32 s2, s4, s0 @ ARM: vfma.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x42,0xf2] @ THUMB: vfma.f32 d16, d18, d17 @ encoding: [0x42,0xef,0xb1,0x0c] -@ THUMB_V7EM-ERRORS: error: instruction requires: NEON +@ THUMB_V7EM-ERRORS: error: invalid operand for instruction @ THUMB_V7EM-ERRORS-NEXT: vfma.f32 d16, d18, d17 vfma.f32 d16, d18, d17 @@ -29,7 +29,7 @@ vfma.f32 q2, q4, q0 @ ARM: vfnma.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0xd2,0xee] @ THUMB: vfnma.f64 d16, d18, d17 @ encoding: [0xd2,0xee,0xe1,0x0b] -@ THUMB_V7EM-ERRORS: error: instruction requires: double precision VFP +@ THUMB_V7EM-ERRORS: error: invalid operand for instruction @ THUMB_V7EM-ERRORS-NEXT: vfnma.f64 d16, d18, d17 vfnma.f64 d16, d18, d17 @@ -40,7 +40,7 @@ vfnma.f32 s2, s4, s0 @ ARM: vfms.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0xe2,0xee] @ THUMB: vfms.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xe1,0x0b] -@ THUMB_V7EM-ERRORS: error: instruction requires: double precision VFP +@ THUMB_V7EM-ERRORS: error: invalid operand for instruction @ THUMB_V7EM-ERRORS-NEXT: vfms.f64 d16, d18, d17 vfms.f64 d16, d18, d17 @@ -51,7 +51,7 @@ vfms.f32 s2, s4, s0 @ ARM: vfms.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x62,0xf2] @ THUMB: vfms.f32 d16, d18, d17 @ encoding: [0x62,0xef,0xb1,0x0c] -@ THUMB_V7EM-ERRORS: error: instruction requires: NEON +@ THUMB_V7EM-ERRORS: error: invalid operand for instruction @ THUMB_V7EM-ERRORS-NEXT: vfms.f32 d16, d18, d17 vfms.f32 d16, d18, d17 @@ -63,7 +63,7 @@ vfms.f32 q2, q4, q0 @ ARM: vfnms.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xd2,0xee] @ THUMB: vfnms.f64 d16, d18, d17 @ encoding: [0xd2,0xee,0xa1,0x0b] -@ THUMB_V7EM-ERRORS: error: instruction requires: double precision VFP +@ THUMB_V7EM-ERRORS: error: invalid operand for instruction @ THUMB_V7EM-ERRORS-NEXT: vfnms.f64 d16, d18, d17 vfnms.f64 d16, d18, d17 diff --git a/test/MC/ARM/vorr-vbic-illegal-cases.s b/test/MC/ARM/vorr-vbic-illegal-cases.s index 16ab6b5..673098a 100644 --- a/test/MC/ARM/vorr-vbic-illegal-cases.s +++ b/test/MC/ARM/vorr-vbic-illegal-cases.s @@ -1,6 +1,13 @@ @ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s .text + vorr.i32 d2, #0xffffffff + vorr.i32 q2, #0xffffffff + vorr.i32 d2, #0xabababab + vorr.i32 q2, #0xabababab + vorr.i16 q2, #0xabab + vorr.i16 q2, #0xabab + @ CHECK: error: invalid operand for instruction @ CHECK: vorr.i32 d2, #0xffffffff @ CHECK: error: invalid operand for instruction @@ -14,6 +21,13 @@ @ CHECK: error: invalid operand for instruction @ CHECK: vorr.i16 q2, #0xabab + vbic.i32 d2, #0xffffffff + vbic.i32 q2, #0xffffffff + vbic.i32 d2, #0xabababab + vbic.i32 q2, #0xabababab + vbic.i16 d2, #0xabab + vbic.i16 q2, #0xabab + @ CHECK: error: invalid operand for instruction @ CHECK: vbic.i32 d2, #0xffffffff @ CHECK: error: invalid operand for instruction @@ -27,16 +41,25 @@ @ CHECK: error: invalid operand for instruction @ CHECK: vbic.i16 q2, #0xabab - vorr.i32 d2, #0xffffffff - vorr.i32 q2, #0xffffffff - vorr.i32 d2, #0xabababab - vorr.i32 q2, #0xabababab - vorr.i16 q2, #0xabab - vorr.i16 q2, #0xabab + vbic.i32 d2, #0x03ffffff + vbic.i32 q2, #0x03ffff + vbic.i32 d2, #0x03ff + vbic.i32 d2, #0xff00ff + vbic.i16 d2, #0x03ff + vbic.i16 q2, #0xf0f0 + vbic.i16 q2, #0xf0f0f0 - vbic.i32 d2, #0xffffffff - vbic.i32 q2, #0xffffffff - vbic.i32 d2, #0xabababab - vbic.i32 q2, #0xabababab - vbic.i16 d2, #0xabab - vbic.i16 q2, #0xabab +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 d2, #0x03ffffff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 q2, #0x03ffff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 d2, #0x03ff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i32 d2, #0xff00ff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i16 d2, #0x03ff +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i16 q2, #0xf0f0 +@ CHECK: error: invalid operand for instruction +@ CHECK: vbic.i16 q2, #0xf0f0f0 diff --git a/test/MC/AsmParser/comments-x86-darwin.s b/test/MC/AsmParser/comments-x86-darwin.s new file mode 100644 index 0000000..e201f48 --- /dev/null +++ b/test/MC/AsmParser/comments-x86-darwin.s @@ -0,0 +1,14 @@ +// RUN: llvm-mc -triple x86_64-apple-darwin %s 2>&1 | FileCheck %s +# ensure that single '#' comments are worink as expected on x86 darwin +.align 3 # test single hash after align +// CHECK: .align 3 +foo: # single hash should be ignored as comment +// CHECK-LABEL: foo: + movl %esp, %ebp # same after an instruction +// CHECK: movl %esp, %ebp +# movl %esp, %ebp ## start of the line +// CHECK-NOT: movl %esp, %ebp + # movl %esp, %ebp ## not quite start of the line +// CHECK-NOT: movl %esp, %ebp +bar: +// CHECK-LABEL: bar: diff --git a/test/MC/AsmParser/directive-warning.s b/test/MC/AsmParser/directive-warning.s new file mode 100644 index 0000000..311989e --- /dev/null +++ b/test/MC/AsmParser/directive-warning.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple i386 %s 2>&1 | FileCheck %s + + .warning +// CHECK: warning: .warning directive invoked in source file +// CHECK-NEXT: .warning +// CHECK-NEXT: ^ + + .ifc a,a + .warning + .endif +// CHECK: warning: .warning directive invoked in source file +// CHECK-NEXT: .warning +// CHECK-NEXT: ^ + + .ifnc a,a + .warning + .endif +// CHECK-NOT: warning: .warning directive invoked in source file + + .warning "here be dragons" +// CHECK: warning: here be dragons + + .ifc one, two + .warning "dragons, i say" + .endif +// CHECK-NOT: warning: dragons, i say diff --git a/test/MC/AsmParser/macro-exitm.s b/test/MC/AsmParser/macro-exitm.s new file mode 100644 index 0000000..66a0597 --- /dev/null +++ b/test/MC/AsmParser/macro-exitm.s @@ -0,0 +1,64 @@ +// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +// .exitm is encountered in a normal macro expansion +.macro REP +.rept 3 +.long 0 +.exitm +.endr +.endm +REP +// Only the output from the first rept expansion should make it through: +// CHECK: .long 0 +// CHECK-NOT: .long 0 + +// .exitm is in a true branch +.macro A +.if 1 +.long 1 +.exitm +.endif +.long 1 +.endm +A +// CHECK: .long 1 +// CHECK-NOT: .long 1 + +// .exitm is in a false branch +.macro B +.if 1 +.long 2 +.else +.exitm +.endif +.long 2 +.endm +B +// CHECK: .long 2 +// CHECK: .long 2 + + +// .exitm is in a false branch that is encountered prior to the true branch +.macro C +.if 0 +.exitm +.else +.long 3 +.endif +.long 3 +.endm +C +// CHECK: .long 3 +// CHECK: .long 3 + +// .exitm is in a macro that's expanded in a conditional block. +.macro D +.long 4 +.exitm +.long 4 +.endm +.if 1 +D +.endif +// CHECK: .long 4 +// CHECK-NOT: .long 4 diff --git a/test/MC/AsmParser/macros-darwin-vararg.s b/test/MC/AsmParser/macros-darwin-vararg.s index a650c08..4aa2f4c 100644 --- a/test/MC/AsmParser/macros-darwin-vararg.s +++ b/test/MC/AsmParser/macros-darwin-vararg.s @@ -1,8 +1,90 @@ -// RUN: not llvm-mc -triple i386-apple-darwin10 %s 2>&1 | FileCheck %s +// RUN: llvm-mc -triple i386-apple-darwin10 %s 2>&1 | FileCheck %s -// CHECK: error: vararg is not a valid parameter qualifier for 'arg' in macro 'abc' -// CHECK: .macro abc arg:vararg +.macro abc a b:vararg +.globl "\a, \b" +.endm + +// CHECK: .globl "zed0, zed1, zed2" +abc zed0, zed1, zed2 + +.purgem abc + +.macro ifcc arg:vararg +.if cc + \arg +.endif +.endm + +.macro ifcc2 arg0 arg1:vararg +.if cc + movl \arg0, \arg1 +.endif +.endm + +.macro ifcc3 arg0, arg1:vararg +.if cc + movl \arg0, \arg1 +.endif +.endm + +.macro ifcc4 arg0, arg1:vararg +.if cc + movl \arg1, \arg0 +.endif +.endm -.macro abc arg:vararg - \arg +.text + +// CHECK: movl %esp, %ebp +// CHECK: subl $0, %esp +// CHECK: movl %eax, %ebx +// CHECK: movl %ecx, %ebx +// CHECK: movl %ecx, %eax +// CHECK: movl %eax, %ecx +// CHECK: movl %ecx, %eax +// CHECK: movl %eax, %ecx +.set cc,1 + ifcc movl %esp, %ebp + subl $0, %esp + + ifcc2 %eax, %ebx + ifcc2 %ecx, %ebx + ifcc3 %ecx, %eax + ifcc3 %eax, %ecx + ifcc4 %eax, %ecx ## test + ifcc4 %ecx, %eax ## test + +// CHECK-NOT movl +// CHECK: subl $1, %esp +.set cc,0 + ifcc movl, %esp, %ebp + subl $1, %esp + +.macro abc arg:vararg=nop + \arg +.endm + +.macro abcd arg0=%eax, arg1:vararg=%ebx + movl \arg0, \arg1 .endm + +.text + +// CHECK: nop + abc +// CHECK: movl %eax, %ebx + abcd , + +.macro .make_macro start, end, name, body:vararg +\start \name +\body +\end +.endmacro + +.make_macro .macro,.endmacro,.mybyte,.byte $0, $2, $1 + +.data +// CHECK: .byte 10 +// CHECK: .byte 12 +// CHECK: .byte 11 +.mybyte 10,11,12 diff --git a/test/MC/COFF/alias.s b/test/MC/COFF/alias.s index eb5398a..2293d43 100644 --- a/test/MC/COFF/alias.s +++ b/test/MC/COFF/alias.s @@ -46,9 +46,9 @@ weak_aliased_to_external = external2 // CHECK-NEXT: AuxSymbolCount: 0 // CHECK-NEXT: } // CHECK-NEXT: Symbol { -// CHECK-NEXT: Name: global_aliased_to_external +// CHECK: Name: global_aliased_to_external // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null (0x0) // CHECK-NEXT: ComplexType: Null (0x0) // CHECK-NEXT: StorageClass: External (0x2) @@ -57,7 +57,7 @@ weak_aliased_to_external = external2 // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: external1 // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null (0x0) // CHECK-NEXT: ComplexType: Null (0x0) // CHECK-NEXT: StorageClass: External (0x2) @@ -84,21 +84,20 @@ weak_aliased_to_external = external2 // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: weak_aliased_to_external // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null (0x0) // CHECK-NEXT: ComplexType: Null (0x0) // CHECK-NEXT: StorageClass: WeakExternal (0x69) // CHECK-NEXT: AuxSymbolCount: 1 // CHECK-NEXT: AuxWeakExternal { -// CHECK-NEXT: Linked: external2 (13) +// CHECK-NEXT: Linked: external2 // CHECK-NEXT: Search: Library (0x2) -// CHECK-NEXT: Unused: (00 00 00 00 00 00 00 00 00 00) // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: external2 // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null (0x0) // CHECK-NEXT: ComplexType: Null (0x0) // CHECK-NEXT: StorageClass: External (0x2) diff --git a/test/MC/COFF/basic-coff-64.s b/test/MC/COFF/basic-coff-64.s index 38a9e57..62e4eb9 100644 --- a/test/MC/COFF/basic-coff-64.s +++ b/test/MC/COFF/basic-coff-64.s @@ -113,7 +113,6 @@ _main: # @main // CHECK: Checksum: 0x0 // CHECK: Number: [[DataNum]] // CHECK: Selection: 0x0 -// CHECK: Unused: (00 00 00) // CHECK: } // CHECK: } // CHECK: Symbol { @@ -128,7 +127,7 @@ _main: # @main // CHECK: Symbol { // CHECK: Name: _printf // CHECK: Value: 0 -// CHECK: Section: (0) +// CHECK: Section: IMAGE_SYM_UNDEFINED (0) // CHECK: BaseType: Null // CHECK: ComplexType: Null // CHECK: StorageClass: External diff --git a/test/MC/COFF/basic-coff.s b/test/MC/COFF/basic-coff.s index 38bfa6d..549825a 100644 --- a/test/MC/COFF/basic-coff.s +++ b/test/MC/COFF/basic-coff.s @@ -113,7 +113,6 @@ L_.str: # @.str // CHECK: Checksum: 0x0 // CHECK: Number: 2 // CHECK: Selection: 0x0 -// CHECK: Unused: (00 00 00) // CHECK: } // CHECK: } // CHECK: Symbol { @@ -128,7 +127,7 @@ L_.str: # @.str // CHECK: Symbol { // CHECK: Name: _printf // CHECK: Value: 0 -// CHECK: Section: (0) +// CHECK: Section: IMAGE_SYM_UNDEFINED (0) // CHECK: BaseType: Null // CHECK: ComplexType: Null // CHECK: StorageClass: External diff --git a/test/MC/COFF/bigobj.py b/test/MC/COFF/bigobj.py new file mode 100644 index 0000000..2d61073 --- /dev/null +++ b/test/MC/COFF/bigobj.py @@ -0,0 +1,26 @@ +# RUN: python %s | llvm-mc -filetype=obj -triple i686-pc-win32 - | llvm-readobj -h | FileCheck %s + +# This test checks that the COFF object emitter can produce objects with +# more than 65279 sections. + +# While we only generate 65277 sections, an implicit .text, .data and .bss will +# also be emitted. This brings the total to 65280. +num_sections = 65277 + +# CHECK: ImageFileHeader { +# CHECK-NEXT: Machine: IMAGE_FILE_MACHINE_I386 +# CHECK-NEXT: SectionCount: 65280 +# CHECK-NEXT: TimeDateStamp: {{[0-9]+}} +# CHECK-NEXT: PointerToSymbolTable: 0x{{[0-9A-F]+}} +# CHECK-NEXT: SymbolCount: 195837 +# CHECK-NEXT: OptionalHeaderSize: 0 +# CHECK-NEXT: Characteristics [ (0x0) +# CHECK-NEXT: ] +# CHECK-NEXT: } + +for i in range(0, num_sections): + print(""" .section .bss,"bw",discard,_b%d + .globl _b%d # @b%d +_b%d: + .byte 0 # 0x0 +""" % (i, i, i, i)) diff --git a/test/MC/COFF/bss_section.ll b/test/MC/COFF/bss_section.ll index 477b3df..1921eeb 100644 --- a/test/MC/COFF/bss_section.ll +++ b/test/MC/COFF/bss_section.ll @@ -6,4 +6,4 @@ ; CHECK: .bss @thingy_linkonce = linkonce_odr global %struct.foo zeroinitializer, align 4 -; CHECK: .section .bss,"bw",discard,_thingy_linkonce +; CHECK: .section .bss,"wb",discard,_thingy_linkonce diff --git a/test/MC/COFF/comm-align.s b/test/MC/COFF/comm-align.s new file mode 100644 index 0000000..ca6bfbe --- /dev/null +++ b/test/MC/COFF/comm-align.s @@ -0,0 +1,57 @@ +# RUN: llvm-mc -triple i686-windows-gnu -filetype obj -o - %s \ +# RUN: | llvm-readobj -coff-directives -symbols | FileCheck %s + +# NOTE: this test checks multiple things: +# - that -aligncomm is not emitted for 1-byte alignment +# - that -aligncomm is emitted for the various alignments (greater than 1) +# - that the alignment is represented as a log_2 of the alignment +# - that the section switching occurs correctly +# - that functions after the switch also are emitted into the correct section + + .text + + .def _a + .scl 3 + .type 32 + .endef +_a: + ret + + .data + + .comm _s_1,4,0 # @s_1 + .comm _s_2,4,1 # @s_2 + .comm _s_4,4,2 # @s_3 + .comm _s_8,4,3 # @s_4 + + .comm _small_but_overaligned,1,3 # @s_4 + + .text + + .def _b + .scl 3 + .type 32 + .endef +_b: + ret + +# CHECK-NOT: -aligncomm:"_s_1",0 + +# CHECK: Symbols [ +# CHECK: Symbol { +# CHECK: Name: _a +# CHECK: Section: .text (1) +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: _small_but_overaligned +# CHECK-NEXT:Value: 1 +# CHECK-NEXT:Section: IMAGE_SYM_UNDEFINED (0) +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: _b +# CHECK: Section: .text (1) +# CHECK: } +# CHECK: ] + +# CHECK: Directive(s): -aligncomm:"_s_2",1 -aligncomm:"_s_4",2 -aligncomm:"_s_8",3 -aligncomm:"_small_but_overaligned",3 + diff --git a/test/MC/COFF/comm.ll b/test/MC/COFF/comm.ll index 6fe122e..74da557 100644 --- a/test/MC/COFF/comm.ll +++ b/test/MC/COFF/comm.ll @@ -9,5 +9,5 @@ ; CHECK: .lcomm _a,1 ; CHECK: .lcomm _b,8,8 ; .comm uses log2 alignment -; CHECK: .comm _c,1 -; CHECK: .comm _d,8 +; CHECK: .comm _c,1,0 +; CHECK: .comm _d,8,3 diff --git a/test/MC/COFF/comm.s b/test/MC/COFF/comm.s index 37db75f..773ebde 100644 --- a/test/MC/COFF/comm.s +++ b/test/MC/COFF/comm.s @@ -1,7 +1,9 @@ // RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -t | FileCheck %s .lcomm _a,4,4 -.comm _b, 4 +.comm _b, 4, 2 +// _c has size 1 but align 32, the value field is the max of size and align. +.comm _c, 1, 5 // CHECK: Symbol { @@ -17,7 +19,17 @@ // CHECK: Symbol { // CHECK: Name: _b // CHECK-NEXT: Value: 4 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) +// CHECK-NEXT: BaseType: Null +// CHECK-NEXT: ComplexType: Null +// CHECK-NEXT: StorageClass: External +// CHECK-NEXT: AuxSymbolCount: 0 +// CHECK-NEXT: } + +// CHECK: Symbol { +// CHECK: Name: _c +// CHECK-NEXT: Value: 32 +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null // CHECK-NEXT: ComplexType: Null // CHECK-NEXT: StorageClass: External diff --git a/test/MC/COFF/const-gv-with-rel-init.ll b/test/MC/COFF/const-gv-with-rel-init.ll new file mode 100644 index 0000000..7d3c5f6 --- /dev/null +++ b/test/MC/COFF/const-gv-with-rel-init.ll @@ -0,0 +1,11 @@ +; RUN: llc -mtriple x86_64-pc-windows-msvc < %s | FileCheck %s + +define void @f() { + ret void +} + +@ptr = constant void ()* @f, section ".CRT$XLB", align 8 +; CHECK: .section .CRT$XLB,"rd" + +@weak_array = weak_odr unnamed_addr constant [1 x i8*] [i8* bitcast (void ()* @f to i8*)] +; CHECK: .section .rdata,"rd",discard,weak_array diff --git a/test/MC/COFF/feat00.s b/test/MC/COFF/feat00.s index bfd47ad..f671ebe 100644 --- a/test/MC/COFF/feat00.s +++ b/test/MC/COFF/feat00.s @@ -6,7 +6,7 @@ // CHECK: Symbol { // CHECK: Name: @feat.00 // CHECK: Value: 123 -// CHECK: Section: (65535) +// CHECK: Section: IMAGE_SYM_ABSOLUTE (-1) // CHECK: BaseType: Null (0x0) // CHECK: ComplexType: Null (0x0) // CHECK: StorageClass: External (0x2) diff --git a/test/MC/COFF/file.s b/test/MC/COFF/file.s index 132e82b..a18a1f4 100644 --- a/test/MC/COFF/file.s +++ b/test/MC/COFF/file.s @@ -21,7 +21,7 @@ // CHECK-SCN: Symbols [ // CHECK-SCN: Symbol { // CHECK-SCN: Name: .file -// CHECK-SCN: Section: (65534) +// CHECK-SCN: Section: IMAGE_SYM_DEBUG (-2) // CHECK-SCN: StorageClass: File // CHECK-SCN: AuxFileRecord { // CHECK-SCN: FileName: null-padded.asm @@ -29,7 +29,7 @@ // CHECK-SCN: } // CHECK-SCN: Symbol { // CHECK-SCN: Name: .file -// CHECK-SCN: Section: (65534) +// CHECK-SCN: Section: IMAGE_SYM_DEBUG (-2) // CHECK-SCN: StorageClass: File // CHECK-SCN: AuxFileRecord { // CHECK-SCN: FileName: eighteen-chars.asm @@ -37,7 +37,7 @@ // CHECK-SCN: } // CHECK-SCN: Symbol { // CHECK-SCN: Name: .file -// CHECK-SCN: Section: (65534) +// CHECK-SCN: Section: IMAGE_SYM_DEBUG (-2) // CHECK-SCN: StorageClass: File // CHECK-SCN: AuxFileRecord { // CHECK-SCN: FileName: multiple-auxiliary-entries.asm diff --git a/test/MC/COFF/ir-to-imgrel.ll b/test/MC/COFF/ir-to-imgrel.ll index 39884d2..dfc88b2 100644 --- a/test/MC/COFF/ir-to-imgrel.ll +++ b/test/MC/COFF/ir-to-imgrel.ll @@ -2,5 +2,5 @@ @__ImageBase = external global i8 -; X64: .quad "?x@@3HA"@IMGREL32 +; X64: .quad "?x@@3HA"@IMGREL @"\01?x@@3HA" = global i64 sub nsw (i64 ptrtoint (i64* @"\01?x@@3HA" to i64), i64 ptrtoint (i8* @__ImageBase to i64)), align 8 diff --git a/test/MC/COFF/linker-options.ll b/test/MC/COFF/linker-options.ll index 0be74e5..60baccf 100755 --- a/test/MC/COFF/linker-options.ll +++ b/test/MC/COFF/linker-options.ll @@ -14,7 +14,7 @@ define dllexport void @foo() { ret void } -; CHECK: .section .drectve,"r" +; CHECK: .section .drectve,"yn" ; CHECK: .ascii " /DEFAULTLIB:msvcrt.lib" ; CHECK: .ascii " /DEFAULTLIB:msvcrt.lib" ; CHECK: .ascii " /DEFAULTLIB:secur32.lib" diff --git a/test/MC/COFF/lset0.s b/test/MC/COFF/lset0.s index 7321b01..f4a13bf 100755 --- a/test/MC/COFF/lset0.s +++ b/test/MC/COFF/lset0.s @@ -1,12 +1,11 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o - | llvm-nm - | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o - | llvm-nm - | FileCheck %s --check-prefix=GLOBAL +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o - | llvm-nm - | FileCheck %s --check-prefix=LOCAL not_global = 123 global = 456 .globl global -.Llocal = 789 +Llocal = 789 -// CHECK-NOT: not_global -// CHECK-NOT: Llocal -// CHECK: global -// CHECK-NOT: not_global -// CHECK-NOT: Llocal +// LOCAL-NOT: local +// GLOBAL: A global +// GLOBAL: a not_global diff --git a/test/MC/COFF/secidx.s b/test/MC/COFF/secidx.s index 619d777..022804d 100644 --- a/test/MC/COFF/secidx.s +++ b/test/MC/COFF/secidx.s @@ -4,7 +4,9 @@ Lfoo: .secidx Lfoo + .short 0 .secidx Lbar + .short 0 .section spam Lbar: diff --git a/test/MC/COFF/section-invalid-flags.s b/test/MC/COFF/section-invalid-flags.s index 17b1550..9cdceaf 100644 --- a/test/MC/COFF/section-invalid-flags.s +++ b/test/MC/COFF/section-invalid-flags.s @@ -6,3 +6,6 @@ // CHECK: error: conflicting section flags 'b' and 'd' .section s_bd,"bd"; .long 1 + +// CHECK: error: expected comdat type such as 'discard' or 'largest' after protection bits +.section .stack, "w", @nobits diff --git a/test/MC/COFF/section-name-encoding.s b/test/MC/COFF/section-name-encoding.s index 7edd6d7..73ab4bd 100644 --- a/test/MC/COFF/section-name-encoding.s +++ b/test/MC/COFF/section-name-encoding.s @@ -21,14 +21,19 @@ .section s1234567; .long 1 +// Note: the names in the string table will be sorted in reverse +// lexicographical order. Use a suffix letter (z, y, x, ...) to +// get the preferred ordering of names in the test. + // Base 10 encoding +// Ending in z should put the name first in the string table. // /4 // CHECK: Section { // CHECK: Number: 6 -// CHECK: Name: s12345678 (2F 34 00 00 00 00 00 00) +// CHECK: Name: s1234567z (2F 34 00 00 00 00 00 00) // CHECK: } -.section s12345678; .long 1 +.section s1234567z; .long 1 // Generate padding sections to increase the string table size to at least @@ -47,20 +52,20 @@ pad_sections2 \pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad\pad .endm -// 1000x 'a' -pad_sections aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa +// 1000x 'y' +pad_sections yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy // /1000029 == 4 + 10 + (5 * (2 + (20 * 10 * 1000) + 1)) // v | | v ~~~~~~~~~~~~~~ v // table size v v "p0" pad NUL separator -// "s12345678\0" # of pad sections +// "s1234567z\0" # of pad sections // // CHECK: Section { // CHECK: Number: 12 -// CHECK: Name: seven_digit (2F 31 30 30 30 30 32 39) +// CHECK: Name: sevendigitx (2F 31 30 30 30 30 32 39) // CHECK: } -.section seven_digit; .long 1 +.section sevendigitx; .long 1 // Generate padding sections to increase the string table size to at least @@ -71,18 +76,18 @@ pad_sections aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa .endm // 1000x 'a' -pad_sections_ex aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa +pad_sections_ex wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww // //AAmJa4 == 1000029 + 12 + (5 * (2 + (9 * 20 * 10 * 1000) + 1)) == 38*64^3 + 9*64^2 + 26*64 + 56 // v | | v ~~~~~~~~~~~~~~~~~~ v // seven_digit offset v v "p0" pad NUL separator -// "seven_digit\0" # of pad sections +// "sevendigitx\0" # of pad sections // // "2F 2F 41 41 6D 4A 61 34" is "//AAmJa4", which decodes to "0 0 38 9 26 56". // // CHECK: Section { // CHECK: Number: 18 -// CHECK: Name: double_slash (2F 2F 41 41 6D 4A 61 34) +// CHECK: Name: doubleslashv (2F 2F 41 41 6D 4A 61 34) // CHECK: } -.section double_slash; .long 1 +.section doubleslashv; .long 1 diff --git a/test/MC/COFF/section-passthru-flags.s b/test/MC/COFF/section-passthru-flags.s new file mode 100644 index 0000000..3bd061b --- /dev/null +++ b/test/MC/COFF/section-passthru-flags.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple i386-pc-win32 < %s | FileCheck %s +.section .klaatu,"wn" +// CHECK: .section .klaatu,"wn" +.section .barada,"y" +// CHECK: .section .barada,"y" +.section .nikto,"wds" +// CHECK: .section .nikto,"wds" diff --git a/test/MC/COFF/seh-linkonce.s b/test/MC/COFF/seh-linkonce.s new file mode 100644 index 0000000..5631b74 --- /dev/null +++ b/test/MC/COFF/seh-linkonce.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple x86_64-pc-win32 -filetype=obj %s | llvm-readobj -sections -section-symbols | FileCheck %s + + .text + .def weak_func; + .scl 2; + .type 32; + .endef + .section .text,"xr",discard,weak_func + .globl weak_func + .align 16, 0x90 +weak_func: # @weak_func +.Ltmp0: +.seh_proc weak_func +# BB#0: # %entry + pushq %rbp +.Ltmp1: + .seh_pushreg 5 + movq %rsp, %rbp +.Ltmp2: + .seh_setframe 5, 0 +.Ltmp3: + .seh_endprologue + xorl %eax, %eax + popq %rbp + retq +.Leh_func_end0: +.Ltmp4: + .seh_endproc + +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Name: .text +// CHECK: } +// CHECK: Section { +// CHECK: Name: .data +// CHECK: } +// CHECK: Section { +// CHECK: Name: .bss +// CHECK: } +// CHECK: Section { +// CHECK: Number: [[TEXT_SECNUM:[0-9]+]] +// CHECK: Name: .text +// CHECK: Characteristics [ +// CHECK: IMAGE_SCN_LNK_COMDAT +// CHECK: ] +// CHECK: } +// CHECK: Section { +// CHECK: Number: [[XDATA_SECNUM:[0-9]+]] +// CHECK: Name: .xdata +// CHECK: Characteristics [ +// CHECK: IMAGE_SCN_LNK_COMDAT +// CHECK: ] +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: .xdata +// CHECK: Section: .xdata ([[XDATA_SECNUM]]) +// CHECK: StorageClass: Static (0x3) +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Selection: Associative (0x5) +// CHECK: AssocSection: .text ([[TEXT_SECNUM]]) +// CHECK: } +// CHECK: } +// CHECK: ] +// CHECK: } +// CHECK: Section { +// CHECK: Number: [[PDATA_SECNUM:[0-9]+]] +// CHECK: Name: .pdata +// CHECK: Characteristics [ +// CHECK: IMAGE_SCN_LNK_COMDAT +// CHECK: ] +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: .pdata +// CHECK: Section: .pdata ([[PDATA_SECNUM]]) +// CHECK: StorageClass: Static (0x3) +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Selection: Associative (0x5) +// CHECK: AssocSection: .text ([[TEXT_SECNUM]]) +// CHECK: } +// CHECK: } +// CHECK: ] +// CHECK: } +// CHECK: ] diff --git a/test/MC/COFF/simple-fixups.s b/test/MC/COFF/simple-fixups.s index 2a74f21..cb5d764 100644 --- a/test/MC/COFF/simple-fixups.s +++ b/test/MC/COFF/simple-fixups.s @@ -1,5 +1,6 @@ -// The purpose of this test is to verify that we do not produce unneeded -// relocations when symbols are in the same section and we know their offset. +// The purpose of this test is to verify that we produce relocations for +// references to functions. Failing to do so might cause pointer-to-function +// equality to fail if /INCREMENTAL links are used. // RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s | FileCheck %s // RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -s | FileCheck %s @@ -46,4 +47,4 @@ Ltmp0: ret // CHECK: Sections [ -// CHECK-NOT: RelocationCount: {{[^0]}} +// CHECK: RelocationCount: 1 diff --git a/test/MC/COFF/symbol-fragment-offset-64.s b/test/MC/COFF/symbol-fragment-offset-64.s index deac888..05b46bb 100644 --- a/test/MC/COFF/symbol-fragment-offset-64.s +++ b/test/MC/COFF/symbol-fragment-offset-64.s @@ -117,7 +117,6 @@ _main: # @main // CHECK: Checksum: 0x0 // CHECK: Number: 1 // CHECK: Selection: 0x0 -// CHECK: Unused: (00 00 00) // CHECK: } // CHECK: } // CHECK: Symbol { @@ -135,7 +134,6 @@ _main: # @main // CHECK: Checksum: 0x0 // CHECK: Number: 2 // CHECK: Selection: 0x0 -// CHECK: Unused: (00 00 00) // CHECK: } // CHECK: } // CHECK: Symbol { @@ -150,7 +148,7 @@ _main: # @main // CHECK: Symbol { // CHECK: Name: _printf // CHECK: Value: 0 -// CHECK: Section: (0) +// CHECK: Section: IMAGE_SYM_UNDEFINED (0) // CHECK: BaseType: Null // CHECK: ComplexType: Null // CHECK: StorageClass: External @@ -159,7 +157,7 @@ _main: # @main // CHECK: Symbol { // CHECK: Name: _puts // CHECK: Value: 0 -// CHECK: Section: (0) +// CHECK: Section: IMAGE_SYM_UNDEFINED (0) // CHECK: BaseType: Null // CHECK: ComplexType: Null // CHECK: StorageClass: External diff --git a/test/MC/COFF/symbol-fragment-offset.s b/test/MC/COFF/symbol-fragment-offset.s index b09c5af..cc5040a 100644 --- a/test/MC/COFF/symbol-fragment-offset.s +++ b/test/MC/COFF/symbol-fragment-offset.s @@ -117,7 +117,6 @@ L_.str2: // CHECK: Checksum: 0x0 // CHECK: Number: 1 // CHECK: Selection: 0x0 -// CHECK: Unused: (00 00 00) // CHECK: } // CHECK: } // CHECK: Symbol { @@ -135,7 +134,6 @@ L_.str2: // CHECK: Checksum: 0x0 // CHECK: Number: 2 // CHECK: Selection: 0x0 -// CHECK: Unused: (00 00 00) // CHECK: } // CHECK: } // CHECK: Symbol { @@ -150,7 +148,7 @@ L_.str2: // CHECK: Symbol { // CHECK: Name: _printf // CHECK: Value: 0 -// CHECK: Section: (0) +// CHECK: Section: IMAGE_SYM_UNDEFINED (0) // CHECK: BaseType: Null // CHECK: ComplexType: Null // CHECK: StorageClass: External @@ -159,7 +157,7 @@ L_.str2: // CHECK: Symbol { // CHECK: Name: _puts // CHECK: Value: 0 -// CHECK: Section: (0) +// CHECK: Section: IMAGE_SYM_UNDEFINED (0) // CHECK: BaseType: Null // CHECK: ComplexType: Null // CHECK: StorageClass: External diff --git a/test/MC/COFF/weak.s b/test/MC/COFF/weak.s index accd3f4..6086749 100644 --- a/test/MC/COFF/weak.s +++ b/test/MC/COFF/weak.s @@ -37,7 +37,7 @@ LBB0_2: # %return // CHECK: Symbol { // CHECK: Name: _test_weak // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null // CHECK-NEXT: ComplexType: Null // CHECK-NEXT: StorageClass: WeakExternal @@ -45,14 +45,13 @@ LBB0_2: # %return // CHECK-NEXT: AuxWeakExternal { // CHECK-NEXT: Linked: .weak._test_weak.default // CHECK-NEXT: Search: Library -// CHECK-NEXT: Unused: (00 00 00 00 00 00 00 00 00 00) // CHECK-NEXT: } // CHECK-NEXT: } // CHECK: Symbol { // CHECK: Name: .weak._test_weak.default // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (65535) +// CHECK-NEXT: Section: IMAGE_SYM_ABSOLUTE (-1) // CHECK-NEXT: BaseType: Null // CHECK-NEXT: ComplexType: Null // CHECK-NEXT: StorageClass: External @@ -62,7 +61,7 @@ LBB0_2: # %return // CHECK: Symbol { // CHECK: Name: _test_weak_alias // CHECK-NEXT: Value: 0 -// CHECK-NEXT: Section: (0) +// CHECK-NEXT: Section: IMAGE_SYM_UNDEFINED (0) // CHECK-NEXT: BaseType: Null // CHECK-NEXT: ComplexType: Null // CHECK-NEXT: StorageClass: WeakExternal @@ -70,6 +69,5 @@ LBB0_2: # %return // CHECK-NEXT: AuxWeakExternal { // CHECK-NEXT: Linked: _main // CHECK-NEXT: Search: Library -// CHECK-NEXT: Unused: (00 00 00 00 00 00 00 00 00 00) // CHECK-NEXT: } // CHECK-NEXT: } diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index acc2d9f..e82f75a 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9-mp | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s # CHECK: addpl r4, pc, #318767104 0x4c 0x45 0x8f 0x52 diff --git a/test/MC/Disassembler/ARM/d16.txt b/test/MC/Disassembler/ARM/d16.txt new file mode 100644 index 0000000..735af81 --- /dev/null +++ b/test/MC/Disassembler/ARM/d16.txt @@ -0,0 +1,23 @@ +# RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -disassemble -mattr=+vfp4,-d16 2>&1 | FileCheck %s --check-prefix=D32 +# RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -disassemble -mattr=+vfp4,-d16 2>&1 | FileCheck %s --check-prefix=D32 + + +# D32: vadd.f64 d1, d2, d16 +# D16: warning: invalid instruction encoding +[0x32,0xee,0x20,0x1b] + +# D32: vadd.f64 d1, d17, d6 +# D16: warning: invalid instruction encoding +[0x31,0xee,0x86,0x1b] + +# D32: vadd.f64 d19, d7, d6 +# D16: warning: invalid instruction encoding +[0x77,0xee,0x06,0x3b] + +# D32: vcvt.f64.f32 d22, s4 +# D16: warning: invalid instruction encoding +[0xf7,0xee,0xc2,0x6a] + +# D32: vcvt.f32.f64 s26, d30 +# D16: warning: invalid instruction encoding +[0xb7,0xee,0xee,0xdb] diff --git a/test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt b/test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt new file mode 100644 index 0000000..26fa907 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt @@ -0,0 +1,35 @@ +# RUN: not llvm-mc -disassemble %s -triple=thumbv7em 2>&1 | FileCheck --check-prefix=CHECK %s +# RUN: not llvm-mc -disassemble %s -triple=thumbv7m 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s + +#------------------------------------------------------------------------------ +# Undefined encodings for mrs +#------------------------------------------------------------------------------ + +# invalid SYSm +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0xef 0xf3 0x80 0x80] +[0xef 0xf3 0x80 0x80] + +#------------------------------------------------------------------------------ +# Undefined encodings for msr +#------------------------------------------------------------------------------ + +# invalid mask = '00' +# CHECK: warning: potentially undefined instruction encoding +# CHECK-NEXT: [0x80 0xf3 0x00 0x80] +[0x80 0xf3 0x00 0x80] + +# invalid mask = '11' with SYSm not in {0..3} +# CHECK: warning: potentially undefined instruction encoding +# CHECK-NEXT: [0x80 0xf3 0x05 0x8c] +[0x80 0xf3 0x05 0x8c] + +# invalid mask = '01' (ThumbV7M does not have the DSP extension) +# CHECK-V7M: warning: potentially undefined instruction encoding +# CHECK-V7M-NEXT: [0x80 0xf3 0x00 0x84] +[0x80 0xf3 0x00 0x84] + +# invalid SYSm +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x80 0xf3 0x80 0x88] +[0x80 0xf3 0x80 0x88] diff --git a/test/MC/Disassembler/ARM/move-banked-regs-arm.txt b/test/MC/Disassembler/ARM/move-banked-regs-arm.txt new file mode 100644 index 0000000..dd1d463 --- /dev/null +++ b/test/MC/Disassembler/ARM/move-banked-regs-arm.txt @@ -0,0 +1,150 @@ +@ RUN: llvm-mc -disassemble -triple armv7 -mcpu=cyclone %s | FileCheck %s + + +[0x00,0x22,0x20,0xe1] +[0x00,0x32,0x21,0xe1] +[0x00,0x52,0x22,0xe1] +[0x00,0x72,0x23,0xe1] +[0x00,0xb2,0x24,0xe1] +[0x00,0x12,0x25,0xe1] +[0x00,0x22,0x26,0xe1] +@ CHECK: mrs r2, r8_usr +@ CHECK: mrs r3, r9_usr +@ CHECK: mrs r5, r10_usr +@ CHECK: mrs r7, r11_usr +@ CHECK: mrs r11, r12_usr +@ CHECK: mrs r1, sp_usr +@ CHECK: mrs r2, lr_usr + +[0x00,0x22,0x28,0xe1] +[0x00,0x32,0x29,0xe1] +[0x00,0x52,0x2a,0xe1] +[0x00,0x72,0x2b,0xe1] +[0x00,0xb2,0x2c,0xe1] +[0x00,0x12,0x2d,0xe1] +[0x00,0x22,0x2e,0xe1] +[0x00,0x32,0x6e,0xe1] +@ CHECK: mrs r2, r8_fiq +@ CHECK: mrs r3, r9_fiq +@ CHECK: mrs r5, r10_fiq +@ CHECK: mrs r7, r11_fiq +@ CHECK: mrs r11, r12_fiq +@ CHECK: mrs r1, sp_fiq +@ CHECK: mrs r2, lr_fiq +@ CHECK: mrs r3, SPSR_fiq + +[0x00,0x43,0x20,0xe1] +[0x00,0x93,0x21,0xe1] +[0x00,0x13,0x60,0xe1] +@ CHECK: mrs r4, lr_irq +@ CHECK: mrs r9, sp_irq +@ CHECK: mrs r1, SPSR_irq + +[0x00,0x13,0x22,0xe1] +[0x00,0x33,0x23,0xe1] +[0x00,0x53,0x62,0xe1] +@ CHECK: mrs r1, lr_svc +@ CHECK: mrs r3, sp_svc +@ CHECK: mrs r5, SPSR_svc + +[0x00,0x53,0x24,0xe1] +[0x00,0x73,0x25,0xe1] +[0x00,0x93,0x64,0xe1] +@ CHECK: mrs r5, lr_abt +@ CHECK: mrs r7, sp_abt +@ CHECK: mrs r9, SPSR_abt + +[0x00,0x93,0x26,0xe1] +[0x00,0xb3,0x27,0xe1] +[0x00,0xc3,0x66,0xe1] +@ CHECK: mrs r9, lr_und +@ CHECK: mrs r11, sp_und +@ CHECK: mrs r12, SPSR_und + +[0x00,0x23,0x2c,0xe1] +[0x00,0x43,0x2d,0xe1] +[0x00,0x63,0x6c,0xe1] +@ CHECK: mrs r2, lr_mon +@ CHECK: mrs r4, sp_mon +@ CHECK: mrs r6, SPSR_mon + +[0x00,0x63,0x2e,0xe1] +[0x00,0x83,0x2f,0xe1] +[0x00,0xa3,0x6e,0xe1] +@ CHECK: mrs r6, elr_hyp +@ CHECK: mrs r8, sp_hyp +@ CHECK: mrs r10, SPSR_hyp + +[0x02,0xf2,0x20,0xe1] +[0x03,0xf2,0x21,0xe1] +[0x05,0xf2,0x22,0xe1] +[0x07,0xf2,0x23,0xe1] +[0x0b,0xf2,0x24,0xe1] +[0x01,0xf2,0x25,0xe1] +[0x02,0xf2,0x26,0xe1] +@ CHECK: msr r8_usr, r2 +@ CHECK: msr r9_usr, r3 +@ CHECK: msr r10_usr, r5 +@ CHECK: msr r11_usr, r7 +@ CHECK: msr r12_usr, r11 +@ CHECK: msr sp_usr, r1 +@ CHECK: msr lr_usr, r2 + +[0x02,0xf2,0x28,0xe1] +[0x03,0xf2,0x29,0xe1] +[0x05,0xf2,0x2a,0xe1] +[0x07,0xf2,0x2b,0xe1] +[0x0b,0xf2,0x2c,0xe1] +[0x01,0xf2,0x2d,0xe1] +[0x02,0xf2,0x2e,0xe1] +[0x03,0xf2,0x6e,0xe1] +@ CHECK: msr r8_fiq, r2 +@ CHECK: msr r9_fiq, r3 +@ CHECK: msr r10_fiq, r5 +@ CHECK: msr r11_fiq, r7 +@ CHECK: msr r12_fiq, r11 +@ CHECK: msr sp_fiq, r1 +@ CHECK: msr lr_fiq, r2 +@ CHECK: msr SPSR_fiq, r3 + +[0x04,0xf3,0x20,0xe1] +[0x09,0xf3,0x21,0xe1] +[0x0b,0xf3,0x60,0xe1] +@ CHECK: msr lr_irq, r4 +@ CHECK: msr sp_irq, r9 +@ CHECK: msr SPSR_irq, r11 + +[0x01,0xf3,0x22,0xe1] +[0x03,0xf3,0x23,0xe1] +[0x05,0xf3,0x62,0xe1] +@ CHECK: msr lr_svc, r1 +@ CHECK: msr sp_svc, r3 +@ CHECK: msr SPSR_svc, r5 + +[0x05,0xf3,0x24,0xe1] +[0x07,0xf3,0x25,0xe1] +[0x09,0xf3,0x64,0xe1] +@ CHECK: msr lr_abt, r5 +@ CHECK: msr sp_abt, r7 +@ CHECK: msr SPSR_abt, r9 + +[0x09,0xf3,0x26,0xe1] +[0x0b,0xf3,0x27,0xe1] +[0x0c,0xf3,0x66,0xe1] +@ CHECK: msr lr_und, r9 +@ CHECK: msr sp_und, r11 +@ CHECK: msr SPSR_und, r12 + +[0x02,0xf3,0x2c,0xe1] +[0x04,0xf3,0x2d,0xe1] +[0x06,0xf3,0x6c,0xe1] +@ CHECK: msr lr_mon, r2 +@ CHECK: msr sp_mon, r4 +@ CHECK: msr SPSR_mon, r6 + +[0x06,0xf3,0x2e,0xe1] +[0x08,0xf3,0x2f,0xe1] +[0x0a,0xf3,0x6e,0xe1] +@ CHECK: msr elr_hyp, r6 +@ CHECK: msr sp_hyp, r8 +@ CHECK: msr SPSR_hyp, r10 diff --git a/test/MC/Disassembler/ARM/move-banked-regs-thumb.txt b/test/MC/Disassembler/ARM/move-banked-regs-thumb.txt new file mode 100644 index 0000000..29e91ab --- /dev/null +++ b/test/MC/Disassembler/ARM/move-banked-regs-thumb.txt @@ -0,0 +1,153 @@ +@ RUN: llvm-mc -disassemble -triple thumb -mcpu=cyclone %s | FileCheck %s + +[0xe0,0xf3,0x20,0x82] +[0xe1,0xf3,0x20,0x83] +[0xe2,0xf3,0x20,0x85] +[0xe3,0xf3,0x20,0x87] +[0xe4,0xf3,0x20,0x8b] +[0xe5,0xf3,0x20,0x81] +[0xe6,0xf3,0x20,0x82] +@ CHECK: mrs r2, r8_usr +@ CHECK: mrs r3, r9_usr +@ CHECK: mrs r5, r10_usr +@ CHECK: mrs r7, r11_usr +@ CHECK: mrs r11, r12_usr +@ CHECK: mrs r1, sp_usr +@ CHECK: mrs r2, lr_usr + +[0xe8,0xf3,0x20,0x82] +[0xe9,0xf3,0x20,0x83] +[0xea,0xf3,0x20,0x85] +[0xeb,0xf3,0x20,0x87] +[0xec,0xf3,0x20,0x8b] +[0xed,0xf3,0x20,0x81] +[0xee,0xf3,0x20,0x82] +[0xfe,0xf3,0x20,0x83] +@ CHECK: mrs r2, r8_fiq +@ CHECK: mrs r3, r9_fiq +@ CHECK: mrs r5, r10_fiq +@ CHECK: mrs r7, r11_fiq +@ CHECK: mrs r11, r12_fiq +@ CHECK: mrs r1, sp_fiq +@ CHECK: mrs r2, lr_fiq +@ CHECK: mrs r3, SPSR_fiq + +[0xe0,0xf3,0x30,0x84] +[0xe1,0xf3,0x30,0x89] +[0xf0,0xf3,0x30,0x81] +@ CHECK: mrs r4, lr_irq +@ CHECK: mrs r9, sp_irq +@ CHECK: mrs r1, SPSR_irq + +[0xe2,0xf3,0x30,0x81] +[0xe3,0xf3,0x30,0x83] +[0xf2,0xf3,0x30,0x85] +@ CHECK: mrs r1, lr_svc +@ CHECK: mrs r3, sp_svc +@ CHECK: mrs r5, SPSR_svc + +[0xe4,0xf3,0x30,0x85] +[0xe5,0xf3,0x30,0x87] +[0xf4,0xf3,0x30,0x89] +@ CHECK: mrs r5, lr_abt +@ CHECK: mrs r7, sp_abt +@ CHECK: mrs r9, SPSR_abt + +[0xe6,0xf3,0x30,0x89] +[0xe7,0xf3,0x30,0x8b] +[0xf6,0xf3,0x30,0x8c] +@ CHECK: mrs r9, lr_und +@ CHECK: mrs r11, sp_und +@ CHECK: mrs r12, SPSR_und + + +[0xec,0xf3,0x30,0x82] +[0xed,0xf3,0x30,0x84] +[0xfc,0xf3,0x30,0x86] +@ CHECK: mrs r2, lr_mon +@ CHECK: mrs r4, sp_mon +@ CHECK: mrs r6, SPSR_mon + + +[0xee,0xf3,0x30,0x86] +[0xef,0xf3,0x30,0x88] +[0xfe,0xf3,0x30,0x8a] +@ CHECK: mrs r6, elr_hyp +@ CHECK: mrs r8, sp_hyp +@ CHECK: mrs r10, SPSR_hyp + + +[0x82,0xf3,0x20,0x80] +[0x83,0xf3,0x20,0x81] +[0x85,0xf3,0x20,0x82] +[0x87,0xf3,0x20,0x83] +[0x8b,0xf3,0x20,0x84] +[0x81,0xf3,0x20,0x85] +[0x82,0xf3,0x20,0x86] +@ CHECK: msr r8_usr, r2 +@ CHECK: msr r9_usr, r3 +@ CHECK: msr r10_usr, r5 +@ CHECK: msr r11_usr, r7 +@ CHECK: msr r12_usr, r11 +@ CHECK: msr sp_usr, r1 +@ CHECK: msr lr_usr, r2 + +[0x82,0xf3,0x20,0x88] +[0x83,0xf3,0x20,0x89] +[0x85,0xf3,0x20,0x8a] +[0x87,0xf3,0x20,0x8b] +[0x8b,0xf3,0x20,0x8c] +[0x81,0xf3,0x20,0x8d] +[0x82,0xf3,0x20,0x8e] +[0x93,0xf3,0x20,0x8e] +@ CHECK: msr r8_fiq, r2 +@ CHECK: msr r9_fiq, r3 +@ CHECK: msr r10_fiq, r5 +@ CHECK: msr r11_fiq, r7 +@ CHECK: msr r12_fiq, r11 +@ CHECK: msr sp_fiq, r1 +@ CHECK: msr lr_fiq, r2 +@ CHECK: msr SPSR_fiq, r3 + +[0x84,0xf3,0x30,0x80] +[0x89,0xf3,0x30,0x81] +[0x9b,0xf3,0x30,0x80] +@ CHECK: msr lr_irq, r4 +@ CHECK: msr sp_irq, r9 +@ CHECK: msr SPSR_irq, r11 + +[0x81,0xf3,0x30,0x82] +[0x83,0xf3,0x30,0x83] +[0x95,0xf3,0x30,0x82] +@ CHECK: msr lr_svc, r1 +@ CHECK: msr sp_svc, r3 +@ CHECK: msr SPSR_svc, r5 + +[0x85,0xf3,0x30,0x84] +[0x87,0xf3,0x30,0x85] +[0x99,0xf3,0x30,0x84] +@ CHECK: msr lr_abt, r5 +@ CHECK: msr sp_abt, r7 +@ CHECK: msr SPSR_abt, r9 + +[0x89,0xf3,0x30,0x86] +[0x8b,0xf3,0x30,0x87] +[0x9c,0xf3,0x30,0x86] +@ CHECK: msr lr_und, r9 +@ CHECK: msr sp_und, r11 +@ CHECK: msr SPSR_und, r12 + + +[0x82,0xf3,0x30,0x8c] +[0x84,0xf3,0x30,0x8d] +[0x96,0xf3,0x30,0x8c] +@ CHECK: msr lr_mon, r2 +@ CHECK: msr sp_mon, r4 +@ CHECK: msr SPSR_mon, r6 + +[0x86,0xf3,0x30,0x8e] +[0x88,0xf3,0x30,0x8f] +[0x9a,0xf3,0x30,0x8e] +@ CHECK: msr elr_hyp, r6 +@ CHECK: msr sp_hyp, r8 +@ CHECK: msr SPSR_hyp, r10 diff --git a/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt b/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt index 497cb9a..c1a2790 100644 --- a/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt +++ b/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt @@ -1,7 +1,94 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu cortex-m3 | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=thumbv7em | FileCheck %s -# CHECK: msr primask, r0 -0x80 0xf3 0x10 0x80 +#------------------------------------------------------------------------------ +# MRS +#------------------------------------------------------------------------------ -# CHECK: mrs r0, primask +# CHECK: mrs r0, apsr +# CHECK: mrs r0, iapsr +# CHECK: mrs r0, eapsr +# CHECK: mrs r0, xpsr +# CHECK: mrs r0, ipsr +# CHECK: mrs r0, epsr +# CHECK: mrs r0, iepsr +# CHECK: mrs r0, msp +# CHECK: mrs r0, psp +# CHECK: mrs r0, primask +# CHECK: mrs r0, basepri +# CHECK: mrs r0, basepri_max +# CHECK: mrs r0, faultmask +# CHECK: mrs r0, control + +0xef 0xf3 0x00 0x80 +0xef 0xf3 0x01 0x80 +0xef 0xf3 0x02 0x80 +0xef 0xf3 0x03 0x80 +0xef 0xf3 0x05 0x80 +0xef 0xf3 0x06 0x80 +0xef 0xf3 0x07 0x80 +0xef 0xf3 0x08 0x80 +0xef 0xf3 0x09 0x80 0xef 0xf3 0x10 0x80 +0xef 0xf3 0x11 0x80 +0xef 0xf3 0x12 0x80 +0xef 0xf3 0x13 0x80 +0xef 0xf3 0x14 0x80 + + +#------------------------------------------------------------------------------ +# MSR +#------------------------------------------------------------------------------ + +# CHECK: msr apsr_nzcvq, r0 +# CHECK: msr apsr_g, r0 +# CHECK: msr apsr_nzcvqg, r0 + +0x80 0xf3 0x00 0x88 +0x80 0xf3 0x00 0x84 +0x80 0xf3 0x00 0x8c + +# CHECK: msr iapsr_nzcvq, r0 +# CHECK: msr iapsr_g, r0 +# CHECK: msr iapsr_nzcvqg, r0 + +0x80 0xf3 0x01 0x88 +0x80 0xf3 0x01 0x84 +0x80 0xf3 0x01 0x8c + +# CHECK: msr eapsr_nzcvq, r0 +# CHECK: msr eapsr_g, r0 +# CHECK: msr eapsr_nzcvqg, r0 + +0x80 0xf3 0x02 0x88 +0x80 0xf3 0x02 0x84 +0x80 0xf3 0x02 0x8c + +# CHECK: msr xpsr_nzcvq, r0 +# CHECK: msr xpsr_g, r0 +# CHECK: msr xpsr_nzcvqg, r0 + +0x80 0xf3 0x03 0x88 +0x80 0xf3 0x03 0x84 +0x80 0xf3 0x03 0x8c + +# CHECK: msr ipsr, r0 +# CHECK: msr epsr, r0 +# CHECK: msr iepsr, r0 +# CHECK: msr msp, r0 +# CHECK: msr psp, r0 +# CHECK: msr primask, r0 +# CHECK: msr basepri, r0 +# CHECK: msr basepri_max, r0 +# CHECK: msr faultmask, r0 +# CHECK: msr control, r0 + +0x80 0xf3 0x05 0x88 +0x80 0xf3 0x06 0x88 +0x80 0xf3 0x07 0x88 +0x80 0xf3 0x08 0x88 +0x80 0xf3 0x09 0x88 +0x80 0xf3 0x10 0x88 +0x80 0xf3 0x11 0x88 +0x80 0xf3 0x12 0x88 +0x80 0xf3 0x13 0x88 +0x80 0xf3 0x14 0x88 diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt index df2bac1..dcb6e3f 100644 --- a/test/MC/Disassembler/ARM/thumb-tests.txt +++ b/test/MC/Disassembler/ARM/thumb-tests.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu=cortex-a9-mp | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s # CHECK: add r5, sp, #68 0x11 0xad diff --git a/test/MC/Disassembler/ARM/thumb2-preloads.txt b/test/MC/Disassembler/ARM/thumb2-preloads.txt new file mode 100644 index 0000000..dec4d64 --- /dev/null +++ b/test/MC/Disassembler/ARM/thumb2-preloads.txt @@ -0,0 +1,69 @@ +# RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 +# RUN: not llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=-mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7 +# RUN: llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=+mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7 --check-prefix=MP +# RUN: not llvm-mc -triple=thumbv7m-none-eabi -disassemble < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7 + +# RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR --check-prefix=V7-ERR +# RUN: not llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=-mp < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR +# RUN: llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=+mp < %s 2>&1 >/dev/null +# RUN: not llvm-mc -triple=thumbv7m-none-eabi -disassemble < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR + +# V6T2: pld [r1, #3] +[0x91,0xf8,0x03,0xf0] + +# V6T2: pld [r2, #-5] +[0x12,0xf8,0x05,0xfc] + +# MP: pldw [r3, #4] +# MP-ERR: invalid instruction encoding +# MP-ERR-NEXT: [0xb3,0xf8,0x04,0xf0] +[0xb3,0xf8,0x04,0xf0] + +# MP: pldw [r4, #-6] +# MP-ERR: invalid instruction encoding +# MP-ERR-NEXT: [0x34,0xf8,0x06,0xfc] +[0x34,0xf8,0x06,0xfc] + +# V6T2: pld [pc, #8] +[0x9f,0xf8,0x08,0xf0] + +# V6T2: pld [pc, #-5] +[0x1f,0xf8,0x05,0xf0] + +# V6T2: pld [r5, r6] +[0x15,0xf8,0x06,0xf0] + +# V6T2: pld [r7, r8, lsl #1] +[0x17,0xf8,0x18,0xf0] + +# MP: pldw [r9, r10] +# MP-ERR: invalid instruction encoding +# MP-ERR-NEXT: [0x39,0xf8,0x0a,0xf0] +[0x39,0xf8,0x0a,0xf0] + +# MP: pldw [r11, r12, lsl #2] +# MP-ERR: invalid instruction encoding +# MP-ERR-NEXT: [0x3b,0xf8,0x2c,0xf0] +[0x3b,0xf8,0x2c,0xf0] + +# V7: pli [r1, #10] +# V7-ERR: invalid instruction encoding +# V7-ERR-NEXT: [0x91,0xf9,0x0a,0xf0] +[0x91,0xf9,0x0a,0xf0] + +# V7: pli [r2, #-3] +# V7-ERR: invalid instruction encoding +# V7-ERR-NEXT: [0x12,0xf9,0x03,0xfc] +[0x12,0xf9,0x03,0xfc] + +# V7: pli [pc, #6] +# V7-ERR: invalid instruction encoding +# V7-ERR-NEXT: [0x9f,0xf9,0x06,0xf0] +[0x9f,0xf9,0x06,0xf0] + +# V7: pli [pc, #-8] +# V7-ERR: invalid instruction encoding +# V7-ERR-NEXT: [0x1f,0xf9,0x08,0xf0] +[0x1f,0xf9,0x08,0xf0] + +# NO-ERR-NOT: invalid instruction encoding diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt index 1458ce2..6464824 100644 --- a/test/MC/Disassembler/Mips/micromips.txt +++ b/test/MC/Disassembler/Mips/micromips.txt @@ -294,3 +294,30 @@ # CHECK: sc $2, 8($4) 0x60 0x44 0xb0 0x08 + +# CHECK: lwxs $2, $3($4) +0x00 0x64 0x11 0x18 + +# CHECK: bgezals $6, 1332 +0x42 0x66 0x02 0x9a + +# CHECK: bltzals $6, 1332 +0x42 0x26 0x02 0x9a + +# CHECK: beqzc $9, 1332 +0x40 0xe9 0x02 0x9a + +# CHECK: bnezc $9, 1332 +0x40 0xa9 0x02 0x9a + +# CHECK: jals 1328 +0x74 0x00 0x02 0x98 + +# CHECK: jalrs $ra, $6 +0x03 0xe6 0x4f 0x3c + +# CHECK: lwm32 $16, $17, 8($4) +0x20 0x44 0x50 0x08 + +# CHECK: swm32 $16, $17, 8($4) +0x20 0x44 0xd0 0x08 diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt index bdfe88e..d4dbc46 100644 --- a/test/MC/Disassembler/Mips/micromips_le.txt +++ b/test/MC/Disassembler/Mips/micromips_le.txt @@ -294,3 +294,30 @@ # CHECK: sc $2, 8($4) 0x44 0x60 0x08 0xb0 + +# CHECK: lwxs $2, $3($4) +0x64 0x00 0x18 0x11 + +# CHECK: bgezals $6, 1332 +0x66 0x42 0x9a 0x02 + +# CHECK: bltzals $6, 1332 +0x26 0x42 0x9a 0x02 + +# CHECK: beqzc $9, 1332 +0xe9 0x40 0x9a 0x02 + +# CHECK: bnezc $9, 1332 +0xa9 0x40 0x9a 0x02 + +# CHECK: jals 1328 +0x00 0x74 0x98 0x02 + +# CHECK: jalrs $ra, $6 +0xe6 0x03 0x3c 0x4f + +# CHECK: lwm32 $16, $17, 8($4) +0x44 0x20 0x08 0x50 + +# CHECK: swm32 $16, $17, 8($4) +0x44 0x20 0x08 0xd0 diff --git a/test/MC/Disassembler/Mips/mips2.txt b/test/MC/Disassembler/Mips/mips2.txt new file mode 100644 index 0000000..a604055 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips2.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips2 | FileCheck %s + +# CHECK: sdc3 $5, 9154($6) +0xfc 0xc5 0x23 0xc2 + +# CHECK: swc3 $6, 9158($7) +0xec 0xe6 0x23 0xc6 + +# CHECK: ldc3 $7, 9162($8) +0xdd 0x07 0x23 0xca + +# CHECK: lwc3 $8, 9166($9) +0xcd 0x28 0x23 0xce diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt index bfb145e..bd4ae4d 100644 --- a/test/MC/Disassembler/Mips/mips32.txt +++ b/test/MC/Disassembler/Mips/mips32.txt @@ -1,4 +1,5 @@ # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s + # CHECK: abs.d $f12, $f14 0x46 0x20 0x73 0x05 @@ -436,3 +437,15 @@ # CHECK: rdhwr $5, $29 # CHECK: .set pop 0x7c 0x05 0xe8 0x3b + +# CHECK: cache 1, 2($3) +0xbc 0x61 0x00 0x02 + +# CHECK: pref 3, 4($2) +0xcc 0x43 0x00 0x04 + +# CHECK: swc2 $9, 9158($7) +0xe8 0xe9 0x23 0xc6 + +# CHECK: lwc2 $8, 9162($6) +0xc8 0xc8 0x23 0xca diff --git a/test/MC/Disassembler/Mips/mips64.txt b/test/MC/Disassembler/Mips/mips64.txt index f3d2d10..d494df6 100644 --- a/test/MC/Disassembler/Mips/mips64.txt +++ b/test/MC/Disassembler/Mips/mips64.txt @@ -85,3 +85,9 @@ # CHECK: sdxc1 $f8, $4($25) 0x4f 0x24 0x40 0x09 + +# CHECK: sdc2 $9, 9158($7) +0xf8 0xe9 0x23 0xc6 + +# CHECK: ldc2 $3, 9162($8) +0xd9 0x03 0x23 0xca diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt new file mode 100644 index 0000000..92e88f8 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt @@ -0,0 +1,26 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: mfdcr 3, 178 +0x7c 0x72 0x2a 0x86 +# CHECK: mtdcr 178, 3 +0x7c 0x72 0x2b 0x86 + +# CHECK: tlbre 2, 3, 0 +0x7c 0x43 0x07 0x64 +# CHECK: tlbre 2, 3, 1 +0x7c 0x43 0x0f 0x64 + +# CHECK: tlbwe 2, 3, 0 +0x7c 0x43 0x07 0xa4 +# CHECK: tlbwe 2, 3, 1 +0x7c 0x43 0x0f 0xa4 + +# CHECK: tlbsx 2, 3, 1 +0x7c 0x43 0x0f 0x24 +# CHECK: tlbsx. 2, 3, 1 +0x7c 0x43 0x0f 0x25 + +# CHECK: dccci 5, 6 +0x7c 0x05 0x33 0x8c +# CHECK: iccci 5, 6 +0x7c 0x05 0x37 0x8c diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-6xx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-6xx.txt new file mode 100644 index 0000000..7276847 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-6xx.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: tlbld 4 +0x7c 0x00 0x27 0xa4 +# CHECK: tlbli 4 +0x7c 0x00 0x27 0xe4 diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt index 5e6033d..7a30b5c 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt @@ -3,6 +3,9 @@ # CHECK: icbi 2, 3 0x7c 0x02 0x1f 0xac +# CHECK: icbt 0, 5, 31 +0x7c 0x05 0xf8 0x2c + # CHECK: dcbt 2, 3 0x7c 0x02 0x1a 0x2c @@ -33,6 +36,9 @@ # CHECK: wait 2 0x7c 0x40 0x00 0x7c +# CHECK: mbar 1 +0x7c 0x20 0x06 0xac + # CHECK: dcbf 2, 3 0x7c 0x02 0x18 0xac diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt index c5d6155..7996ed1 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookIII.txt @@ -105,3 +105,23 @@ # CHECK: tlbie 4,0 0x7c 0x00 0x22 0x64 +# CHECK: rfi +0x4c 0x00 0x00 0x64 +# CHECK: rfci +0x4c 0x00 0x00 0x66 + +# CHECK: wrtee 12 +0x7d 0x80 0x01 0x06 +# CHECK: wrteei 0 +0x7c 0x00 0x01 0x46 +# CHECK: wrteei 1 +0x7c 0x00 0x81 0x46 + +# CHECK: tlbre +0x7c 0x00 0x07 0x64 +# CHECK: tlbwe +0x7c 0x00 0x07 0xa4 +# CHECK: tlbivax 11, 12 +0x7c 0x0b 0x66 0x24 +# CHECK: tlbsx 11, 12 +0x7c 0x0b 0x67 0x24 diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt new file mode 100644 index 0000000..ef013d7 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt @@ -0,0 +1,7 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: rfdi +0x4c 0x00 0x00 0x4e +# CHECK: rfmci +0x4c 0x00 0x00 0x4c + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt index 108df30..3c2f935 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt @@ -2251,3 +2251,26 @@ # CHECK: mtcrf 255, 2 0x7c 0x4f 0xf1 0x20 +# CHECK: dss 3 +0x7c 0x60 0x06 0x6c +# CHECK: dssall +0x7e 0x00 0x06 0x6c +# CHECK: dst 12, 11, 3 +0x7c 0x6c 0x5a 0xac +# CHECK: dstt 12, 11, 3 +0x7e 0x6c 0x5a 0xac +# CHECK: dstst 12, 11, 3 +0x7c 0x6c 0x5a 0xec +# CHECK: dststt 12, 11, 3 +0x7e 0x6c 0x5a 0xec + +# CHECK: tlbia +0x7c 0x00 0x02 0xe4 + +# CHECK: lswi 8, 6, 7 +0x7d 0x06 0x3c 0xaa +# CHECK: stswi 8, 6, 7 +0x7d 0x06 0x3d 0xaa + +# CHECK: rfid +0x4c 0x00 0x00 0x24 diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt index 33a8c0e..2e2e7c1 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding.txt @@ -619,3 +619,7 @@ # CHECK: mfocrf 16, 8 0x7e 0x10 0x80 0x26 +# CHECK: mtsrin 10, 12 +0x7d 0x40 0x61 0xe4 +# CHECK: mfsrin 10, 12 +0x7d 0x40 0x65 0x26 diff --git a/test/MC/Disassembler/X86/avx-512.txt b/test/MC/Disassembler/X86/avx-512.txt index b1a8aaf..62fc35b 100644 --- a/test/MC/Disassembler/X86/avx-512.txt +++ b/test/MC/Disassembler/X86/avx-512.txt @@ -1,4 +1,5 @@ # RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -mcpu=knl | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -mcpu=skx | FileCheck --check-prefix=CHECK-SKX %s # CHECK: vpbroadcastd %xmm18, %zmm28 {%k7} {z} 0x62 0x22 0x7d 0xcf 0x58 0xe2 @@ -13,7 +14,13 @@ 0x62 0x32 0xed 0x48 0x16 0x04 0x96 # CHECK: vpbroadcastmw2d %k2, %zmm8 -0x62 0xd2 0x7e 0x48 0x3a 0xd0 +0x62 0x72 0x7e 0x48 0x3a 0xc2 + +# CHECK-SKX: vpbroadcastmw2d %k2, %xmm8 +0x62 0x72 0x7e 0x08 0x3a 0xc2 + +# CHECK-SKX: vpbroadcastmw2d %k2, %ymm8 +0x62 0x72 0x7e 0x28 0x3a 0xc2 # CHECK: vpbroadcastq (%r9,%rax), %zmm28 0x62 0x42 0xfd 0x48 0x59 0x24 0x01 @@ -63,3 +70,42 @@ # CHECK: kmovw %k5, %k1 0xc5 0xf8 0x90 0xcd + +##################################################### +# COMPRESSED DISPLACEMENT # +##################################################### + +# TupleType = FVM +# CHECK: vmovdqu32 %zmm0, -448(%rcx) +0x62 0xf1 0x7e 0x48 0x7f 0x41 0xf9 + +# TupleType = T1S, 64-bit eltsize +# CHECK: vaddsd 256(%rdx), %xmm0, %xmm16 +0x62 0xe1 0xff 0x08 0x58 0x42 0x20 + +# TupleType = T1S, 32-bit eltsize +# CHECK: vaddss 256(%rdx), %xmm0, %xmm16 +0x62 0xe1 0x7e 0x08 0x58 0x42 0x40 + +# TupleType = FV +# CHECK: vaddpd 256(%rdx), %zmm0, %zmm16 +0x62 0xe1 0xfd 0x48 0x58 0x42 0x04 + +# TupleType = FV, broadcast, 64-bit eltsize +# CHECK: vaddpd 256(%rdx){1to8}, %zmm0, %zmm16 +0x62 0xe1 0xfd 0x58 0x58 0x42 0x20 + +# TupleType = FV, broadcast, 32-bit eltsize +# CHECK: vaddps 256(%rdx){1to16}, %zmm0, %zmm16 +0x62 0xe1 0x7c 0x58 0x58 0x42 0x40 + +# TupleType = T4 +# CHECK: vbroadcasti32x4 256(%rdx), %zmm16 +0x62 0xe2 0x7d 0x48 0x5a 0x42 0x10 + +# Cases where we can't use cdisp8 +# CHECK: vaddss 255(%rdx), %xmm0, %xmm16 +0x62 0xe1 0x7e 0x08 0x58 0x82 0xff 0x00 0x00 0x00 + +# CHECK: vaddss 1024(%rdx), %xmm0, %xmm16 +0x62 0xe1 0x7e 0x08 0x58 0x82 0x00 0x04 0x00 0x00 diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index c9c5086..79577c6 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -711,3 +711,6 @@ # CHECK: movq %mm0, %mm1 0x0f 0x7f 0xc1 + +# CHECK: vpermq $-18, %ymm2, %ymm2 +0xc4 0xe3 0xfd 0x00 0xd2 0xee diff --git a/test/MC/ELF/cfi-version.ll b/test/MC/ELF/cfi-version.ll index 10daa1d..2938dc7 100644 --- a/test/MC/ELF/cfi-version.ll +++ b/test/MC/ELF/cfi-version.ll @@ -22,17 +22,17 @@ attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "n !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} -!0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.5.0 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !"", i32 1} ; [ DW_TAG_compile_unit ] [/tmp/test.c] [DW_LANG_C99] +!0 = metadata !{metadata !"0x11\0012\00clang version 3.5.0 \000\00\000\00\001", metadata !1, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2} ; [ DW_TAG_compile_unit ] [/tmp/test.c] [DW_LANG_C99] !1 = metadata !{metadata !"test.c", metadata !"/tmp"} !2 = metadata !{} !3 = metadata !{metadata !4} -!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"foo", metadata !"foo", metadata !"", i32 2, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @foo, null, null, metadata !2, i32 2} ; [ DW_TAG_subprogram ] [line 2] [def] [foo] -!5 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] [/tmp/test.c] -!6 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!4 = metadata !{metadata !"0x2e\00foo\00foo\00\002\000\001\000\006\00256\000\002", metadata !1, metadata !5, metadata !6, null, i32 ()* @foo, null, null, metadata !2} ; [ DW_TAG_subprogram ] [line 2] [def] [foo] +!5 = metadata !{metadata !"0x29", metadata !1} ; [ DW_TAG_file_type ] [/tmp/test.c] +!6 = metadata !{metadata !"0x15\00\000\000\000\000\000\000", i32 0, null, null, metadata !7, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !7 = metadata !{metadata !8} -!8 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!8 = metadata !{metadata !"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !9 = metadata !{i32 2, metadata !"Dwarf Version", i32 4} -!10 = metadata !{i32 1, metadata !"Debug Info Version", i32 1} +!10 = metadata !{i32 1, metadata !"Debug Info Version", i32 2} !11 = metadata !{metadata !"clang version 3.5.0 "} !12 = metadata !{i32 2, i32 0, metadata !4, null} diff --git a/test/MC/ELF/comdat.s b/test/MC/ELF/comdat.s index 68b0f32..4796675 100644 --- a/test/MC/ELF/comdat.s +++ b/test/MC/ELF/comdat.s @@ -1,6 +1,6 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t | FileCheck %s -// Test that we produce the group sections and that they are a the beginning +// Test that we produce the group sections and that they are at the beginning // of the file. // CHECK: Section { @@ -41,7 +41,7 @@ // CHECK-NEXT: Offset: 0x54 // CHECK-NEXT: Size: 12 // CHECK-NEXT: Link: 13 -// CHECK-NEXT: Info: 13 +// CHECK-NEXT: Info: 10 // CHECK-NEXT: AddressAlignment: 4 // CHECK-NEXT: EntrySize: 4 // CHECK-NEXT: } diff --git a/test/MC/ELF/reloc-same-name-section.s b/test/MC/ELF/reloc-same-name-section.s new file mode 100644 index 0000000..e63ea54 --- /dev/null +++ b/test/MC/ELF/reloc-same-name-section.s @@ -0,0 +1,31 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o - | llvm-readobj -r --expand-relocs | FileCheck %s + +// test that we produce one relocation against each section. + +// CHECK: Relocations [ +// CHECK-NEXT: Section {{.*}} { +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: +// CHECK-NEXT: Type: +// CHECK-NEXT: Symbol: .foo (7) +// CHECK-NEXT: Addend: +// CHECK-NEXT: } +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: +// CHECK-NEXT: Type: +// CHECK-NEXT: Symbol: .foo (8) +// CHECK-NEXT: Addend: +// CHECK-NEXT: } +// CHECK-NEXT: } +// CHECK-NEXT: ] + + .section .foo,"aG",@progbits,v,comdat +f: + + .section .foo,"a",@progbits +g: + + + .section .bar + .quad f + .quad g diff --git a/test/MC/ELF/section-sym-err.s b/test/MC/ELF/section-sym-err.s new file mode 100644 index 0000000..789fee7 --- /dev/null +++ b/test/MC/ELF/section-sym-err.s @@ -0,0 +1,6 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t.o 2>&1 | FileCheck %s + +.section foo +foo: + +// CHECK: error: invalid symbol redefinition diff --git a/test/MC/ELF/section-sym.s b/test/MC/ELF/section-sym.s new file mode 100644 index 0000000..3b76d81 --- /dev/null +++ b/test/MC/ELF/section-sym.s @@ -0,0 +1,91 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t -r --expand-relocs | FileCheck %s + +.section foo, "aG", @progbits, f1, comdat +.section foo, "G", @progbits, f2, comdat +.section bar +.long foo + +// Test that the relocation points to the first section foo. + +// The first seciton foo has index 6 +// CHECK: Section { +// CHECK: Index: 6 +// CHECK-NEXT: Name: foo (28) +// CHECK-NEXT: Type: SHT_PROGBITS (0x1) +// CHECK-NEXT: Flags [ (0x202) +// CHECK-NEXT: SHF_ALLOC (0x2) +// CHECK-NEXT: SHF_GROUP (0x200) +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 7 +// CHECK-NEXT: Name: foo (28) +// CHECK-NEXT: Type: SHT_PROGBITS (0x1) +// CHECK-NEXT: Flags [ (0x200) +// CHECK-NEXT: SHF_GROUP (0x200) +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } + +// The relocation points to symbol 6 +// CHECK: Relocations [ +// CHECK-NEXT: Section (9) .relabar { +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x0 +// CHECK-NEXT: Type: R_X86_64_32 (10) +// CHECK-NEXT: Symbol: foo (6) +// CHECK-NEXT: Addend: 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: } +// CHECK-NEXT: ] + + +// The symbol 6 corresponds section 6 +// CHECK: Symbols [ + +// symbol 0 +// CHECK-NOT: Name +// CHECK: Name: + +// symbol 1 +// CHECK-NOT: Name +// CHECK: Name: f1 + +// symbol 2 +// CHECK-NOT: Name +// CHECK: Name: f2 + +// symbol 3 +// CHECK-NOT: Name +// CHECK: Name: .text + +// symbol 4 +// CHECK-NOT: Name +// CHECK: Name: .data + +// symbol 5 +// CHECK-NOT: Name +// CHECK: Name: .bss + +// symbol 6 +// CHECK-NOT: Name +// CHECK: Name: foo +// CHECK: Section: foo (0x6) + +// symbol 7 +// CHECK-NOT: Name +// CHECK: Name: foo +// CHECK: Section: foo (0x7) diff --git a/test/MC/ELF/section-sym2.s b/test/MC/ELF/section-sym2.s new file mode 100644 index 0000000..acdb7d9 --- /dev/null +++ b/test/MC/ELF/section-sym2.s @@ -0,0 +1,28 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t -r --expand-relocs | FileCheck %s + +// Test that we can forward reference a section. + +mov .rodata, %rsi +.section .rodata + +// CHECK:Relocations [ +// CHECK: Section (2) .rela.text { +// CHECK: Relocation { +// CHECK: Offset: 0x4 +// CHECK: Type: R_X86_64_32S (11) +// CHECK: Symbol: .rodata +// CHECK: Addend: 0x0 +// CHECK: } +// CHECK: } +// CHECK:] + +// There is only one .rodata symbol + +// CHECK:Symbols [ +// CHECK-NOT: Name: .rodata +// CHECK: Name: .rodata +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local (0x0) +// CHECK-NEXT: Type: Section (0x3) +// CHECK-NOT: Name: .rodata diff --git a/test/MC/Hexagon/basic.ll b/test/MC/Hexagon/basic.ll new file mode 100644 index 0000000..8a5d2e6 --- /dev/null +++ b/test/MC/Hexagon/basic.ll @@ -0,0 +1,7 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-readobj -h -r | FileCheck -check-prefix=OBJ %s + +; OBJ: Format: ELF32-hexagon +; OBJ: Arch: hexagon +; OBJ: AddressSize: 32bit +; OBJ: Machine: EM_HEXAGON diff --git a/test/MC/Hexagon/inst_add.ll b/test/MC/Hexagon/inst_add.ll new file mode 100644 index 0000000..5377d94 --- /dev/null +++ b/test/MC/Hexagon/inst_add.ll @@ -0,0 +1,10 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-objdump -s - | FileCheck %s + +define i32 @foo (i32 %a, i32 %b) +{ + %1 = add i32 %a, %b + ret i32 %1 +} + +; CHECK: 0000 004100f3 00c09f52
\ No newline at end of file diff --git a/test/MC/Hexagon/inst_and.ll b/test/MC/Hexagon/inst_and.ll new file mode 100644 index 0000000..16bf304 --- /dev/null +++ b/test/MC/Hexagon/inst_and.ll @@ -0,0 +1,10 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-objdump -s - | FileCheck %s + +define i32 @foo (i32 %a, i32 %b) +{ + %1 = and i32 %a, %b + ret i32 %1 +} + +; CHECK: 0000 004100f1 00c09f52
\ No newline at end of file diff --git a/test/MC/Hexagon/inst_or.ll b/test/MC/Hexagon/inst_or.ll new file mode 100644 index 0000000..fe8152b --- /dev/null +++ b/test/MC/Hexagon/inst_or.ll @@ -0,0 +1,10 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-objdump -s - | FileCheck %s + +define i32 @foo (i32 %a, i32 %b) +{ + %1 = or i32 %a, %b + ret i32 %1 +} + +; CHECK: 0000 004120f1 00c09f52
\ No newline at end of file diff --git a/test/MC/Hexagon/inst_sub.ll b/test/MC/Hexagon/inst_sub.ll new file mode 100644 index 0000000..7523aa6 --- /dev/null +++ b/test/MC/Hexagon/inst_sub.ll @@ -0,0 +1,10 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-objdump -s - | FileCheck %s + +define i32 @foo (i32 %a, i32 %b) +{ + %1 = sub i32 %a, %b + ret i32 %1 +} + +; CHECK: 0000 004021f3 00c09f52
\ No newline at end of file diff --git a/test/MC/Hexagon/inst_xor.ll b/test/MC/Hexagon/inst_xor.ll new file mode 100644 index 0000000..fe989e5 --- /dev/null +++ b/test/MC/Hexagon/inst_xor.ll @@ -0,0 +1,10 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-objdump -s - | FileCheck %s + +define i32 @foo (i32 %a, i32 %b) +{ + %1 = xor i32 %a, %b + ret i32 %1 +} + +; CHECK: 0000 004160f1 00c09f52
\ No newline at end of file diff --git a/test/MC/Hexagon/lit.local.cfg b/test/MC/Hexagon/lit.local.cfg new file mode 100644 index 0000000..ba72ff6 --- /dev/null +++ b/test/MC/Hexagon/lit.local.cfg @@ -0,0 +1,3 @@ +if not 'Hexagon' in config.root.targets: + config.unsupported = True + diff --git a/test/MC/MachO/ARM/aliased-symbols.s b/test/MC/MachO/ARM/aliased-symbols.s index 0b4463d..e87b81c 100644 --- a/test/MC/MachO/ARM/aliased-symbols.s +++ b/test/MC/MachO/ARM/aliased-symbols.s @@ -70,7 +70,7 @@ Ltmp0: // alias_to_local is an alias, but what it points to has no // MachO representation. We must resolve it. // CHECK: Symbol { -// CHECK-NEXT: Name: alias_to_local (37) +// CHECK-NEXT: Name: alias_to_local (42) // CHECK-NEXT: Type: Section (0xE) // CHECK-NEXT: Section: (0x0) // CHECK-NEXT: RefType: UndefinedNonLazy (0x0) @@ -93,7 +93,7 @@ Ltmp0: // var1 was another alias to an unknown variable. Not extern this time. // CHECK: Symbol { -// CHECK-NEXT: Name: var1 (1) +// CHECK-NEXT: Name: var1 (89) // CHECK-NEXT: Type: Indirect (0xA) // CHECK-NEXT: Section: (0x0) // CHECK-NEXT: RefType: UndefinedNonLazy (0x0) diff --git a/test/MC/MachO/ARM/darwin-ARM-reloc.s b/test/MC/MachO/ARM/darwin-ARM-reloc.s index b98c80c..374f880 100644 --- a/test/MC/MachO/ARM/darwin-ARM-reloc.s +++ b/test/MC/MachO/ARM/darwin-ARM-reloc.s @@ -110,10 +110,10 @@ Lsc0_0: @ CHECK: ('nsyms', 4) @ CHECK: ('stroff', 488) @ CHECK: ('strsize', 24) -@ CHECK: ('_string_data', '\x00_printf\x00_f0\x00_f1\x00_d0\x00\x00\x00\x00') +@ CHECK: ('_string_data', '\x00_printf\x00_f1\x00_f0\x00_d0\x00\x00\x00\x00') @ CHECK: ('_symbols', [ @ CHECK: # Symbol 0 -@ CHECK: (('n_strx', 9) +@ CHECK: (('n_strx', 13) @ CHECK: ('n_type', 0xe) @ CHECK: ('n_sect', 1) @ CHECK: ('n_desc', 0) @@ -121,7 +121,7 @@ Lsc0_0: @ CHECK: ('_string', '_f0') @ CHECK: ), @ CHECK: # Symbol 1 -@ CHECK: (('n_strx', 13) +@ CHECK: (('n_strx', 9) @ CHECK: ('n_type', 0xe) @ CHECK: ('n_sect', 1) @ CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/ARM/ios-version-min-load-command.s b/test/MC/MachO/ARM/ios-version-min-load-command.s index e065d14..9f63c9b 100644 --- a/test/MC/MachO/ARM/ios-version-min-load-command.s +++ b/test/MC/MachO/ARM/ios-version-min-load-command.s @@ -6,5 +6,5 @@ // CHECK: (('command', 37) // CHECK: ('size', 16) // CHECK: ('version, 6490119) -// CHECK: ('reserved, 0) +// CHECK: ('sdk, 0) // CHECK: ), diff --git a/test/MC/MachO/absolute.s b/test/MC/MachO/absolute.s index 784e32a..0b22afb 100644 --- a/test/MC/MachO/absolute.s +++ b/test/MC/MachO/absolute.s @@ -63,10 +63,10 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('nsyms', 8) // CHECK: ('stroff', 420) // CHECK: ('strsize', 84) -// CHECK: ('_string_data', '\x00foo_set1_global\x00foo_set2_global\x00_bar\x00_foo\x00foo_set1\x00foo_set2\x00foo_equals\x00foo_equals2\x00') +// CHECK: ('_string_data', '\x00foo_equals\x00_bar\x00_foo\x00foo_set2_global\x00foo_set1_global\x00foo_set2\x00foo_equals2\x00foo_set1\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 33) +// CHECK: (('n_strx', 12) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -74,7 +74,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', '_bar') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 38) +// CHECK: (('n_strx', 17) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -82,7 +82,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', '_foo') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 43) +// CHECK: (('n_strx', 75) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 32) @@ -90,7 +90,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', 'foo_set1') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 52) +// CHECK: (('n_strx', 54) // CHECK: ('n_type', 0x2) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 32) @@ -98,7 +98,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', 'foo_set2') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 61) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -106,7 +106,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', 'foo_equals') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 72) +// CHECK: (('n_strx', 63) // CHECK: ('n_type', 0x2) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -114,7 +114,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', 'foo_equals2') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 38) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 32) @@ -122,7 +122,7 @@ foo_equals2 = (_foo - _bar + 0xffff0000) // CHECK: ('_string', 'foo_set1_global') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 17) +// CHECK: (('n_strx', 22) // CHECK: ('n_type', 0x3) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 32) diff --git a/test/MC/MachO/absolutize.s b/test/MC/MachO/absolutize.s index 39571dd..19917e3 100644 --- a/test/MC/MachO/absolutize.s +++ b/test/MC/MachO/absolutize.s @@ -150,10 +150,10 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: ('nsyms', 4) // CHECK: ('stroff', 572) // CHECK: ('strsize', 36) -// CHECK: ('_string_data', '\x00_text_a\x00_text_b\x00_data_a\x00_data_b\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00_text_b\x00_data_b\x00_text_a\x00_data_a\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 17) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -161,7 +161,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: ('_string', '_text_a') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 9) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -169,7 +169,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: ('_string', '_text_b') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 17) +// CHECK: (('n_strx', 25) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -177,7 +177,7 @@ Ldata_expr_2 = Ldata_d - Ldata_c // CHECK: ('_string', '_data_a') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 25) +// CHECK: (('n_strx', 9) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/bad-darwin-x86_64-reloc-expr1.s b/test/MC/MachO/bad-darwin-x86_64-reloc-expr1.s new file mode 100644 index 0000000..518ae64 --- /dev/null +++ b/test/MC/MachO/bad-darwin-x86_64-reloc-expr1.s @@ -0,0 +1,6 @@ +// RUN: not llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o - 2> %t.err > %t +// RUN: FileCheck --check-prefix=CHECK-ERROR < %t.err %s + +_Z: +.long (_Z+4)-_b +// CHECK-ERROR: error: unsupported relocation with subtraction expression, symbol '_b' can not be undefined in a subtraction expression diff --git a/test/MC/MachO/bad-darwin-x86_64-reloc-expr2.s b/test/MC/MachO/bad-darwin-x86_64-reloc-expr2.s new file mode 100644 index 0000000..3aefd87 --- /dev/null +++ b/test/MC/MachO/bad-darwin-x86_64-reloc-expr2.s @@ -0,0 +1,6 @@ +// RUN: not llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o - 2> %t.err > %t +// RUN: FileCheck --check-prefix=CHECK-ERROR < %t.err %s + +_Z: +.long (_a+4)-_Z +// CHECK-ERROR: error: unsupported relocation with subtraction expression, symbol '_a' can not be undefined in a subtraction expression diff --git a/test/MC/MachO/comm-1.s b/test/MC/MachO/comm-1.s index 5ffa979..cb240f9 100644 --- a/test/MC/MachO/comm-1.s +++ b/test/MC/MachO/comm-1.s @@ -51,10 +51,10 @@ // CHECK: ('nsyms', 4) // CHECK: ('stroff', 304) // CHECK: ('strsize', 48) -// CHECK: ('_string_data', '\x00sym_comm_B\x00sym_comm_A\x00sym_comm_C\x00sym_comm_D\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00sym_comm_D\x00sym_comm_C\x00sym_comm_B\x00sym_comm_A\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 12) +// CHECK: (('n_strx', 34) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -62,7 +62,7 @@ // CHECK: ('_string', 'sym_comm_A') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 23) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -70,7 +70,7 @@ // CHECK: ('_string', 'sym_comm_B') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 23) +// CHECK: (('n_strx', 12) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 544) @@ -78,7 +78,7 @@ // CHECK: ('_string', 'sym_comm_C') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 34) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 768) diff --git a/test/MC/MachO/darwin-complex-difference.s b/test/MC/MachO/darwin-complex-difference.s index e66bd09..f31d3ad 100644 --- a/test/MC/MachO/darwin-complex-difference.s +++ b/test/MC/MachO/darwin-complex-difference.s @@ -74,10 +74,10 @@ _d: // CHECK: ('nsyms', 3) // CHECK: ('stroff', 392) // CHECK: ('strsize', 12) -// CHECK: ('_string_data', '\x00_a\x00_c\x00_d\x00\x00\x00') +// CHECK: ('_string_data', '\x00_d\x00_c\x00_a\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 7) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -93,7 +93,7 @@ _d: // CHECK: ('_string', '_c') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 7) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s b/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s index 5d54879..b69cd1b 100644 --- a/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s +++ b/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s @@ -1,38 +1,16 @@ -// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s - -// Test case for rdar://9356266 - -// This tests that this expression does not cause a crash and produces these -// four relocation entries: -// Relocation information (__DATA,__data) 4 entries -// address pcrel length extern type scattered symbolnum/value -// 00000004 False long False SUB False 2 (__DATA,__data) -// 00000004 False long False UNSIGND False 2 (__DATA,__data) -// 00000000 False long False SUB False 2 (__DATA,__data) -// 00000000 False long False UNSIGND False 2 (__DATA,__data) +// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | llvm-readobj -r | FileCheck %s .data L_var1: L_var2: -// This was working fine .long L_var2 - L_var1 - .set L_var3, . .set L_var4, . -// But this was causing a crash .long L_var4 - L_var3 -// CHECK: ('_relocations', [ -// CHECK: # Relocation 0 -// CHECK: (('word-0', 0x4), -// CHECK: ('word-1', 0x54000002)), -// CHECK: # Relocation 1 -// CHECK: (('word-0', 0x4), -// CHECK: ('word-1', 0x4000002)), -// CHECK: # Relocation 2 -// CHECK: (('word-0', 0x0), -// CHECK: ('word-1', 0x54000002)), -// CHECK: # Relocation 3 -// CHECK: (('word-0', 0x0), -// CHECK: ('word-1', 0x4000002)), -// CHECK: ]) +// CHECK: Relocations [ +// CHECK-NEXT: Section __data { +// CHECK-NEXT: 0x4 0 2 0 X86_64_RELOC_SUBTRACTOR 0 0x2 +// CHECK-NEXT: 0x4 0 2 0 X86_64_RELOC_UNSIGNED 0 0x2 +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/MachO/darwin-x86_64-diff-relocs.s b/test/MC/MachO/darwin-x86_64-diff-relocs.s index f5d93ae..eb28cf1 100644 --- a/test/MC/MachO/darwin-x86_64-diff-relocs.s +++ b/test/MC/MachO/darwin-x86_64-diff-relocs.s @@ -258,7 +258,7 @@ L3: // CHECK: ('nsyms', 5) // CHECK: ('stroff', 908) // CHECK: ('strsize', 24) -// CHECK: ('_string_data', '\x00_foo\x00_g0\x00_g1\x00_g2\x00_g3\x00\x00\x00') +// CHECK: ('_string_data', '\x00_foo\x00_g3\x00_g2\x00_g1\x00_g0\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 // CHECK: (('n_strx', 1) @@ -269,7 +269,7 @@ L3: // CHECK: ('_string', '_foo') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 6) +// CHECK: (('n_strx', 18) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -277,7 +277,7 @@ L3: // CHECK: ('_string', '_g0') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 10) +// CHECK: (('n_strx', 14) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -285,7 +285,7 @@ L3: // CHECK: ('_string', '_g1') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 14) +// CHECK: (('n_strx', 10) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -293,7 +293,7 @@ L3: // CHECK: ('_string', '_g2') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 18) +// CHECK: (('n_strx', 6) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/darwin-x86_64-reloc.s b/test/MC/MachO/darwin-x86_64-reloc.s index 83c0de7..1dfb982 100644 --- a/test/MC/MachO/darwin-x86_64-reloc.s +++ b/test/MC/MachO/darwin-x86_64-reloc.s @@ -301,11 +301,11 @@ L6: // CHECK: ('symoff', 1152) // CHECK: ('nsyms', 9) // CHECK: ('stroff', 1296) -// CHECK: ('strsize', 52) -// CHECK: ('_string_data', '\x00_foobar\x00_ext_foo\x00_foo\x00_baz\x00_bar\x00_prev\x00_f2\x00_f3\x00f6\x00\x00\x00') +// CHECK: ('strsize', 48) +// CHECK: ('_string_data', '\x00_baz\x00_prev\x00_foobar\x00_bar\x00_ext_foo\x00f6\x00_f3\x00_f2\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 18) +// CHECK: (('n_strx', 29) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -313,7 +313,7 @@ L6: // CHECK: ('_string', '_foo') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 23) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -321,7 +321,7 @@ L6: // CHECK: ('_string', '_baz') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 28) +// CHECK: (('n_strx', 20) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -329,7 +329,7 @@ L6: // CHECK: ('_string', '_bar') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 33) +// CHECK: (('n_strx', 6) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -337,7 +337,7 @@ L6: // CHECK: ('_string', '_prev') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 39) +// CHECK: (('n_strx', 41) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -345,7 +345,7 @@ L6: // CHECK: ('_string', '_f2') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 43) +// CHECK: (('n_strx', 37) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -353,7 +353,7 @@ L6: // CHECK: ('_string', '_f3') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 47) +// CHECK: (('n_strx', 34) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -361,7 +361,7 @@ L6: // CHECK: ('_string', 'f6') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 9) +// CHECK: (('n_strx', 25) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -369,7 +369,7 @@ L6: // CHECK: ('_string', '_ext_foo') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 12) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/eh-frame-reloc.s b/test/MC/MachO/eh-frame-reloc.s index e14825b..c39ce84 100644 --- a/test/MC/MachO/eh-frame-reloc.s +++ b/test/MC/MachO/eh-frame-reloc.s @@ -1,10 +1,10 @@ // RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.7 -filetype=obj | llvm-readobj -r | FileCheck %s // RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.6 -filetype=obj | llvm-readobj -r | FileCheck %s // RUN: llvm-mc < %s -triple=x86_64-apple-ios7.0.0 -filetype=obj | llvm-readobj -r | FileCheck %s -// RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.5 -filetype=obj | llvm-readobj -r | FileCheck --check-prefix=OLD64 %s +// RUN: llvm-mc < %s -triple=x86_64-apple-macosx10.5 -filetype=obj | llvm-readobj -r | FileCheck %s // RUN: llvm-mc < %s -triple=i686-apple-macosx10.6 -filetype=obj | llvm-readobj -r | FileCheck %s -// RUN: llvm-mc < %s -triple=i686-apple-macosx10.5 -filetype=obj | llvm-readobj -r | FileCheck --check-prefix=OLD32 %s -// RUN: llvm-mc < %s -triple=i686-apple-macosx10.4 -filetype=obj | llvm-readobj -r | FileCheck --check-prefix=OLD32 %s +// RUN: llvm-mc < %s -triple=i686-apple-macosx10.5 -filetype=obj | llvm-readobj -r | FileCheck %s +// RUN: llvm-mc < %s -triple=i686-apple-macosx10.4 -filetype=obj | llvm-readobj -r | FileCheck %s .globl _bar .align 4, 0x90 @@ -14,17 +14,3 @@ _bar: // CHECK: Relocations [ // CHECK-NEXT: ] - -// OLD32: Relocations [ -// OLD32-NEXT: Section __eh_frame { -// OLD32-NEXT: 0x20 0 2 n/a GENERIC_RELOC_LOCAL_SECTDIFF 1 0x0 -// OLD32-NEXT: 0x0 0 2 n/a GENERIC_RELOC_PAIR 1 0x20 -// OLD32-NEXT: } -// OLD32-NEXT: ] - -// OLD64: Relocations [ -// OLD64-NEXT: Section __eh_frame { -// OLD64-NEXT: 0x20 0 3 0 X86_64_RELOC_SUBTRACTOR 0 -// OLD64-NEXT: 0x20 0 3 1 X86_64_RELOC_UNSIGNED 0 _bar -// OLD64-NEXT: } -// OLD64-NEXT: ] diff --git a/test/MC/MachO/empty-dwarf-lines.s b/test/MC/MachO/empty-dwarf-lines.s deleted file mode 100644 index 4bdc16b..0000000 --- a/test/MC/MachO/empty-dwarf-lines.s +++ /dev/null @@ -1,25 +0,0 @@ -// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | macho-dump | FileCheck %s - -// This tests that when producing files for darwin9 or older we make sure -// that debug_line sections are of a minimum size to avoid the linker bug -// described in PR8715. - - .section __DATA,__data - .file 1 "test.c" - .globl _c ## @c -_c: - .asciz "hi\n" - -// CHECK: (('section_name', '__debug_line\x00\x00\x00\x00') -// CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') -// CHECK-NEXT: ('address', 4) -// CHECK-NEXT: ('size', 44) -// CHECK-NEXT: ('offset', 452) -// CHECK-NEXT: ('alignment', 0) -// CHECK-NEXT: ('reloc_offset', 0) -// CHECK-NEXT: ('num_reloc', 0) -// CHECK-NEXT: ('flags', 0x2000000) -// CHECK-NEXT: ('reserved1', 0) -// CHECK-NEXT: ('reserved2', 0) -// CHECK-NEXT: ('reserved3', 0) -// CHECK-NEXT: ), diff --git a/test/MC/MachO/file.s b/test/MC/MachO/file.s index 0168747..a7d6c20 100644 --- a/test/MC/MachO/file.s +++ b/test/MC/MachO/file.s @@ -1,22 +1,27 @@ -// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -triple i386-apple-darwin9 %s -filetype=obj -o - | llvm-readobj -s -section-data | FileCheck %s .file 1 "dir/foo" nop -// CHECK: ('_section_data', '90') -// CHECK-NEXT: # Section 1 -// CHECK-NEXT: (('section_name', '__debug_line\x00\x00\x00\x00') -// CHECK-NEXT: ('segment_name', '__DWARF\x00\x00\x00\x00\x00\x00\x00\x00\x00') -// CHECK-NEXT: ('address', 1) -// CHECK-NEXT: ('size', 45) -// CHECK-NEXT: ('offset', 221) -// CHECK-NEXT: ('alignment', 0) -// CHECK-NEXT: ('reloc_offset', 0) -// CHECK-NEXT: ('num_reloc', 0) -// CHECK-NEXT: ('flags', 0x2000000) -// CHECK-NEXT: ('reserved1', 0) -// CHECK-NEXT: ('reserved2', 0) -// CHECK-NEXT: ), -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: ]) -// CHECK-NEXT: ('_section_data', '29000000 02001e00 00000101 fb0e0d00 01010101 00000001 00000164 69720000 666f6f00 01000000 02000001 01') +// CHECK: Section { +// CHECK: Index: 1 +// CHECK-NEXT: Name: __debug_line +// CHECK-NEXT: Segment: __DWARF +// CHECK-NEXT: Address: 0x1 +// CHECK-NEXT: Size: 0x28 +// CHECK-NEXT: Offset: 221 +// CHECK-NEXT: Alignment: 0 +// CHECK-NEXT: RelocationOffset: 0x0 +// CHECK-NEXT: RelocationCount: 0 +// CHECK-NEXT: Type: 0x0 +// CHECK-NEXT: Attributes [ (0x20000) +// CHECK-NEXT: Debug (0x20000) +// CHECK-NEXT: ] +// CHECK-NEXT: Reserved1: 0x0 +// CHECK-NEXT: Reserved2: 0x0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 24000000 02001E00 00000101 FB0E0D00 +// CHECK-NEXT: 0010: 01010101 00000001 00000164 69720000 +// CHECK-NEXT: 0020: 666F6F00 01000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/MachO/gen-dwarf.s b/test/MC/MachO/gen-dwarf.s index 997c834..ad0a562 100644 --- a/test/MC/MachO/gen-dwarf.s +++ b/test/MC/MachO/gen-dwarf.s @@ -46,12 +46,12 @@ _x: .long 1 // CHECK: DW_AT_name [DW_FORM_string] // We don't check the DW_AT_comp_dir which is the current working directory // CHECK: DW_AT_producer [DW_FORM_string] ("llvm-mc (based on {{.*}})") -// CHECK: DW_AT_language [DW_FORM_data2] (0x8001) +// CHECK: DW_AT_language [DW_FORM_data2] (DW_LANG_Mips_Assembler) // CHECK: DW_TAG_label [2] * // CHECK: DW_AT_name [DW_FORM_string] ("bar") -// CHECK: DW_AT_decl_file [DW_FORM_data4] (0x00000001) -// CHECK: DW_AT_decl_line [DW_FORM_data4] (0x00000005) +// CHECK: DW_AT_decl_file [DW_FORM_data4] ([[FILE:".*gen-dwarf.s"]]) +// CHECK: DW_AT_decl_line [DW_FORM_data4] (5) // CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) // CHECK: DW_AT_prototyped [DW_FORM_flag] (0x00) @@ -61,8 +61,8 @@ _x: .long 1 // CHECK: DW_TAG_label [2] * // CHECK: DW_AT_name [DW_FORM_string] ("foo") -// CHECK: DW_AT_decl_file [DW_FORM_data4] (0x00000001) -// CHECK: DW_AT_decl_line [DW_FORM_data4] (0x00000009) +// CHECK: DW_AT_decl_file [DW_FORM_data4] ([[FILE]]) +// CHECK: DW_AT_decl_line [DW_FORM_data4] (9) // CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000007) // CHECK: DW_AT_prototyped [DW_FORM_flag] (0x00) @@ -72,8 +72,8 @@ _x: .long 1 // CHECK: DW_TAG_label [2] * // CHECK: DW_AT_name [DW_FORM_string] ("baz") -// CHECK: DW_AT_decl_file [DW_FORM_data4] (0x00000001) -// CHECK: DW_AT_decl_line [DW_FORM_data4] (0x0000000a) +// CHECK: DW_AT_decl_file [DW_FORM_data4] ([[FILE]]) +// CHECK: DW_AT_decl_line [DW_FORM_data4] (10) // CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000007) // CHECK: DW_AT_prototyped [DW_FORM_flag] (0x00) diff --git a/test/MC/MachO/indirect-symbols.s b/test/MC/MachO/indirect-symbols.s index 90fd231..0795768 100644 --- a/test/MC/MachO/indirect-symbols.s +++ b/test/MC/MachO/indirect-symbols.s @@ -97,10 +97,10 @@ _e: // CHECK: ('nsyms', 6) // CHECK: ('stroff', 516) // CHECK: ('strsize', 20) -// CHECK: ('_string_data', '\x00_d\x00_a\x00_b\x00_c\x00_e\x00_f\x00\x00') +// CHECK: ('_string_data', '\x00_f\x00_e\x00_d\x00_c\x00_b\x00_a\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 7) +// CHECK: (('n_strx', 13) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -116,7 +116,7 @@ _e: // CHECK: ('_string', '_c') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 13) +// CHECK: (('n_strx', 4) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -124,7 +124,7 @@ _e: // CHECK: ('_string', '_e') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 16) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0x2) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -132,7 +132,7 @@ _e: // CHECK: ('_string', '_f') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 4) +// CHECK: (('n_strx', 16) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 1) @@ -140,7 +140,7 @@ _e: // CHECK: ('_string', '_a') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 7) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/lcomm-attributes.s b/test/MC/MachO/lcomm-attributes.s index 1e95924..6e49e80 100644 --- a/test/MC/MachO/lcomm-attributes.s +++ b/test/MC/MachO/lcomm-attributes.s @@ -73,10 +73,10 @@ // CHECK: ('nsyms', 4) // CHECK: ('stroff', 372) // CHECK: ('strsize', 68) -// CHECK: ('_string_data', '\x00sym_lcomm_ext_A\x00sym_lcomm_ext_B\x00sym_zfill_ext_A\x00sym_zfill_ext_B\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00sym_lcomm_ext_B\x00sym_zfill_ext_B\x00sym_lcomm_ext_A\x00sym_zfill_ext_A\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 33) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -84,7 +84,7 @@ // CHECK: ('_string', 'sym_lcomm_ext_A') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 17) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -92,7 +92,7 @@ // CHECK: ('_string', 'sym_lcomm_ext_B') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 33) +// CHECK: (('n_strx', 49) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -100,7 +100,7 @@ // CHECK: ('_string', 'sym_zfill_ext_A') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 49) +// CHECK: (('n_strx', 17) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/osx-version-min-load-command.s b/test/MC/MachO/osx-version-min-load-command.s index 2a73609..cb62565 100644 --- a/test/MC/MachO/osx-version-min-load-command.s +++ b/test/MC/MachO/osx-version-min-load-command.s @@ -6,5 +6,5 @@ // CHECK: (('command', 36) // CHECK: ('size', 16) // CHECK: ('version, 1639169) -// CHECK: ('reserved, 0) +// CHECK: ('sdk, 0) // CHECK: ), diff --git a/test/MC/MachO/reloc.s b/test/MC/MachO/reloc.s index f6a3446..2a6d5db 100644 --- a/test/MC/MachO/reloc.s +++ b/test/MC/MachO/reloc.s @@ -181,10 +181,10 @@ _f1: // CHECK: ('nsyms', 10) // CHECK: ('stroff', 724) // CHECK: ('strsize', 88) -// CHECK: ('_string_data', '\x00undef\x00local_a_ext\x00.objc_class_name_A\x00_f1\x00local_a\x00local_a_elt\x00local_b\x00local_c\x00bar\x00_f0\x00\x00\x00') +// CHECK: ('_string_data', '\x00local_a_ext\x00local_a_elt\x00bar\x00undef\x00local_c\x00local_b\x00local_a\x00.objc_class_name_A\x00_f1\x00_f0\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 42) +// CHECK: (('n_strx', 51) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -192,7 +192,7 @@ _f1: // CHECK: ('_string', 'local_a') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 50) +// CHECK: (('n_strx', 13) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -200,7 +200,7 @@ _f1: // CHECK: ('_string', 'local_a_elt') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 62) +// CHECK: (('n_strx', 43) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -208,7 +208,7 @@ _f1: // CHECK: ('_string', 'local_b') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 70) +// CHECK: (('n_strx', 35) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -216,7 +216,7 @@ _f1: // CHECK: ('_string', 'local_c') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 78) +// CHECK: (('n_strx', 25) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -232,7 +232,7 @@ _f1: // CHECK: ('_string', '_f0') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 19) +// CHECK: (('n_strx', 59) // CHECK: ('n_type', 0x3) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -240,7 +240,7 @@ _f1: // CHECK: ('_string', '.objc_class_name_A') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 38) +// CHECK: (('n_strx', 78) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 128) @@ -248,7 +248,7 @@ _f1: // CHECK: ('_string', '_f1') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 7) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -256,7 +256,7 @@ _f1: // CHECK: ('_string', 'local_a_ext') // CHECK: ), // CHECK: # Symbol 9 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 29) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/section-align-2.s b/test/MC/MachO/section-align-2.s index e0d7b8d..086fc4a 100644 --- a/test/MC/MachO/section-align-2.s +++ b/test/MC/MachO/section-align-2.s @@ -82,10 +82,10 @@ baz: // CHECK: ('nsyms', 3) // CHECK: ('stroff', 444) // CHECK: ('strsize', 16) -// CHECK: ('_string_data', '\x00foo\x00bar\x00baz\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00baz\x00bar\x00foo\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 9) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -101,7 +101,7 @@ baz: // CHECK: ('_string', 'bar') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 9) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/string-table.s b/test/MC/MachO/string-table.s index 179528e..3a935ee 100644 --- a/test/MC/MachO/string-table.s +++ b/test/MC/MachO/string-table.s @@ -53,10 +53,10 @@ // CHECK: ('nsyms', 2) // CHECK: ('stroff', 308) // CHECK: ('strsize', 8) -// CHECK: ('_string_data', '\x00a\x00b\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00b\x00a\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 3) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -64,7 +64,7 @@ // CHECK: ('_string', 'a') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 3) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/symbol-diff.s b/test/MC/MachO/symbol-diff.s index 1483df1..dae3287 100644 --- a/test/MC/MachO/symbol-diff.s +++ b/test/MC/MachO/symbol-diff.s @@ -75,10 +75,10 @@ _g.eh: // CHECK-NEXT: ('nsyms', 2) // CHECK-NEXT: ('stroff', 424) // CHECK-NEXT: ('strsize', 12) -// CHECK-NEXT: ('_string_data', '\x00_g\x00_g.eh\x00\x00\x00') +// CHECK-NEXT: ('_string_data', '\x00_g.eh\x00_g\x00\x00\x00') // CHECK-NEXT: ('_symbols', [ // CHECK-NEXT: # Symbol 0 -// CHECK-NEXT: (('n_strx', 1) +// CHECK-NEXT: (('n_strx', 7) // CHECK-NEXT: ('n_type', 0xe) // CHECK-NEXT: ('n_sect', 1) // CHECK-NEXT: ('n_desc', 0) @@ -86,7 +86,7 @@ _g.eh: // CHECK-NEXT: ('_string', '_g') // CHECK-NEXT: ), // CHECK-NEXT: # Symbol 1 -// CHECK-NEXT: (('n_strx', 4) +// CHECK-NEXT: (('n_strx', 1) // CHECK-NEXT: ('n_type', 0xe) // CHECK-NEXT: ('n_sect', 2) // CHECK-NEXT: ('n_desc', 0) diff --git a/test/MC/MachO/symbol-flags.s b/test/MC/MachO/symbol-flags.s index 7a4f8e4..561d88a 100644 --- a/test/MC/MachO/symbol-flags.s +++ b/test/MC/MachO/symbol-flags.s @@ -118,10 +118,10 @@ sym_desc_flags: // CHECK: ('nsyms', 24) // CHECK: ('stroff', 612) // CHECK: ('strsize', 388) -// CHECK: ('_string_data', '\x00sym_ref_A\x00sym_ref_def_D\x00sym_ref_def_E\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_weak_def_B\x00sym_weak_def_C\x00sym_lazy_ref_A\x00sym_lazy_ref_D\x00sym_lazy_ref_E\x00sym_private_ext_A\x00sym_private_ext_B\x00sym_private_ext_C\x00sym_private_ext_D\x00sym_private_ext_E\x00sym_no_dead_strip_A\x00sym_ref_def_A\x00sym_ref_def_C\x00sym_weak_ref_def_A\x00sym_weak_ref_def_B\x00sym_lazy_ref_B\x00sym_lazy_ref_C\x00sym_symbol_resolver_A\x00sym_desc_flags\x00\x00') +// CHECK: ('_string_data', '\x00sym_desc_flags\x00sym_private_ext_E\x00sym_lazy_ref_E\x00sym_ref_def_E\x00sym_private_ext_D\x00sym_lazy_ref_D\x00sym_ref_def_D\x00sym_private_ext_C\x00sym_lazy_ref_C\x00sym_weak_def_C\x00sym_ref_def_C\x00sym_private_ext_B\x00sym_lazy_ref_B\x00sym_weak_def_B\x00sym_weak_ref_def_B\x00sym_private_ext_A\x00sym_symbol_resolver_A\x00sym_no_dead_strip_A\x00sym_lazy_ref_A\x00sym_ref_A\x00sym_weak_ref_A\x00sym_weak_def_A\x00sym_ref_def_A\x00sym_weak_ref_def_A\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 254) +// CHECK: (('n_strx', 354) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 32) @@ -129,7 +129,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_ref_def_A') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 268) +// CHECK: (('n_strx', 158) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 32) @@ -137,7 +137,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_ref_def_C') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 282) +// CHECK: (('n_strx', 368) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 64) @@ -145,7 +145,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_weak_ref_def_A') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 301) +// CHECK: (('n_strx', 220) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -153,7 +153,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_weak_ref_def_B') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 320) +// CHECK: (('n_strx', 190) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 32) @@ -161,7 +161,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_lazy_ref_B') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 335) +// CHECK: (('n_strx', 128) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 32) @@ -169,7 +169,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_lazy_ref_C') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 350) +// CHECK: (('n_strx', 257) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 256) @@ -177,7 +177,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_symbol_resolver_A') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 372) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 64) @@ -185,7 +185,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_desc_flags') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 162) +// CHECK: (('n_strx', 172) // CHECK: ('n_type', 0x1f) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -193,7 +193,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_private_ext_B') // CHECK: ), // CHECK: # Symbol 9 -// CHECK: (('n_strx', 180) +// CHECK: (('n_strx', 110) // CHECK: ('n_type', 0x1f) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -201,7 +201,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_private_ext_C') // CHECK: ), // CHECK: # Symbol 10 -// CHECK: (('n_strx', 54) +// CHECK: (('n_strx', 339) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 128) @@ -209,7 +209,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_weak_def_A') // CHECK: ), // CHECK: # Symbol 11 -// CHECK: (('n_strx', 69) +// CHECK: (('n_strx', 205) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 128) @@ -217,7 +217,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_weak_def_B') // CHECK: ), // CHECK: # Symbol 12 -// CHECK: (('n_strx', 84) +// CHECK: (('n_strx', 143) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 128) @@ -225,7 +225,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_weak_def_C') // CHECK: ), // CHECK: # Symbol 13 -// CHECK: (('n_strx', 99) +// CHECK: (('n_strx', 299) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 33) @@ -233,7 +233,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_lazy_ref_A') // CHECK: ), // CHECK: # Symbol 14 -// CHECK: (('n_strx', 114) +// CHECK: (('n_strx', 81) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 32) @@ -241,7 +241,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_lazy_ref_D') // CHECK: ), // CHECK: # Symbol 15 -// CHECK: (('n_strx', 129) +// CHECK: (('n_strx', 34) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 33) @@ -249,7 +249,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_lazy_ref_E') // CHECK: ), // CHECK: # Symbol 16 -// CHECK: (('n_strx', 234) +// CHECK: (('n_strx', 279) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 32) @@ -257,7 +257,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_no_dead_strip_A') // CHECK: ), // CHECK: # Symbol 17 -// CHECK: (('n_strx', 144) +// CHECK: (('n_strx', 239) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -265,7 +265,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_private_ext_A') // CHECK: ), // CHECK: # Symbol 18 -// CHECK: (('n_strx', 198) +// CHECK: (('n_strx', 63) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -273,7 +273,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_private_ext_D') // CHECK: ), // CHECK: # Symbol 19 -// CHECK: (('n_strx', 216) +// CHECK: (('n_strx', 16) // CHECK: ('n_type', 0x11) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -281,7 +281,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_private_ext_E') // CHECK: ), // CHECK: # Symbol 20 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 314) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 4660) @@ -289,7 +289,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_ref_A') // CHECK: ), // CHECK: # Symbol 21 -// CHECK: (('n_strx', 11) +// CHECK: (('n_strx', 96) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 32) @@ -297,7 +297,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_ref_def_D') // CHECK: ), // CHECK: # Symbol 22 -// CHECK: (('n_strx', 25) +// CHECK: (('n_strx', 49) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 32) @@ -305,7 +305,7 @@ sym_desc_flags: // CHECK: ('_string', 'sym_ref_def_E') // CHECK: ), // CHECK: # Symbol 23 -// CHECK: (('n_strx', 39) +// CHECK: (('n_strx', 324) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 64) diff --git a/test/MC/MachO/symbol-indirect.s b/test/MC/MachO/symbol-indirect.s index 2412970..1cdeed1 100644 --- a/test/MC/MachO/symbol-indirect.s +++ b/test/MC/MachO/symbol-indirect.s @@ -137,10 +137,10 @@ sym_nlp_G: // CHECK: ('nsyms', 10) // CHECK: ('stroff', 592) // CHECK: ('strsize', 104) -// CHECK: ('_string_data', '\x00sym_lsp_A\x00sym_lsp_G\x00sym_nlp_A\x00sym_nlp_G\x00sym_nlp_B\x00sym_nlp_E\x00sym_lsp_B\x00sym_lsp_E\x00sym_lsp_C\x00sym_nlp_C\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00sym_lsp_G\x00sym_nlp_G\x00sym_lsp_E\x00sym_nlp_E\x00sym_lsp_C\x00sym_nlp_C\x00sym_lsp_B\x00sym_nlp_B\x00sym_lsp_A\x00sym_nlp_A\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 81) +// CHECK: (('n_strx', 41) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -148,7 +148,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_lsp_C') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 91) +// CHECK: (('n_strx', 51) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -156,7 +156,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_nlp_C') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 11) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -164,7 +164,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_lsp_G') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 31) +// CHECK: (('n_strx', 11) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -172,7 +172,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_nlp_G') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 81) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -188,7 +188,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_lsp_B') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 71) +// CHECK: (('n_strx', 21) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 1) @@ -196,7 +196,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_lsp_E') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 21) +// CHECK: (('n_strx', 91) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -204,7 +204,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_nlp_A') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 41) +// CHECK: (('n_strx', 71) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) @@ -212,7 +212,7 @@ sym_nlp_G: // CHECK: ('_string', 'sym_nlp_B') // CHECK: ), // CHECK: # Symbol 9 -// CHECK: (('n_strx', 51) +// CHECK: (('n_strx', 31) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/symbols-1.s b/test/MC/MachO/symbols-1.s index cf05afa..8b663dc 100644 --- a/test/MC/MachO/symbols-1.s +++ b/test/MC/MachO/symbols-1.s @@ -59,10 +59,10 @@ Lsym_asm_temp: // CHECK-X86_32: ('nsyms', 9) // CHECK-X86_32: ('stroff', 368) // CHECK-X86_32: ('strsize', 140) -// CHECK-X86_32: ('_string_data', '\x00sym_globl_def_B\x00sym_globl_undef_B\x00sym_globl_def_A\x00sym_globl_undef_A\x00sym_globl_def_C\x00sym_globl_undef_C\x00sym_local_B\x00sym_local_A\x00sym_local_C\x00\x00') +// CHECK-X86_32: ('_string_data', '\x00sym_local_C\x00sym_globl_undef_C\x00sym_globl_def_C\x00sym_local_B\x00sym_globl_undef_B\x00sym_globl_def_B\x00sym_local_A\x00sym_globl_undef_A\x00sym_globl_def_A\x00\x00') // CHECK-X86_32: ('_symbols', [ // CHECK-X86_32: # Symbol 0 -// CHECK-X86_32: (('n_strx', 103) +// CHECK-X86_32: (('n_strx', 47) // CHECK-X86_32: ('n_type', 0xe) // CHECK-X86_32: ('n_sect', 1) // CHECK-X86_32: ('n_desc', 0) @@ -70,7 +70,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_local_B') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 1 -// CHECK-X86_32: (('n_strx', 115) +// CHECK-X86_32: (('n_strx', 93) // CHECK-X86_32: ('n_type', 0xe) // CHECK-X86_32: ('n_sect', 1) // CHECK-X86_32: ('n_desc', 0) @@ -78,7 +78,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_local_A') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 2 -// CHECK-X86_32: (('n_strx', 127) +// CHECK-X86_32: (('n_strx', 1) // CHECK-X86_32: ('n_type', 0xe) // CHECK-X86_32: ('n_sect', 1) // CHECK-X86_32: ('n_desc', 0) @@ -86,7 +86,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_local_C') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 3 -// CHECK-X86_32: (('n_strx', 35) +// CHECK-X86_32: (('n_strx', 123) // CHECK-X86_32: ('n_type', 0xf) // CHECK-X86_32: ('n_sect', 1) // CHECK-X86_32: ('n_desc', 0) @@ -94,7 +94,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_globl_def_A') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 4 -// CHECK-X86_32: (('n_strx', 1) +// CHECK-X86_32: (('n_strx', 77) // CHECK-X86_32: ('n_type', 0xf) // CHECK-X86_32: ('n_sect', 1) // CHECK-X86_32: ('n_desc', 0) @@ -102,7 +102,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_globl_def_B') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 5 -// CHECK-X86_32: (('n_strx', 69) +// CHECK-X86_32: (('n_strx', 31) // CHECK-X86_32: ('n_type', 0xf) // CHECK-X86_32: ('n_sect', 1) // CHECK-X86_32: ('n_desc', 0) @@ -110,7 +110,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_globl_def_C') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 6 -// CHECK-X86_32: (('n_strx', 51) +// CHECK-X86_32: (('n_strx', 105) // CHECK-X86_32: ('n_type', 0x1) // CHECK-X86_32: ('n_sect', 0) // CHECK-X86_32: ('n_desc', 0) @@ -118,7 +118,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_globl_undef_A') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 7 -// CHECK-X86_32: (('n_strx', 17) +// CHECK-X86_32: (('n_strx', 59) // CHECK-X86_32: ('n_type', 0x1) // CHECK-X86_32: ('n_sect', 0) // CHECK-X86_32: ('n_desc', 0) @@ -126,7 +126,7 @@ Lsym_asm_temp: // CHECK-X86_32: ('_string', 'sym_globl_undef_B') // CHECK-X86_32: ), // CHECK-X86_32: # Symbol 8 -// CHECK-X86_32: (('n_strx', 85) +// CHECK-X86_32: (('n_strx', 13) // CHECK-X86_32: ('n_type', 0x1) // CHECK-X86_32: ('n_sect', 0) // CHECK-X86_32: ('n_desc', 0) @@ -207,10 +207,10 @@ Lsym_asm_temp: // CHECK-X86_64: ('nsyms', 9) // CHECK-X86_64: ('stroff', 436) // CHECK-X86_64: ('strsize', 140) -// CHECK-X86_64: ('_string_data', '\x00sym_globl_def_B\x00sym_globl_undef_B\x00sym_globl_def_A\x00sym_globl_undef_A\x00sym_globl_def_C\x00sym_globl_undef_C\x00sym_local_B\x00sym_local_A\x00sym_local_C\x00\x00') +// CHECK-X86_64: ('_string_data', '\x00sym_local_C\x00sym_globl_undef_C\x00sym_globl_def_C\x00sym_local_B\x00sym_globl_undef_B\x00sym_globl_def_B\x00sym_local_A\x00sym_globl_undef_A\x00sym_globl_def_A\x00\x00') // CHECK-X86_64: ('_symbols', [ // CHECK-X86_64: # Symbol 0 -// CHECK-X86_64: (('n_strx', 103) +// CHECK-X86_64: (('n_strx', 47) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 1) // CHECK-X86_64: ('n_desc', 0) @@ -218,7 +218,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_local_B') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 1 -// CHECK-X86_64: (('n_strx', 115) +// CHECK-X86_64: (('n_strx', 93) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 1) // CHECK-X86_64: ('n_desc', 0) @@ -226,7 +226,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_local_A') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 2 -// CHECK-X86_64: (('n_strx', 127) +// CHECK-X86_64: (('n_strx', 1) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 1) // CHECK-X86_64: ('n_desc', 0) @@ -234,7 +234,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_local_C') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 3 -// CHECK-X86_64: (('n_strx', 35) +// CHECK-X86_64: (('n_strx', 123) // CHECK-X86_64: ('n_type', 0xf) // CHECK-X86_64: ('n_sect', 1) // CHECK-X86_64: ('n_desc', 0) @@ -242,7 +242,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_globl_def_A') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 4 -// CHECK-X86_64: (('n_strx', 1) +// CHECK-X86_64: (('n_strx', 77) // CHECK-X86_64: ('n_type', 0xf) // CHECK-X86_64: ('n_sect', 1) // CHECK-X86_64: ('n_desc', 0) @@ -250,7 +250,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_globl_def_B') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 5 -// CHECK-X86_64: (('n_strx', 69) +// CHECK-X86_64: (('n_strx', 31) // CHECK-X86_64: ('n_type', 0xf) // CHECK-X86_64: ('n_sect', 1) // CHECK-X86_64: ('n_desc', 0) @@ -258,7 +258,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_globl_def_C') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 6 -// CHECK-X86_64: (('n_strx', 51) +// CHECK-X86_64: (('n_strx', 105) // CHECK-X86_64: ('n_type', 0x1) // CHECK-X86_64: ('n_sect', 0) // CHECK-X86_64: ('n_desc', 0) @@ -266,7 +266,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_globl_undef_A') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 7 -// CHECK-X86_64: (('n_strx', 17) +// CHECK-X86_64: (('n_strx', 59) // CHECK-X86_64: ('n_type', 0x1) // CHECK-X86_64: ('n_sect', 0) // CHECK-X86_64: ('n_desc', 0) @@ -274,7 +274,7 @@ Lsym_asm_temp: // CHECK-X86_64: ('_string', 'sym_globl_undef_B') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 8 -// CHECK-X86_64: (('n_strx', 85) +// CHECK-X86_64: (('n_strx', 13) // CHECK-X86_64: ('n_type', 0x1) // CHECK-X86_64: ('n_sect', 0) // CHECK-X86_64: ('n_desc', 0) diff --git a/test/MC/MachO/tbss.s b/test/MC/MachO/tbss.s index 8eae142..1c23aa5 100644 --- a/test/MC/MachO/tbss.s +++ b/test/MC/MachO/tbss.s @@ -67,10 +67,10 @@ // CHECK: ('nsyms', 2) // CHECK: ('stroff', 400) // CHECK: ('strsize', 28) -// CHECK: ('_string_data', '\x00_a$tlv$init\x00_b$tlv$init\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00_b$tlv$init\x00_a$tlv$init\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 13) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -78,7 +78,7 @@ // CHECK: ('_string', '_a$tlv$init') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 13) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/tls.s b/test/MC/MachO/tls.s index 44b61be..33e23a9 100644 --- a/test/MC/MachO/tls.s +++ b/test/MC/MachO/tls.s @@ -167,10 +167,10 @@ _b: // CHECK: ('nsyms', 9) // CHECK: ('stroff', 840) // CHECK: ('strsize', 80) -// CHECK: ('_string_data', '\x00_c$tlv$init\x00_c\x00___tlv_bootstrap\x00_d$tlv$init\x00_d\x00_a\x00_b\x00_a$tlv$init\x00_b$tlv$init\x00\x00\x00') +// CHECK: ('_string_data', '\x00_d$tlv$init\x00_c$tlv$init\x00_b$tlv$init\x00_a$tlv$init\x00___tlv_bootstrap\x00_d\x00_c\x00_b\x00_a\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 54) +// CHECK: (('n_strx', 37) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -178,7 +178,7 @@ _b: // CHECK: ('_string', '_a$tlv$init') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 66) +// CHECK: (('n_strx', 25) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -186,7 +186,7 @@ _b: // CHECK: ('_string', '_b$tlv$init') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 48) +// CHECK: (('n_strx', 75) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -194,7 +194,7 @@ _b: // CHECK: ('_string', '_a') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 51) +// CHECK: (('n_strx', 72) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -202,7 +202,7 @@ _b: // CHECK: ('_string', '_b') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 13) +// CHECK: (('n_strx', 69) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -210,7 +210,7 @@ _b: // CHECK: ('_string', '_c') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 13) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -218,7 +218,7 @@ _b: // CHECK: ('_string', '_c$tlv$init') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 45) +// CHECK: (('n_strx', 66) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -226,7 +226,7 @@ _b: // CHECK: ('_string', '_d') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 33) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -234,7 +234,7 @@ _b: // CHECK: ('_string', '_d$tlv$init') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 16) +// CHECK: (('n_strx', 49) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/tlv-reloc.s b/test/MC/MachO/tlv-reloc.s index d111241..80e0565 100644 --- a/test/MC/MachO/tlv-reloc.s +++ b/test/MC/MachO/tlv-reloc.s @@ -111,10 +111,10 @@ _foo: // CHECK: ('nsyms', 4) // CHECK: ('stroff', 576) // CHECK: ('strsize', 40) -// CHECK: ('_string_data', '\x00_a\x00__tlv_bootstrap\x00_foo\x00_a$tlv$init\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00_a$tlv$init\x00__tlv_bootstrap\x00_foo\x00_a\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 25) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -122,7 +122,7 @@ _foo: // CHECK: ('_string', '_a$tlv$init') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 34) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -130,7 +130,7 @@ _foo: // CHECK: ('_string', '_a') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 20) +// CHECK: (('n_strx', 29) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -138,7 +138,7 @@ _foo: // CHECK: ('_string', '_foo') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 4) +// CHECK: (('n_strx', 13) // CHECK: ('n_type', 0x1) // CHECK: ('n_sect', 0) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/variable-exprs.s b/test/MC/MachO/variable-exprs.s index a7fa45d..ac781ef 100644 --- a/test/MC/MachO/variable-exprs.s +++ b/test/MC/MachO/variable-exprs.s @@ -134,10 +134,10 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('nsyms', 10) // CHECK-I386: ('stroff', 576) // CHECK-I386: ('strsize', 24) -// CHECK-I386: ('_string_data', '\x00d2\x00d\x00d3\x00a\x00b\x00c\x00e\x00g\x00f\x00t0\x00') +// CHECK-I386: ('_string_data', '\x00g\x00f\x00e\x00d\x00c\x00b\x00a\x00d3\x00d2\x00t0\x00') // CHECK-I386: ('_symbols', [ // CHECK-I386: # Symbol 0 -// CHECK-I386: (('n_strx', 9) +// CHECK-I386: (('n_strx', 13) // CHECK-I386: ('n_type', 0xe) // CHECK-I386: ('n_sect', 2) // CHECK-I386: ('n_desc', 0) @@ -153,7 +153,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('_string', 'b') // CHECK-I386: ), // CHECK-I386: # Symbol 2 -// CHECK-I386: (('n_strx', 13) +// CHECK-I386: (('n_strx', 9) // CHECK-I386: ('n_type', 0xe) // CHECK-I386: ('n_sect', 2) // CHECK-I386: ('n_desc', 0) @@ -161,7 +161,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('_string', 'c') // CHECK-I386: ), // CHECK-I386: # Symbol 3 -// CHECK-I386: (('n_strx', 15) +// CHECK-I386: (('n_strx', 5) // CHECK-I386: ('n_type', 0xe) // CHECK-I386: ('n_sect', 2) // CHECK-I386: ('n_desc', 0) @@ -169,7 +169,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('_string', 'e') // CHECK-I386: ), // CHECK-I386: # Symbol 4 -// CHECK-I386: (('n_strx', 17) +// CHECK-I386: (('n_strx', 1) // CHECK-I386: ('n_type', 0xe) // CHECK-I386: ('n_sect', 2) // CHECK-I386: ('n_desc', 0) @@ -177,7 +177,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('_string', 'g') // CHECK-I386: ), // CHECK-I386: # Symbol 5 -// CHECK-I386: (('n_strx', 19) +// CHECK-I386: (('n_strx', 3) // CHECK-I386: ('n_type', 0xe) // CHECK-I386: ('n_sect', 2) // CHECK-I386: ('n_desc', 0) @@ -193,7 +193,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('_string', 't0') // CHECK-I386: ), // CHECK-I386: # Symbol 7 -// CHECK-I386: (('n_strx', 4) +// CHECK-I386: (('n_strx', 7) // CHECK-I386: ('n_type', 0x1) // CHECK-I386: ('n_sect', 0) // CHECK-I386: ('n_desc', 0) @@ -201,15 +201,15 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-I386: ('_string', 'd') // CHECK-I386: ), // CHECK-I386: # Symbol 8 -// CHECK-I386: (('n_strx', 1) +// CHECK-I386: (('n_strx', 18) // CHECK-I386: ('n_type', 0xb) // CHECK-I386: ('n_sect', 0) // CHECK-I386: ('n_desc', 0) -// CHECK-I386: ('n_value', 4) +// CHECK-I386: ('n_value', 7) // CHECK-I386: ('_string', 'd2') // CHECK-I386: ), // CHECK-I386: # Symbol 9 -// CHECK-I386: (('n_strx', 6) +// CHECK-I386: (('n_strx', 15) // CHECK-I386: ('n_type', 0x1) // CHECK-I386: ('n_sect', 0) // CHECK-I386: ('n_desc', 0) @@ -335,10 +335,10 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('nsyms', 10) // CHECK-X86_64: ('stroff', 660) // CHECK-X86_64: ('strsize', 24) -// CHECK-X86_64: ('_string_data', '\x00d2\x00d\x00d3\x00a\x00b\x00c\x00e\x00g\x00f\x00t0\x00') +// CHECK-X86_64: ('_string_data', '\x00g\x00f\x00e\x00d\x00c\x00b\x00a\x00d3\x00d2\x00t0\x00') // CHECK-X86_64: ('_symbols', [ // CHECK-X86_64: # Symbol 0 -// CHECK-X86_64: (('n_strx', 9) +// CHECK-X86_64: (('n_strx', 13) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 2) // CHECK-X86_64: ('n_desc', 0) @@ -354,7 +354,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('_string', 'b') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 2 -// CHECK-X86_64: (('n_strx', 13) +// CHECK-X86_64: (('n_strx', 9) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 2) // CHECK-X86_64: ('n_desc', 0) @@ -362,7 +362,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('_string', 'c') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 3 -// CHECK-X86_64: (('n_strx', 15) +// CHECK-X86_64: (('n_strx', 5) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 2) // CHECK-X86_64: ('n_desc', 0) @@ -370,7 +370,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('_string', 'e') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 4 -// CHECK-X86_64: (('n_strx', 17) +// CHECK-X86_64: (('n_strx', 1) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 2) // CHECK-X86_64: ('n_desc', 0) @@ -378,7 +378,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('_string', 'g') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 5 -// CHECK-X86_64: (('n_strx', 19) +// CHECK-X86_64: (('n_strx', 3) // CHECK-X86_64: ('n_type', 0xe) // CHECK-X86_64: ('n_sect', 2) // CHECK-X86_64: ('n_desc', 0) @@ -394,7 +394,7 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('_string', 't0') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 7 -// CHECK-X86_64: (('n_strx', 4) +// CHECK-X86_64: (('n_strx', 7) // CHECK-X86_64: ('n_type', 0x1) // CHECK-X86_64: ('n_sect', 0) // CHECK-X86_64: ('n_desc', 0) @@ -402,15 +402,15 @@ Lt0_x = Lt0_a - Lt0_b // CHECK-X86_64: ('_string', 'd') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 8 -// CHECK-X86_64: (('n_strx', 1) +// CHECK-X86_64: (('n_strx', 18) // CHECK-X86_64: ('n_type', 0xb) // CHECK-X86_64: ('n_sect', 0) // CHECK-X86_64: ('n_desc', 0) -// CHECK-X86_64: ('n_value', 4) +// CHECK-X86_64: ('n_value', 7) // CHECK-X86_64: ('_string', 'd2') // CHECK-X86_64: ), // CHECK-X86_64: # Symbol 9 -// CHECK-X86_64: (('n_strx', 6) +// CHECK-X86_64: (('n_strx', 15) // CHECK-X86_64: ('n_type', 0x1) // CHECK-X86_64: ('n_sect', 0) // CHECK-X86_64: ('n_desc', 0) diff --git a/test/MC/MachO/x86_32-symbols.s b/test/MC/MachO/x86_32-symbols.s index 35ada35..95aa507 100644 --- a/test/MC/MachO/x86_32-symbols.s +++ b/test/MC/MachO/x86_32-symbols.s @@ -690,10 +690,10 @@ D39: // CHECK: ('nsyms', 40) // CHECK: ('stroff', 3116) // CHECK: ('strsize', 152) -// CHECK: ('_string_data', '\x00D0\x00D1\x00D2\x00D3\x00D4\x00D5\x00D6\x00D7\x00D8\x00D9\x00D10\x00D11\x00D12\x00D13\x00D14\x00D15\x00D16\x00D17\x00D18\x00D19\x00D20\x00D21\x00D22\x00D23\x00D24\x00D25\x00D26\x00D27\x00D28\x00D29\x00D30\x00D31\x00D32\x00D33\x00D34\x00D35\x00D36\x00D37\x00D38\x00D39\x00\x00') +// CHECK: ('_string_data', '\x00D9\x00D39\x00D29\x00D19\x00D8\x00D38\x00D28\x00D18\x00D7\x00D37\x00D27\x00D17\x00D6\x00D36\x00D26\x00D16\x00D5\x00D35\x00D25\x00D15\x00D4\x00D34\x00D24\x00D14\x00D3\x00D33\x00D23\x00D13\x00D2\x00D32\x00D22\x00D12\x00D1\x00D31\x00D21\x00D11\x00D0\x00D30\x00D20\x00D10\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 136) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -701,7 +701,7 @@ D39: // CHECK: ('_string', 'D0') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 4) +// CHECK: (('n_strx', 121) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -709,7 +709,7 @@ D39: // CHECK: ('_string', 'D1') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 7) +// CHECK: (('n_strx', 106) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -717,7 +717,7 @@ D39: // CHECK: ('_string', 'D2') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 10) +// CHECK: (('n_strx', 91) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -725,7 +725,7 @@ D39: // CHECK: ('_string', 'D3') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 13) +// CHECK: (('n_strx', 76) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -733,7 +733,7 @@ D39: // CHECK: ('_string', 'D4') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 16) +// CHECK: (('n_strx', 61) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 5) // CHECK: ('n_desc', 0) @@ -741,7 +741,7 @@ D39: // CHECK: ('_string', 'D5') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 19) +// CHECK: (('n_strx', 46) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 6) // CHECK: ('n_desc', 0) @@ -749,7 +749,7 @@ D39: // CHECK: ('_string', 'D6') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 22) +// CHECK: (('n_strx', 31) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 7) // CHECK: ('n_desc', 0) @@ -757,7 +757,7 @@ D39: // CHECK: ('_string', 'D7') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 25) +// CHECK: (('n_strx', 16) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 8) // CHECK: ('n_desc', 0) @@ -765,7 +765,7 @@ D39: // CHECK: ('_string', 'D8') // CHECK: ), // CHECK: # Symbol 9 -// CHECK: (('n_strx', 28) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 9) // CHECK: ('n_desc', 0) @@ -773,7 +773,7 @@ D39: // CHECK: ('_string', 'D9') // CHECK: ), // CHECK: # Symbol 10 -// CHECK: (('n_strx', 31) +// CHECK: (('n_strx', 147) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 10) // CHECK: ('n_desc', 0) @@ -781,7 +781,7 @@ D39: // CHECK: ('_string', 'D10') // CHECK: ), // CHECK: # Symbol 11 -// CHECK: (('n_strx', 35) +// CHECK: (('n_strx', 132) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 11) // CHECK: ('n_desc', 0) @@ -789,7 +789,7 @@ D39: // CHECK: ('_string', 'D11') // CHECK: ), // CHECK: # Symbol 12 -// CHECK: (('n_strx', 39) +// CHECK: (('n_strx', 117) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 12) // CHECK: ('n_desc', 0) @@ -797,7 +797,7 @@ D39: // CHECK: ('_string', 'D12') // CHECK: ), // CHECK: # Symbol 13 -// CHECK: (('n_strx', 43) +// CHECK: (('n_strx', 102) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 13) // CHECK: ('n_desc', 0) @@ -805,7 +805,7 @@ D39: // CHECK: ('_string', 'D13') // CHECK: ), // CHECK: # Symbol 14 -// CHECK: (('n_strx', 47) +// CHECK: (('n_strx', 87) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 14) // CHECK: ('n_desc', 0) @@ -813,7 +813,7 @@ D39: // CHECK: ('_string', 'D14') // CHECK: ), // CHECK: # Symbol 15 -// CHECK: (('n_strx', 51) +// CHECK: (('n_strx', 72) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 15) // CHECK: ('n_desc', 0) @@ -821,7 +821,7 @@ D39: // CHECK: ('_string', 'D15') // CHECK: ), // CHECK: # Symbol 16 -// CHECK: (('n_strx', 55) +// CHECK: (('n_strx', 57) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 16) // CHECK: ('n_desc', 0) @@ -829,7 +829,7 @@ D39: // CHECK: ('_string', 'D16') // CHECK: ), // CHECK: # Symbol 17 -// CHECK: (('n_strx', 59) +// CHECK: (('n_strx', 42) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 17) // CHECK: ('n_desc', 0) @@ -837,7 +837,7 @@ D39: // CHECK: ('_string', 'D17') // CHECK: ), // CHECK: # Symbol 18 -// CHECK: (('n_strx', 63) +// CHECK: (('n_strx', 27) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 18) // CHECK: ('n_desc', 0) @@ -845,7 +845,7 @@ D39: // CHECK: ('_string', 'D18') // CHECK: ), // CHECK: # Symbol 19 -// CHECK: (('n_strx', 67) +// CHECK: (('n_strx', 12) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 19) // CHECK: ('n_desc', 0) @@ -853,7 +853,7 @@ D39: // CHECK: ('_string', 'D19') // CHECK: ), // CHECK: # Symbol 20 -// CHECK: (('n_strx', 71) +// CHECK: (('n_strx', 143) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 20) // CHECK: ('n_desc', 0) @@ -861,7 +861,7 @@ D39: // CHECK: ('_string', 'D20') // CHECK: ), // CHECK: # Symbol 21 -// CHECK: (('n_strx', 75) +// CHECK: (('n_strx', 128) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 21) // CHECK: ('n_desc', 0) @@ -869,7 +869,7 @@ D39: // CHECK: ('_string', 'D21') // CHECK: ), // CHECK: # Symbol 22 -// CHECK: (('n_strx', 79) +// CHECK: (('n_strx', 113) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 22) // CHECK: ('n_desc', 0) @@ -877,7 +877,7 @@ D39: // CHECK: ('_string', 'D22') // CHECK: ), // CHECK: # Symbol 23 -// CHECK: (('n_strx', 83) +// CHECK: (('n_strx', 98) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 23) // CHECK: ('n_desc', 0) @@ -885,7 +885,7 @@ D39: // CHECK: ('_string', 'D23') // CHECK: ), // CHECK: # Symbol 24 -// CHECK: (('n_strx', 87) +// CHECK: (('n_strx', 83) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 24) // CHECK: ('n_desc', 0) @@ -893,7 +893,7 @@ D39: // CHECK: ('_string', 'D24') // CHECK: ), // CHECK: # Symbol 25 -// CHECK: (('n_strx', 91) +// CHECK: (('n_strx', 68) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 25) // CHECK: ('n_desc', 0) @@ -901,7 +901,7 @@ D39: // CHECK: ('_string', 'D25') // CHECK: ), // CHECK: # Symbol 26 -// CHECK: (('n_strx', 95) +// CHECK: (('n_strx', 53) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 26) // CHECK: ('n_desc', 0) @@ -909,7 +909,7 @@ D39: // CHECK: ('_string', 'D26') // CHECK: ), // CHECK: # Symbol 27 -// CHECK: (('n_strx', 99) +// CHECK: (('n_strx', 38) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 27) // CHECK: ('n_desc', 0) @@ -917,7 +917,7 @@ D39: // CHECK: ('_string', 'D27') // CHECK: ), // CHECK: # Symbol 28 -// CHECK: (('n_strx', 103) +// CHECK: (('n_strx', 23) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 28) // CHECK: ('n_desc', 0) @@ -925,7 +925,7 @@ D39: // CHECK: ('_string', 'D28') // CHECK: ), // CHECK: # Symbol 29 -// CHECK: (('n_strx', 107) +// CHECK: (('n_strx', 8) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 29) // CHECK: ('n_desc', 0) @@ -933,7 +933,7 @@ D39: // CHECK: ('_string', 'D29') // CHECK: ), // CHECK: # Symbol 30 -// CHECK: (('n_strx', 111) +// CHECK: (('n_strx', 139) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 30) // CHECK: ('n_desc', 0) @@ -941,7 +941,7 @@ D39: // CHECK: ('_string', 'D30') // CHECK: ), // CHECK: # Symbol 31 -// CHECK: (('n_strx', 115) +// CHECK: (('n_strx', 124) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 31) // CHECK: ('n_desc', 0) @@ -949,7 +949,7 @@ D39: // CHECK: ('_string', 'D31') // CHECK: ), // CHECK: # Symbol 32 -// CHECK: (('n_strx', 119) +// CHECK: (('n_strx', 109) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 32) // CHECK: ('n_desc', 0) @@ -957,7 +957,7 @@ D39: // CHECK: ('_string', 'D32') // CHECK: ), // CHECK: # Symbol 33 -// CHECK: (('n_strx', 123) +// CHECK: (('n_strx', 94) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 33) // CHECK: ('n_desc', 0) @@ -965,7 +965,7 @@ D39: // CHECK: ('_string', 'D33') // CHECK: ), // CHECK: # Symbol 34 -// CHECK: (('n_strx', 127) +// CHECK: (('n_strx', 79) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 34) // CHECK: ('n_desc', 0) @@ -973,7 +973,7 @@ D39: // CHECK: ('_string', 'D34') // CHECK: ), // CHECK: # Symbol 35 -// CHECK: (('n_strx', 131) +// CHECK: (('n_strx', 64) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -981,7 +981,7 @@ D39: // CHECK: ('_string', 'D35') // CHECK: ), // CHECK: # Symbol 36 -// CHECK: (('n_strx', 135) +// CHECK: (('n_strx', 49) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -989,7 +989,7 @@ D39: // CHECK: ('_string', 'D36') // CHECK: ), // CHECK: # Symbol 37 -// CHECK: (('n_strx', 139) +// CHECK: (('n_strx', 34) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -997,7 +997,7 @@ D39: // CHECK: ('_string', 'D37') // CHECK: ), // CHECK: # Symbol 38 -// CHECK: (('n_strx', 143) +// CHECK: (('n_strx', 19) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 35) // CHECK: ('n_desc', 0) @@ -1005,7 +1005,7 @@ D39: // CHECK: ('_string', 'D38') // CHECK: ), // CHECK: # Symbol 39 -// CHECK: (('n_strx', 147) +// CHECK: (('n_strx', 4) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 36) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/x86_64-symbols.s b/test/MC/MachO/x86_64-symbols.s index 804cee8..9788feb 100644 --- a/test/MC/MachO/x86_64-symbols.s +++ b/test/MC/MachO/x86_64-symbols.s @@ -647,10 +647,10 @@ D38: // CHECK: ('nsyms', 40) // CHECK: ('stroff', 3328) // CHECK: ('strsize', 152) -// CHECK: ('_string_data', '\x00D0\x00D1\x00D2\x00D3\x00L4\x00D4\x00D5\x00D6\x00D7\x00D8\x00D9\x00D12\x00D13\x00D16\x00D17\x00D18\x00D19\x00D20\x00D21\x00D22\x00D23\x00D24\x00D25\x00D26\x00D27\x00D28\x00D29\x00D30\x00D31\x00D32\x00D33\x00D34\x00L35\x00D35\x00L36\x00D36\x00L37\x00D37\x00L38\x00D38\x00\x00\x00') +// CHECK: ('_string_data', '\x00D9\x00D29\x00D19\x00D8\x00L38\x00D38\x00D28\x00D18\x00D7\x00L37\x00D37\x00D27\x00D17\x00D6\x00L36\x00D36\x00D26\x00D16\x00D5\x00L35\x00D35\x00D25\x00L4\x00D4\x00D34\x00D24\x00D3\x00D33\x00D23\x00D13\x00D2\x00D32\x00D22\x00D12\x00D1\x00D31\x00D21\x00D0\x00D30\x00D20\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 139) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -658,7 +658,7 @@ D38: // CHECK: ('_string', 'D0') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 4) +// CHECK: (('n_strx', 128) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 1) // CHECK: ('n_desc', 0) @@ -666,7 +666,7 @@ D38: // CHECK: ('_string', 'D1') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 7) +// CHECK: (('n_strx', 113) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -674,7 +674,7 @@ D38: // CHECK: ('_string', 'D2') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 10) +// CHECK: (('n_strx', 98) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 3) // CHECK: ('n_desc', 0) @@ -682,7 +682,7 @@ D38: // CHECK: ('_string', 'D3') // CHECK: ), // CHECK: # Symbol 4 -// CHECK: (('n_strx', 13) +// CHECK: (('n_strx', 84) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -690,7 +690,7 @@ D38: // CHECK: ('_string', 'L4') // CHECK: ), // CHECK: # Symbol 5 -// CHECK: (('n_strx', 16) +// CHECK: (('n_strx', 87) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -698,7 +698,7 @@ D38: // CHECK: ('_string', 'D4') // CHECK: ), // CHECK: # Symbol 6 -// CHECK: (('n_strx', 19) +// CHECK: (('n_strx', 69) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 5) // CHECK: ('n_desc', 0) @@ -706,7 +706,7 @@ D38: // CHECK: ('_string', 'D5') // CHECK: ), // CHECK: # Symbol 7 -// CHECK: (('n_strx', 22) +// CHECK: (('n_strx', 50) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 6) // CHECK: ('n_desc', 0) @@ -714,7 +714,7 @@ D38: // CHECK: ('_string', 'D6') // CHECK: ), // CHECK: # Symbol 8 -// CHECK: (('n_strx', 25) +// CHECK: (('n_strx', 31) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 7) // CHECK: ('n_desc', 0) @@ -722,7 +722,7 @@ D38: // CHECK: ('_string', 'D7') // CHECK: ), // CHECK: # Symbol 9 -// CHECK: (('n_strx', 28) +// CHECK: (('n_strx', 12) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 8) // CHECK: ('n_desc', 0) @@ -730,7 +730,7 @@ D38: // CHECK: ('_string', 'D8') // CHECK: ), // CHECK: # Symbol 10 -// CHECK: (('n_strx', 31) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 9) // CHECK: ('n_desc', 0) @@ -738,7 +738,7 @@ D38: // CHECK: ('_string', 'D9') // CHECK: ), // CHECK: # Symbol 11 -// CHECK: (('n_strx', 34) +// CHECK: (('n_strx', 124) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 10) // CHECK: ('n_desc', 0) @@ -746,7 +746,7 @@ D38: // CHECK: ('_string', 'D12') // CHECK: ), // CHECK: # Symbol 12 -// CHECK: (('n_strx', 38) +// CHECK: (('n_strx', 109) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 11) // CHECK: ('n_desc', 0) @@ -754,7 +754,7 @@ D38: // CHECK: ('_string', 'D13') // CHECK: ), // CHECK: # Symbol 13 -// CHECK: (('n_strx', 42) +// CHECK: (('n_strx', 65) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 12) // CHECK: ('n_desc', 0) @@ -770,7 +770,7 @@ D38: // CHECK: ('_string', 'D17') // CHECK: ), // CHECK: # Symbol 15 -// CHECK: (('n_strx', 50) +// CHECK: (('n_strx', 27) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 14) // CHECK: ('n_desc', 0) @@ -778,7 +778,7 @@ D38: // CHECK: ('_string', 'D18') // CHECK: ), // CHECK: # Symbol 16 -// CHECK: (('n_strx', 54) +// CHECK: (('n_strx', 8) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 15) // CHECK: ('n_desc', 0) @@ -786,7 +786,7 @@ D38: // CHECK: ('_string', 'D19') // CHECK: ), // CHECK: # Symbol 17 -// CHECK: (('n_strx', 58) +// CHECK: (('n_strx', 146) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 16) // CHECK: ('n_desc', 0) @@ -794,7 +794,7 @@ D38: // CHECK: ('_string', 'D20') // CHECK: ), // CHECK: # Symbol 18 -// CHECK: (('n_strx', 62) +// CHECK: (('n_strx', 135) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 17) // CHECK: ('n_desc', 0) @@ -802,7 +802,7 @@ D38: // CHECK: ('_string', 'D21') // CHECK: ), // CHECK: # Symbol 19 -// CHECK: (('n_strx', 66) +// CHECK: (('n_strx', 120) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 18) // CHECK: ('n_desc', 0) @@ -810,7 +810,7 @@ D38: // CHECK: ('_string', 'D22') // CHECK: ), // CHECK: # Symbol 20 -// CHECK: (('n_strx', 70) +// CHECK: (('n_strx', 105) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 19) // CHECK: ('n_desc', 0) @@ -818,7 +818,7 @@ D38: // CHECK: ('_string', 'D23') // CHECK: ), // CHECK: # Symbol 21 -// CHECK: (('n_strx', 74) +// CHECK: (('n_strx', 94) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 20) // CHECK: ('n_desc', 0) @@ -826,7 +826,7 @@ D38: // CHECK: ('_string', 'D24') // CHECK: ), // CHECK: # Symbol 22 -// CHECK: (('n_strx', 78) +// CHECK: (('n_strx', 80) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 21) // CHECK: ('n_desc', 0) @@ -834,7 +834,7 @@ D38: // CHECK: ('_string', 'D25') // CHECK: ), // CHECK: # Symbol 23 -// CHECK: (('n_strx', 82) +// CHECK: (('n_strx', 61) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 22) // CHECK: ('n_desc', 0) @@ -842,7 +842,7 @@ D38: // CHECK: ('_string', 'D26') // CHECK: ), // CHECK: # Symbol 24 -// CHECK: (('n_strx', 86) +// CHECK: (('n_strx', 42) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 23) // CHECK: ('n_desc', 0) @@ -850,7 +850,7 @@ D38: // CHECK: ('_string', 'D27') // CHECK: ), // CHECK: # Symbol 25 -// CHECK: (('n_strx', 90) +// CHECK: (('n_strx', 23) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 24) // CHECK: ('n_desc', 0) @@ -858,7 +858,7 @@ D38: // CHECK: ('_string', 'D28') // CHECK: ), // CHECK: # Symbol 26 -// CHECK: (('n_strx', 94) +// CHECK: (('n_strx', 4) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 25) // CHECK: ('n_desc', 0) @@ -866,7 +866,7 @@ D38: // CHECK: ('_string', 'D29') // CHECK: ), // CHECK: # Symbol 27 -// CHECK: (('n_strx', 98) +// CHECK: (('n_strx', 142) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 26) // CHECK: ('n_desc', 0) @@ -874,7 +874,7 @@ D38: // CHECK: ('_string', 'D30') // CHECK: ), // CHECK: # Symbol 28 -// CHECK: (('n_strx', 102) +// CHECK: (('n_strx', 131) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 27) // CHECK: ('n_desc', 0) @@ -882,7 +882,7 @@ D38: // CHECK: ('_string', 'D31') // CHECK: ), // CHECK: # Symbol 29 -// CHECK: (('n_strx', 106) +// CHECK: (('n_strx', 116) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 28) // CHECK: ('n_desc', 0) @@ -890,7 +890,7 @@ D38: // CHECK: ('_string', 'D32') // CHECK: ), // CHECK: # Symbol 30 -// CHECK: (('n_strx', 110) +// CHECK: (('n_strx', 101) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 29) // CHECK: ('n_desc', 0) @@ -898,7 +898,7 @@ D38: // CHECK: ('_string', 'D33') // CHECK: ), // CHECK: # Symbol 31 -// CHECK: (('n_strx', 114) +// CHECK: (('n_strx', 90) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 30) // CHECK: ('n_desc', 0) @@ -906,7 +906,7 @@ D38: // CHECK: ('_string', 'D34') // CHECK: ), // CHECK: # Symbol 32 -// CHECK: (('n_strx', 118) +// CHECK: (('n_strx', 72) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -914,7 +914,7 @@ D38: // CHECK: ('_string', 'L35') // CHECK: ), // CHECK: # Symbol 33 -// CHECK: (('n_strx', 122) +// CHECK: (('n_strx', 76) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -922,7 +922,7 @@ D38: // CHECK: ('_string', 'D35') // CHECK: ), // CHECK: # Symbol 34 -// CHECK: (('n_strx', 126) +// CHECK: (('n_strx', 53) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -930,7 +930,7 @@ D38: // CHECK: ('_string', 'L36') // CHECK: ), // CHECK: # Symbol 35 -// CHECK: (('n_strx', 130) +// CHECK: (('n_strx', 57) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -938,7 +938,7 @@ D38: // CHECK: ('_string', 'D36') // CHECK: ), // CHECK: # Symbol 36 -// CHECK: (('n_strx', 134) +// CHECK: (('n_strx', 34) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -946,7 +946,7 @@ D38: // CHECK: ('_string', 'L37') // CHECK: ), // CHECK: # Symbol 37 -// CHECK: (('n_strx', 138) +// CHECK: (('n_strx', 38) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 4) // CHECK: ('n_desc', 0) @@ -954,7 +954,7 @@ D38: // CHECK: ('_string', 'D37') // CHECK: ), // CHECK: # Symbol 38 -// CHECK: (('n_strx', 142) +// CHECK: (('n_strx', 15) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 31) // CHECK: ('n_desc', 0) @@ -962,7 +962,7 @@ D38: // CHECK: ('_string', 'L38') // CHECK: ), // CHECK: # Symbol 39 -// CHECK: (('n_strx', 146) +// CHECK: (('n_strx', 19) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 31) // CHECK: ('n_desc', 0) diff --git a/test/MC/MachO/zerofill-3.s b/test/MC/MachO/zerofill-3.s index cc81fa8..a4cd31e 100644 --- a/test/MC/MachO/zerofill-3.s +++ b/test/MC/MachO/zerofill-3.s @@ -78,10 +78,10 @@ // CHECK: ('nsyms', 4) // CHECK: ('stroff', 372) // CHECK: ('strsize', 52) -// CHECK: ('_string_data', '\x00sym_lcomm_C\x00sym_lcomm_D\x00sym_lcomm_A\x00sym_lcomm_B\x00\x00\x00\x00') +// CHECK: ('_string_data', '\x00sym_lcomm_D\x00sym_lcomm_C\x00sym_lcomm_B\x00sym_lcomm_A\x00\x00\x00\x00') // CHECK: ('_symbols', [ // CHECK: # Symbol 0 -// CHECK: (('n_strx', 25) +// CHECK: (('n_strx', 37) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -89,7 +89,7 @@ // CHECK: ('_string', 'sym_lcomm_A') // CHECK: ), // CHECK: # Symbol 1 -// CHECK: (('n_strx', 37) +// CHECK: (('n_strx', 25) // CHECK: ('n_type', 0xe) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -97,7 +97,7 @@ // CHECK: ('_string', 'sym_lcomm_B') // CHECK: ), // CHECK: # Symbol 2 -// CHECK: (('n_strx', 1) +// CHECK: (('n_strx', 13) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) @@ -105,7 +105,7 @@ // CHECK: ('_string', 'sym_lcomm_C') // CHECK: ), // CHECK: # Symbol 3 -// CHECK: (('n_strx', 13) +// CHECK: (('n_strx', 1) // CHECK: ('n_type', 0xf) // CHECK: ('n_sect', 2) // CHECK: ('n_desc', 0) diff --git a/test/MC/Mips/cpload-bad.s b/test/MC/Mips/cpload-bad.s index 7d186f6..803610a 100644 --- a/test/MC/Mips/cpload-bad.s +++ b/test/MC/Mips/cpload-bad.s @@ -3,13 +3,25 @@ .text .option pic2 + .set noreorder + .set mips16 + .cpload $25 +# ASM: :[[@LINE-1]]:17: error: .cpload is not supported in Mips16 mode + + .set nomips16 .set reorder .cpload $25 -# ASM: :[[@LINE-1]]:9: warning: .cpload in reorder section +# ASM: :[[@LINE-1]]:9: warning: .cpload should be inside a noreorder section + .set noreorder .cpload $32 # ASM: :[[@LINE-1]]:17: error: invalid register + .cpload $foo # ASM: :[[@LINE-1]]:17: error: expected register containing function address + .cpload bar # ASM: :[[@LINE-1]]:17: error: expected register containing function address + + .cpload $25 foobar +# ASM: :[[@LINE-1]]:21: error: unexpected token, expected end of statement diff --git a/test/MC/Mips/cpload.s b/test/MC/Mips/cpload.s index bc5e797..46b3ee4 100644 --- a/test/MC/Mips/cpload.s +++ b/test/MC/Mips/cpload.s @@ -1,12 +1,16 @@ # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM # -# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=OBJ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+o32 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r -arch=mips - | \ +# RUN: FileCheck %s -check-prefix=OBJ-O32 -# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=OBJ64 +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=-n64,+n32 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r -arch=mips - | \ +# RUN: FileCheck %s -check-prefix=OBJ-N32 + +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+n64 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r -arch=mips - | \ +# RUN: FileCheck %s -check-prefix=OBJ-N64 # ASM: .text # ASM: .option pic2 @@ -14,17 +18,22 @@ # ASM: .cpload $25 # ASM: .set reorder -# OBJ: .text -# OBJ: lui $gp, 0 -# OBJ: R_MIPS_HI16 _gp_disp -# OBJ: addiu $gp, $gp, 0 -# OBJ: R_MIPS_LO16 _gp_disp -# OBJ: addu $gp, $gp, $25 +# OBJ-O32: .text +# OBJ-O32: lui $gp, 0 +# OBJ-O32: R_MIPS_HI16 _gp_disp +# OBJ-O32: addiu $gp, $gp, 0 +# OBJ-O32: R_MIPS_LO16 _gp_disp +# OBJ-O32: addu $gp, $gp, $25 + +# OBJ-N32-NOT: .text +# OBJ-N32-NOT: lui $gp, 0 +# OBJ-N32-NOT: addiu $gp, $gp, 0 +# OBJ-N32-NOT: addu $gp, $gp, $25 -# OBJ64: .text -# OBJ64-NOT: lui $gp, 0 -# OBJ64-NOT: addiu $gp, $gp, 0 -# OBJ64-NOT: addu $gp, $gp, $25 +# OBJ-N64-NOT: .text +# OBJ-N64-NOT: lui $gp, 0 +# OBJ-N64-NOT: addiu $gp, $gp, 0 +# OBJ-N64-NOT: addu $gp, $gp, $25 .text .option pic2 diff --git a/test/MC/Mips/elf-objdump.s b/test/MC/Mips/elf-objdump.s deleted file mode 100644 index 6a5c2a5..0000000 --- a/test/MC/Mips/elf-objdump.s +++ /dev/null @@ -1,11 +0,0 @@ -// 32 bit big endian -// RUN: llvm-mc -filetype=obj -triple mips-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s -// 32 bit little endian -// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s -// 64 bit big endian -// RUN: llvm-mc -filetype=obj -arch=mips64 -triple mips64-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s -// 64 bit little endian -// RUN: llvm-mc -filetype=obj -arch=mips64el -triple mips64el-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s - -// We just want to see if llvm-objdump works at all. -// CHECK: .text diff --git a/test/MC/Mips/elf_eflags.s b/test/MC/Mips/elf_eflags.s index 36f4f9e..1f28ee0 100644 --- a/test/MC/Mips/elf_eflags.s +++ b/test/MC/Mips/elf_eflags.s @@ -1,118 +1,119 @@ -# These *MUST* match the output of gas compiled with the same triple and +# These *MUST* match the output of 'gcc -c' compiled with the same triple and # corresponding options (-mcpu=mips32 -> -mips32 for example). # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6 %s -# MIPSEL-MIPS64R6: Flags [ (0xA0001500) +# MIPSEL-MIPS64R6: Flags [ (0xA0000406) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008 %s -# MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0001500) +# MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0000406) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s -# MIPSEL-MIPS64R2: Flags [ (0x80001100) +# MIPSEL-MIPS64R2: Flags [ (0x80000006) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s -# MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80001500) +# MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80000406) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s -# MIPSEL-MIPS64: Flags [ (0x60001100) +# MIPSEL-MIPS64: Flags [ (0x60000006) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s -# MIPSEL-MIPS64-NAN2008: Flags [ (0x60001500) +# MIPSEL-MIPS64-NAN2008: Flags [ (0x60000406) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6 %s -# MIPSEL-MIPS32R6: Flags [ (0x90001400) +# MIPSEL-MIPS32R6: Flags [ (0x90001404) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6-NAN2008 %s -# MIPSEL-MIPS32R6-NAN2008: Flags [ (0x90001400) +# MIPSEL-MIPS32R6-NAN2008: Flags [ (0x90001404) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R2 %s -# MIPSEL-MIPS32R2: Flags [ (0x70001000) +# MIPSEL-MIPS32R2: Flags [ (0x70001004) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R2-NAN2008 %s -# MIPSEL-MIPS32R2-NAN2008: Flags [ (0x70001400) +# MIPSEL-MIPS32R2-NAN2008: Flags [ (0x70001404) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32 %s -# MIPSEL-MIPS32: Flags [ (0x50001000) +# MIPSEL-MIPS32: Flags [ (0x50001004) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32-NAN2008 %s -# MIPSEL-MIPS32-NAN2008: Flags [ (0x50001400) +# MIPSEL-MIPS32-NAN2008: Flags [ (0x50001404) +# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -mattr=-n64,n32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N32 %s # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=-n64,n32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N32 %s -# MIPS64EL-MIPS64R2-N32: Flags [ (0x80000020) +# MIPS64EL-MIPS64R2-N32: Flags [ (0x80000024) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=-n64,n32,+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N32-NAN2008 %s -# MIPS64EL-MIPS64R2-N32-NAN2008: Flags [ (0x80000420) +# MIPS64EL-MIPS64R2-N32-NAN2008: Flags [ (0x80000424) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=-n64,n32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N32 %s -# MIPS64EL-MIPS64-N32: Flags [ (0x60000020) +# MIPS64EL-MIPS64-N32: Flags [ (0x60000024) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=-n64,n32,+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N32-NAN2008 %s -# MIPS64EL-MIPS64-N32-NAN2008: Flags [ (0x60000420) +# MIPS64EL-MIPS64-N32-NAN2008: Flags [ (0x60000424) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64 %s -# MIPS64EL-MIPS64R2-N64: Flags [ (0x80000000) +# MIPS64EL-MIPS64R2-N64: Flags [ (0x80000006) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=n64,+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64-NAN2008 %s -# MIPS64EL-MIPS64R2-N64-NAN2008: Flags [ (0x80000400) +# MIPS64EL-MIPS64R2-N64-NAN2008: Flags [ (0x80000406) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -mattr=n64 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64 %s -# MIPS64EL-MIPS64-N64: Flags [ (0x60000000) +# MIPS64EL-MIPS64-N64: Flags [ (0x60000006) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -mattr=n64,+nan2008 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64-NAN2008 %s -# MIPS64EL-MIPS64-N64-NAN2008: Flags [ (0x60000400) +# MIPS64EL-MIPS64-N64-NAN2008: Flags [ (0x60000406) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=-n64,o32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-O32 %s -# MIPS64EL-MIPS64R2-O32: Flags [ (0x80001100) +# MIPS64EL-MIPS64R2-O32: Flags [ (0x80001104) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=-n64,o32,+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-O32-NAN2008 %s -# MIPS64EL-MIPS64R2-O32-NAN2008: Flags [ (0x80001500) +# MIPS64EL-MIPS64R2-O32-NAN2008: Flags [ (0x80001504) # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5 %s -# MIPS5: Flags [ (0x40000000) +# MIPS5: Flags [ (0x40000006) # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5-NAN2008 %s -# MIPS5-NAN2008: Flags [ (0x40000400) +# MIPS5-NAN2008: Flags [ (0x40000406) # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4 %s -# MIPS4: Flags [ (0x30000000) +# MIPS4: Flags [ (0x30000006) # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4-NAN2008 %s -# MIPS4-NAN2008: Flags [ (0x30000400) +# MIPS4-NAN2008: Flags [ (0x30000406) # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips3 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3 %s -# MIPS3: Flags [ (0x20000000) +# MIPS3: Flags [ (0x20000006) # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3-NAN2008 %s -# MIPS3-NAN2008: Flags [ (0x20000400) +# MIPS3-NAN2008: Flags [ (0x20000406) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS2 %s -# MIPSEL-MIPS2: Flags [ (0x10001000) +# MIPSEL-MIPS2: Flags [ (0x10001004) # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS2-NAN2008 %s -# MIPSEL-MIPS2-NAN2008: Flags [ (0x10001400) +# MIPSEL-MIPS2-NAN2008: Flags [ (0x10001404) # RUN: llvm-mc -filetype=obj -triple mips-unknown-linux -mcpu=mips1 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS1 %s -# MIPS1: Flags [ (0x1000) +# MIPS1: Flags [ (0x1004) # RUN: llvm-mc -filetype=obj -triple mips-unknown-linux -mcpu=mips1 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS1-NAN2008 %s -# MIPS1-NAN2008: Flags [ (0x1400) +# MIPS1-NAN2008: Flags [ (0x1404) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -mattr=-n64,o32 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-O32 %s -# MIPS64EL-MIPS64-O32: Flags [ (0x60001100) +# MIPS64EL-MIPS64-O32: Flags [ (0x60001104) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -mattr=-n64,o32,+nan2008 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-O32-NAN2008 %s -# MIPS64EL-MIPS64-O32-NAN2008: Flags [ (0x60001500) +# MIPS64EL-MIPS64-O32-NAN2008: Flags [ (0x60001504) # Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2 %s -# MIPS64EL-MIPS64R2: Flags [ (0x80000000) +# MIPS64EL-MIPS64R2: Flags [ (0x80000006) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-NAN2008 %s -# MIPS64EL-MIPS64R2-NAN2008: Flags [ (0x80000400) +# MIPS64EL-MIPS64R2-NAN2008: Flags [ (0x80000406) # Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64 %s -# MIPS64EL-MIPS64: Flags [ (0x60000000) +# MIPS64EL-MIPS64: Flags [ (0x60000006) # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-NAN2008 %s -# MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000400) +# MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000406) diff --git a/test/MC/Mips/elf_eflags_abicalls.s b/test/MC/Mips/elf_eflags_abicalls.s index 5f39630..9e9c013 100644 --- a/test/MC/Mips/elf_eflags_abicalls.s +++ b/test/MC/Mips/elf_eflags_abicalls.s @@ -1,6 +1,6 @@ # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s -# This *MUST* match the output of gas compiled with the same triple. +# This *MUST* match the output of 'gcc -c' compiled with the same triple. # CHECK: Flags [ (0x50001006) .abicalls diff --git a/test/MC/Mips/elf_eflags_micromips.s b/test/MC/Mips/elf_eflags_micromips.s index 14bbcad..9b7de12 100644 --- a/test/MC/Mips/elf_eflags_micromips.s +++ b/test/MC/Mips/elf_eflags_micromips.s @@ -1,7 +1,7 @@ # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s -# This *MUST* match the output of gas compiled with the same triple. -# CHECK: Flags [ (0x52001000) +# This *MUST* match the output of 'gcc -c' compiled with the same triple. +# CHECK: Flags [ (0x52001004) .set micromips f: diff --git a/test/MC/Mips/elf_eflags_mips16.s b/test/MC/Mips/elf_eflags_mips16.s index deac3d4..5143d36 100644 --- a/test/MC/Mips/elf_eflags_mips16.s +++ b/test/MC/Mips/elf_eflags_mips16.s @@ -1,7 +1,7 @@ # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s -# This *MUST* match the output of gas compiled with the same triple. -# CHECK: Flags [ (0x54001000) +# This *MUST* match the output of 'gcc -c' compiled with the same triple. +# CHECK: Flags [ (0x54001004) .set mips16 f: diff --git a/test/MC/Mips/elf_eflags_nan2008.s b/test/MC/Mips/elf_eflags_nan2008.s index 71a22be..f690342 100644 --- a/test/MC/Mips/elf_eflags_nan2008.s +++ b/test/MC/Mips/elf_eflags_nan2008.s @@ -4,8 +4,8 @@ # RUN: llvm-mc -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| \ # RUN: FileCheck %s -check-prefix=CHECK-ASM -# This *MUST* match the output of gas compiled with the same triple. -# CHECK-OBJ: Flags [ (0x50001400) +# This *MUST* match the output of 'gcc -c' compiled with the same triple. +# CHECK-OBJ: Flags [ (0x50001404) # CHECK-ASM: .nan 2008 diff --git a/test/MC/Mips/elf_eflags_nanlegacy.s b/test/MC/Mips/elf_eflags_nanlegacy.s index 6897ad2..0fa0787 100644 --- a/test/MC/Mips/elf_eflags_nanlegacy.s +++ b/test/MC/Mips/elf_eflags_nanlegacy.s @@ -4,12 +4,12 @@ # RUN: llvm-mc -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| \ # RUN: FileCheck %s -check-prefix=CHECK-ASM -# This *MUST* match the output of gas compiled with the same triple. -# CHECK-OBJ: Flags [ (0x50001000) +# This *MUST* match the output of 'gcc -c' compiled with the same triple. +# CHECK-OBJ: Flags [ (0x50001004) # CHECK-ASM: .nan 2008 # CHECK-ASM: .nan legacy .nan 2008 -// Let's override the previous directive! +# Let's override the previous directive! .nan legacy diff --git a/test/MC/Mips/elf_eflags_noreorder.s b/test/MC/Mips/elf_eflags_noreorder.s index 3fea18b..fe46b41 100644 --- a/test/MC/Mips/elf_eflags_noreorder.s +++ b/test/MC/Mips/elf_eflags_noreorder.s @@ -1,6 +1,6 @@ # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s -# This *MUST* match the output of gas compiled with the same triple. -# CHECK: Flags [ (0x50001001) +# This *MUST* match the output of 'gcc -c' compiled with the same triple. +# CHECK: Flags [ (0x50001005) .set noreorder diff --git a/test/MC/Mips/elf_eflags_pic0.s b/test/MC/Mips/elf_eflags_pic0.s index a78ca03..04115fa 100644 --- a/test/MC/Mips/elf_eflags_pic0.s +++ b/test/MC/Mips/elf_eflags_pic0.s @@ -1,6 +1,6 @@ # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s -# This *MUST* match the output of gas compiled with the same triple. +# This *MUST* match the output of 'gcc -c' compiled with the same triple. # CHECK: Flags [ (0x50001004) .abicalls diff --git a/test/MC/Mips/elf_eflags_pic2.s b/test/MC/Mips/elf_eflags_pic2.s index a15208a..692c478 100644 --- a/test/MC/Mips/elf_eflags_pic2.s +++ b/test/MC/Mips/elf_eflags_pic2.s @@ -1,6 +1,6 @@ # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s -# This *MUST* match the output of gas compiled with the same triple. +# This *MUST* match the output of 'gcc -c' compiled with the same triple. # CHECK: Flags [ (0x50001006) .option pic2 diff --git a/test/MC/Mips/elf_reginfo.s b/test/MC/Mips/elf_reginfo.s index 5e9ddf8..ba4788a 100644 --- a/test/MC/Mips/elf_reginfo.s +++ b/test/MC/Mips/elf_reginfo.s @@ -14,13 +14,19 @@ # check for .MIPS.options # CHECK_64: Sections [ # CHECK_64: Section { -# CHECK_64: Name: .MIPS.options +# CHECK_64-LABEL: Name: .MIPS.options # CHECK_64-NEXT: Type: SHT_MIPS_OPTIONS # CHECK_64-NEXT: Flags [ (0x8000002) +# CHECK_64: AddressAlignment: 8 +# CHECK_64: EntrySize: 1 +# CHECK_64-LABEL: } # check for .reginfo # CHECK_32: Sections [ # CHECK_32: Section { -# CHECK_32: Name: .reginfo +# CHECK_32-LABEL: Name: .reginfo # CHECK_32-NEXT: Type: SHT_MIPS_REGINFO # CHECK_32-NEXT: Flags [ (0x2) +# CHECK_32: AddressAlignment: 8 +# CHECK_32: EntrySize: 24 +# CHECK_32-LABEL: } diff --git a/test/MC/Mips/micromips-16-bit-instructions.s b/test/MC/Mips/micromips-16-bit-instructions.s index 31bddcc..35855e1 100644 --- a/test/MC/Mips/micromips-16-bit-instructions.s +++ b/test/MC/Mips/micromips-16-bit-instructions.s @@ -9,19 +9,85 @@ #------------------------------------------------------------------------------ # Little endian #------------------------------------------------------------------------------ +# CHECK-EL: addu16 $6, $17, $4 # encoding: [0x42,0x07] +# CHECK-EL: subu16 $5, $16, $3 # encoding: [0xb1,0x06] +# CHECK-EL: andi16 $16, $2, 31 # encoding: [0x29,0x2c] +# CHECK-EL: and16 $16, $2 # encoding: [0x82,0x44] +# CHECK-EL: not16 $17, $3 # encoding: [0x0b,0x44] +# CHECK-EL: or16 $16, $4 # encoding: [0xc4,0x44] +# CHECK-EL: xor16 $17, $5 # encoding: [0x4d,0x44] +# CHECK-EL: sll16 $3, $16, 5 # encoding: [0x8a,0x25] +# CHECK-EL: srl16 $4, $17, 6 # encoding: [0x1d,0x26] +# CHECK-EL: li16 $3, -1 # encoding: [0xff,0xed] +# CHECK-EL: li16 $3, 126 # encoding: [0xfe,0xed] +# CHECK-EL: addiur1sp $7, 4 # encoding: [0x83,0x6f] +# CHECK-EL: addiur2 $6, $7, -1 # encoding: [0x7e,0x6f] +# CHECK-EL: addiur2 $6, $7, 12 # encoding: [0x76,0x6f] +# CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c] +# CHECK-EL: addiusp -16 # encoding: [0xf9,0x4f] # CHECK-EL: mfhi $9 # encoding: [0x09,0x46] # CHECK-EL: mflo $9 # encoding: [0x49,0x46] # CHECK-EL: move $25, $1 # encoding: [0x21,0x0f] -# CHECK-EL: jalr $9 # encoding: [0xc9,0x45] +# CHECK-EL: jrc $9 # encoding: [0xa9,0x45] +# CHECK-NEXT: jalr $9 # encoding: [0xc9,0x45] +# CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47] +# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK-EL: jalrs16 $9 # encoding: [0xe9,0x45] +# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c] +# CHECK-EL: jr16 $9 # encoding: [0x89,0x45] +# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] #------------------------------------------------------------------------------ # Big endian #------------------------------------------------------------------------------ +# CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] +# CHECK-EB: subu16 $5, $16, $3 # encoding: [0x06,0xb1] +# CHECK-EB: andi16 $16, $2, 31 # encoding: [0x2c,0x29] +# CHECK-EB: and16 $16, $2 # encoding: [0x44,0x82] +# CHECK-EB: not16 $17, $3 # encoding: [0x44,0x0b] +# CHECK-EB: or16 $16, $4 # encoding: [0x44,0xc4] +# CHECK-EB: xor16 $17, $5 # encoding: [0x44,0x4d] +# CHECK-EB: sll16 $3, $16, 5 # encoding: [0x25,0x8a] +# CHECK-EB: srl16 $4, $17, 6 # encoding: [0x26,0x1d] +# CHECK-EB: li16 $3, -1 # encoding: [0xed,0xff] +# CHECK-EB: li16 $3, 126 # encoding: [0xed,0xfe] +# CHECK-EB: addiur1sp $7, 4 # encoding: [0x6f,0x83] +# CHECK-EB: addiur2 $6, $7, -1 # encoding: [0x6f,0x7e] +# CHECK-EB: addiur2 $6, $7, 12 # encoding: [0x6f,0x76] +# CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc] +# CHECK-EB: addiusp -16 # encoding: [0x4f,0xf9] # CHECK-EB: mfhi $9 # encoding: [0x46,0x09] # CHECK-EB: mflo $9 # encoding: [0x46,0x49] # CHECK-EB: move $25, $1 # encoding: [0x0f,0x21] -# CHECK-EB: jalr $9 # encoding: [0x45,0xc9] +# CHECK-EB: jrc $9 # encoding: [0x45,0xa9] +# CHECK-NEXT: jalr $9 # encoding: [0x45,0xc9] +# CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05] +# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK-EB: jalrs16 $9 # encoding: [0x45,0xe9] +# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00] +# CHECK-EB: jr16 $9 # encoding: [0x45,0x89] +# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] + addu16 $6, $17, $4 + subu16 $5, $16, $3 + andi16 $16, $2, 31 + and16 $16, $2 + not16 $17, $3 + or16 $16, $4 + xor16 $17, $5 + sll16 $3, $16, 5 + srl16 $4, $17, 6 + li16 $3, -1 + li16 $3, 126 + addiur1sp $7, 4 + addiur2 $6, $7, -1 + addiur2 $6, $7, 12 + addius5 $7, -2 + addiusp -16 mfhi $9 mflo $9 move $25, $1 + jrc $9 jalr $9 + jraddiusp 20 + jalrs16 $9 + jr16 $9 diff --git a/test/MC/Mips/micromips-branch-instructions.s b/test/MC/Mips/micromips-branch-instructions.s index 84df2a1..cf0aab7 100644 --- a/test/MC/Mips/micromips-branch-instructions.s +++ b/test/MC/Mips/micromips-branch-instructions.s @@ -29,6 +29,10 @@ # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EL: bltz $6, 1332 # encoding: [0x06,0x40,0x9a,0x02] # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK-EL: bgezals $6, 1332 # encoding: [0x66,0x42,0x9a,0x02] +# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c] +# CHECK-EL: bltzals $6, 1332 # encoding: [0x26,0x42,0x9a,0x02] +# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c] #------------------------------------------------------------------------------ # Big endian #------------------------------------------------------------------------------ @@ -52,6 +56,10 @@ # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EB: bltz $6, 1332 # encoding: [0x40,0x06,0x02,0x9a] # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK-EB: bgezals $6, 1332 # encoding: [0x42,0x66,0x02,0x9a] +# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00] +# CHECK-EB: bltzals $6, 1332 # encoding: [0x42,0x26,0x02,0x9a] +# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00] b 1332 beq $9,$6,1332 @@ -63,3 +71,5 @@ bne $9,$6,1332 bal 1332 bltz $6,1332 + bgezals $6,1332 + bltzals $6,1332 diff --git a/test/MC/Mips/micromips-control-instructions.s b/test/MC/Mips/micromips-control-instructions.s index aff84c2..e79896d 100644 --- a/test/MC/Mips/micromips-control-instructions.s +++ b/test/MC/Mips/micromips-control-instructions.s @@ -9,6 +9,12 @@ #------------------------------------------------------------------------------ # Little endian #------------------------------------------------------------------------------ +# CHECK-EL: sdbbp # encoding: [0x00,0x00,0x7c,0xdb] +# CHECK-EL: sdbbp 34 # encoding: [0x22,0x00,0x7c,0xdb] +# CHECK-EL: .set push +# CHECK-EL: .set mips32r2 +# CHECK-EL: rdhwr $5, $29 +# CHECK-EL: .set pop # encoding: [0xbd,0x00,0x3c,0x6b] # CHECK-EL: break # encoding: [0x00,0x00,0x07,0x00] # CHECK-EL: break 7 # encoding: [0x07,0x00,0x07,0x00] # CHECK-EL: break 7, 5 # encoding: [0x07,0x00,0x47,0x01] @@ -24,9 +30,19 @@ # CHECK-EL: ei $10 # encoding: [0x0a,0x00,0x7c,0x57] # CHECK-EL: wait # encoding: [0x00,0x00,0x7c,0x93] # CHECK-EL: wait 17 # encoding: [0x11,0x00,0x7c,0x93] +# CHECK-EL: tlbp # encoding: [0x00,0x00,0x7c,0x03] +# CHECK-EL: tlbr # encoding: [0x00,0x00,0x7c,0x13] +# CHECK-EL: tlbwi # encoding: [0x00,0x00,0x7c,0x23] +# CHECK-EL: tlbwr # encoding: [0x00,0x00,0x7c,0x33] #------------------------------------------------------------------------------ # Big endian #------------------------------------------------------------------------------ +# CHECK-EB: sdbbp # encoding: [0x00,0x00,0xdb,0x7c] +# CHECK-EB: sdbbp 34 # encoding: [0x00,0x22,0xdb,0x7c] +# CHECK-EB: .set push +# CHECK-EB: .set mips32r2 +# CHECK-EB: rdhwr $5, $29 +# CHECK-EB: .set pop # encoding: [0x00,0xbd,0x6b,0x3c] # CHECK-EB: break # encoding: [0x00,0x00,0x00,0x07] # CHECK-EB: break 7 # encoding: [0x00,0x07,0x00,0x07] # CHECK-EB: break 7, 5 # encoding: [0x00,0x07,0x01,0x47] @@ -42,7 +58,14 @@ # CHECK-EB: ei $10 # encoding: [0x00,0x0a,0x57,0x7c] # CHECK-EB: wait # encoding: [0x00,0x00,0x93,0x7c] # CHECK-EB: wait 17 # encoding: [0x00,0x11,0x93,0x7c] +# CHECK-EB: tlbp # encoding: [0x00,0x00,0x03,0x7c] +# CHECK-EB: tlbr # encoding: [0x00,0x00,0x13,0x7c] +# CHECK-EB: tlbwi # encoding: [0x00,0x00,0x23,0x7c] +# CHECK-EB: tlbwr # encoding: [0x00,0x00,0x33,0x7c] + sdbbp + sdbbp 34 + rdhwr $5, $29 break break 7 break 7,5 @@ -58,3 +81,7 @@ ei $10 wait wait 17 + tlbp + tlbr + tlbwi + tlbwr diff --git a/test/MC/Mips/micromips-fpu-instructions.s b/test/MC/Mips/micromips-fpu-instructions.s index 5af4f98..0aeb326 100644 --- a/test/MC/Mips/micromips-fpu-instructions.s +++ b/test/MC/Mips/micromips-fpu-instructions.s @@ -53,6 +53,8 @@ # CHECK-EL: ctc1 $6, $0 # encoding: [0xc0,0x54,0x3b,0x18] # CHECK-EL: mfc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x20] # CHECK-EL: mtc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x28] +# CHECK-EL: mfhc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x30] +# CHECK-EL: mthc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x38] # CHECK-EL: movz.s $f4, $f6, $7 # encoding: [0xe6,0x54,0x78,0x20] # CHECK-EL: movz.d $f4, $f6, $7 # encoding: [0xe6,0x54,0x78,0x21] # CHECK-EL: movn.s $f4, $f6, $7 # encoding: [0xe6,0x54,0x38,0x20] @@ -116,6 +118,8 @@ # CHECK-EB: ctc1 $6, $0 # encoding: [0x54,0xc0,0x18,0x3b] # CHECK-EB: mfc1 $6, $f8 # encoding: [0x54,0xc8,0x20,0x3b] # CHECK-EB: mtc1 $6, $f8 # encoding: [0x54,0xc8,0x28,0x3b] +# CHECK-EB: mfhc1 $6, $f8 # encoding: [0x54,0xc8,0x30,0x3b] +# CHECK-EB: mthc1 $6, $f8 # encoding: [0x54,0xc8,0x38,0x3b] # CHECK-EB: movz.s $f4, $f6, $7 # encoding: [0x54,0xe6,0x20,0x78] # CHECK-EB: movz.d $f4, $f6, $7 # encoding: [0x54,0xe6,0x21,0x78] # CHECK-EB: movn.s $f4, $f6, $7 # encoding: [0x54,0xe6,0x20,0x38] @@ -175,6 +179,8 @@ ctc1 $6, $0 mfc1 $6, $f8 mtc1 $6, $f8 + mfhc1 $6, $f8 + mthc1 $6, $f8 movz.s $f4, $f6, $7 movz.d $f4, $f6, $7 movn.s $f4, $f6, $7 diff --git a/test/MC/Mips/micromips-invalid.s b/test/MC/Mips/micromips-invalid.s new file mode 100644 index 0000000..779e66e --- /dev/null +++ b/test/MC/Mips/micromips-invalid.s @@ -0,0 +1,31 @@ +# RUN: not llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips 2>%t1 +# RUN: FileCheck %s < %t1 + + addiur1sp $7, 260 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addiur1sp $7, 241 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value + addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addius5 $7, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addu16 $6, $14, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + andi16 $16, $10, 0x1f # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + andi16 $16, $2, 17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + and16 $16, $8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + or16 $16, $10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + xor16 $15, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + sll16 $1, $16, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + srl16 $4, $9, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + sll16 $3, $16, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + srl16 $4, $5, 15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + li16 $8, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + li16 $4, -2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range + lwm32 $5, $6, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected + lwm32 $16, $19, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected + lwm32 $16-$25, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand + swm32 $5, $6, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected + swm32 $16, $19, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected + swm32 $16-$25, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand + lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $24, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand diff --git a/test/MC/Mips/micromips-jump-instructions.s b/test/MC/Mips/micromips-jump-instructions.s index a6c7676..aed18dc 100644 --- a/test/MC/Mips/micromips-jump-instructions.s +++ b/test/MC/Mips/micromips-jump-instructions.s @@ -19,6 +19,10 @@ # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EL: jr $7 # encoding: [0x07,0x00,0x3c,0x0f] # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK-EL: jals 1328 # encoding: [0x00,0x74,0x98,0x02] +# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c] +# CHECK-EL: jalrs $ra, $6 # encoding: [0xe6,0x03,0x3c,0x4f] +# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c] #------------------------------------------------------------------------------ # Big endian #------------------------------------------------------------------------------ @@ -32,9 +36,15 @@ # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EB: jr $7 # encoding: [0x00,0x07,0x0f,0x3c] # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK-EB: jals 1328 # encoding: [0x74,0x00,0x02,0x98] +# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00] +# CHECK-EB: jalrs $ra, $6 # encoding: [0x03,0xe6,0x4f,0x3c] +# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00] j 1328 jal 1328 jalr $ra, $6 jr $7 j $7 + jals 1328 + jalrs $ra, $6 diff --git a/test/MC/Mips/micromips-label-test-sections.s b/test/MC/Mips/micromips-label-test-sections.s new file mode 100644 index 0000000..569b64c --- /dev/null +++ b/test/MC/Mips/micromips-label-test-sections.s @@ -0,0 +1,35 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \ +# RUN: -mattr=+micromips -filetype=obj -o - | llvm-readobj -t | FileCheck %s + .text + .set micromips +f: + nop +g: + .section .text +h: + nop + +# CHECK: Symbols [ +# CHECK: Symbol { +# CHECK: Name: f +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 128 +# CHECK: Section: .text +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: g +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 0 +# CHECK: Section: .text +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: h +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 128 +# CHECK: Section: .text +# CHECK: } +# CHECK: ] + diff --git a/test/MC/Mips/micromips-label-test.s b/test/MC/Mips/micromips-label-test.s new file mode 100644 index 0000000..cc1566b --- /dev/null +++ b/test/MC/Mips/micromips-label-test.s @@ -0,0 +1,54 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \ +# RUN: -mattr=+micromips -filetype=obj -o - | llvm-readobj -t | FileCheck %s + .text + .set nomicromips +f: + nop +g: + .set micromips + nop +h: + .word 0 +i: + nop +j: + .set nomicromips + nop +# CHECK: Symbols [ +# CHECK: Symbol { +# CHECK: Name: f +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 0 +# CHECK: Section: .text +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: g +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 128 +# CHECK: Section: .text +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: h +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 0 +# CHECK: Section: .text +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: i +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 128 +# CHECK: Section: .text +# CHECK: } +# CHECK: Symbol { +# CHECK: Name: j +# CHECK: Binding: Local +# CHECK: Type: None +# CHECK: Other: 0 +# CHECK: Section: .text +# CHECK: } +# CHECK: ] + diff --git a/test/MC/Mips/micromips-loadstore-instructions.s b/test/MC/Mips/micromips-loadstore-instructions.s index 8a1b93b..62fa101 100644 --- a/test/MC/Mips/micromips-loadstore-instructions.s +++ b/test/MC/Mips/micromips-loadstore-instructions.s @@ -9,31 +9,49 @@ #------------------------------------------------------------------------------ # Little endian #------------------------------------------------------------------------------ -# CHECK-EL: lb $5, 8($4) # encoding: [0xa4,0x1c,0x08,0x00] -# CHECK-EL: lbu $6, 8($4) # encoding: [0xc4,0x14,0x08,0x00] -# CHECK-EL: lh $2, 8($4) # encoding: [0x44,0x3c,0x08,0x00] -# CHECK-EL: lhu $4, 8($2) # encoding: [0x82,0x34,0x08,0x00] -# CHECK-EL: lw $6, 4($5) # encoding: [0xc5,0xfc,0x04,0x00] -# CHECK-EL: sb $5, 8($4) # encoding: [0xa4,0x18,0x08,0x00] -# CHECK-EL: sh $2, 8($4) # encoding: [0x44,0x38,0x08,0x00] -# CHECK-EL: sw $5, 4($6) # encoding: [0xa6,0xf8,0x04,0x00] -# CHECK-EL: ll $2, 8($4) # encoding: [0x44,0x60,0x08,0x30] -# CHECK-EL: sc $2, 8($4) # encoding: [0x44,0x60,0x08,0xb0] -# CHECK-EL: lwu $2, 8($4) # encoding: [0x44,0x60,0x08,0xe0] +# CHECK-EL: lb $5, 8($4) # encoding: [0xa4,0x1c,0x08,0x00] +# CHECK-EL: lbu $6, 8($4) # encoding: [0xc4,0x14,0x08,0x00] +# CHECK-EL: lh $2, 8($4) # encoding: [0x44,0x3c,0x08,0x00] +# CHECK-EL: lhu $4, 8($2) # encoding: [0x82,0x34,0x08,0x00] +# CHECK-EL: lw $6, 4($5) # encoding: [0xc5,0xfc,0x04,0x00] +# CHECK-EL: sb $5, 8($4) # encoding: [0xa4,0x18,0x08,0x00] +# CHECK-EL: sh $2, 8($4) # encoding: [0x44,0x38,0x08,0x00] +# CHECK-EL: sw $5, 4($6) # encoding: [0xa6,0xf8,0x04,0x00] +# CHECK-EL: ll $2, 8($4) # encoding: [0x44,0x60,0x08,0x30] +# CHECK-EL: sc $2, 8($4) # encoding: [0x44,0x60,0x08,0xb0] +# CHECK-EL: lwu $2, 8($4) # encoding: [0x44,0x60,0x08,0xe0] +# CHECK-EL: lwxs $2, $3($4) # encoding: [0x64,0x00,0x18,0x11] +# CHECK-EL: lwm32 $16, $17, 8($4) # encoding: [0x44,0x20,0x08,0x50] +# CHECK-EL: lwm32 $16, $17, $18, $19, 8($4) # encoding: [0x84,0x20,0x08,0x50] +# CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, 8($4) # encoding: [0x24,0x21,0x08,0x50] +# CHECK-EL: lwm32 $16, $17, $18, $19, $ra, 8($4) # encoding: [0x84,0x22,0x08,0x50] +# CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0x08,0x50] +# CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0x08,0x50] +# CHECK-EL: swm32 $16, $17, 8($4) # encoding: [0x44,0x20,0x08,0xd0] +# CHECK-EL: swm32 $16, $17, $18, $19, 8($4) # encoding: [0x84,0x20,0x08,0xd0] #------------------------------------------------------------------------------ # Big endian #------------------------------------------------------------------------------ -# CHECK-EB: lb $5, 8($4) # encoding: [0x1c,0xa4,0x00,0x08] -# CHECK-EB: lbu $6, 8($4) # encoding: [0x14,0xc4,0x00,0x08] -# CHECK-EB: lh $2, 8($4) # encoding: [0x3c,0x44,0x00,0x08] -# CHECK-EB: lhu $4, 8($2) # encoding: [0x34,0x82,0x00,0x08] -# CHECK-EB: lw $6, 4($5) # encoding: [0xfc,0xc5,0x00,0x04] -# CHECK-EB: sb $5, 8($4) # encoding: [0x18,0xa4,0x00,0x08] -# CHECK-EB: sh $2, 8($4) # encoding: [0x38,0x44,0x00,0x08] -# CHECK-EB: sw $5, 4($6) # encoding: [0xf8,0xa6,0x00,0x04] -# CHECK-EB: ll $2, 8($4) # encoding: [0x60,0x44,0x30,0x08] -# CHECK-EB: sc $2, 8($4) # encoding: [0x60,0x44,0xb0,0x08] -# CHECK-EB: lwu $2, 8($4) # encoding: [0x60,0x44,0xe0,0x08] +# CHECK-EB: lb $5, 8($4) # encoding: [0x1c,0xa4,0x00,0x08] +# CHECK-EB: lbu $6, 8($4) # encoding: [0x14,0xc4,0x00,0x08] +# CHECK-EB: lh $2, 8($4) # encoding: [0x3c,0x44,0x00,0x08] +# CHECK-EB: lhu $4, 8($2) # encoding: [0x34,0x82,0x00,0x08] +# CHECK-EB: lw $6, 4($5) # encoding: [0xfc,0xc5,0x00,0x04] +# CHECK-EB: sb $5, 8($4) # encoding: [0x18,0xa4,0x00,0x08] +# CHECK-EB: sh $2, 8($4) # encoding: [0x38,0x44,0x00,0x08] +# CHECK-EB: sw $5, 4($6) # encoding: [0xf8,0xa6,0x00,0x04] +# CHECK-EB: ll $2, 8($4) # encoding: [0x60,0x44,0x30,0x08] +# CHECK-EB: sc $2, 8($4) # encoding: [0x60,0x44,0xb0,0x08] +# CHECK-EB: lwu $2, 8($4) # encoding: [0x60,0x44,0xe0,0x08] +# CHECK-EB: lwxs $2, $3($4) # encoding: [0x00,0x64,0x11,0x18] +# CHECK-EB: lwm32 $16, $17, 8($4) # encoding: [0x20,0x44,0x50,0x08] +# CHECK-EB: lwm32 $16, $17, $18, $19, 8($4) # encoding: [0x20,0x84,0x50,0x08] +# CHECK-EB: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, 8($4) # encoding: [0x21,0x24,0x50,0x08] +# CHECK-EB: lwm32 $16, $17, $18, $19, $ra, 8($4) # encoding: [0x22,0x84,0x50,0x08] +# CHECK-EB: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x23,0x24,0x50,0x08] +# CHECK-EB: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x23,0x24,0x50,0x08] +# CHECK-EB: swm32 $16, $17, 8($4) # encoding: [0x20,0x44,0xd0,0x08] +# CHECK-EB: swm32 $16, $17, $18, $19, 8($4) # encoding: [0x20,0x84,0xd0,0x08] lb $5, 8($4) lbu $6, 8($4) lh $2, 8($4) @@ -45,3 +63,12 @@ ll $2, 8($4) sc $2, 8($4) lwu $2, 8($4) + lwxs $2, $3($4) + lwm32 $16, $17, 8($4) + lwm32 $16 - $19, 8($4) + lwm32 $16-$23, $30, 8($4) + lwm32 $16-$19, $31, 8($4) + lwm32 $16-$23, $30, $31, 8($4) + lwm32 $16-$23, $30 - $31, 8($4) + swm32 $16, $17, 8($4) + swm32 $16 - $19, 8($4) diff --git a/test/MC/Mips/mips-expansions-bad.s b/test/MC/Mips/mips-expansions-bad.s index a137deb..8d85169 100644 --- a/test/MC/Mips/mips-expansions-bad.s +++ b/test/MC/Mips/mips-expansions-bad.s @@ -2,5 +2,5 @@ # RUN: FileCheck %s < %t1 .text - li $5, 0x100000000 # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled - dli $5, 1 # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled + li $5, 0x100000000 # CHECK: :[[@LINE]]:9: error: instruction requires a 64-bit architecture + dli $5, 1 # CHECK: :[[@LINE]]:9: error: instruction requires a 64-bit architecture diff --git a/test/MC/Mips/mips-expansions.s b/test/MC/Mips/mips-expansions.s index f0a04a5..bdc76fb 100644 --- a/test/MC/Mips/mips-expansions.s +++ b/test/MC/Mips/mips-expansions.s @@ -17,6 +17,22 @@ # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c] # CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] # CHECK: addu $7, $7, $8 # encoding: [0x21,0x38,0xe8,0x00] +# CHECK: lui $8, %hi(symbol) # encoding: [A,A,0x08,0x3c] + # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] + # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: .set mips64 +# CHECK: lui $8, %highest(symbol) # encoding: [A,A,0x08,0x3c] + # fixup A - offset: 0, value: symbol@HIGHEST, kind: fixup_Mips_HIGHEST +# CHECK: ori $8, $8, %higher(symbol) # encoding: [A,A,0x08,0x35] + # fixup A - offset: 0, value: symbol@HIGHER, kind: fixup_Mips_HIGHER +# CHECK: dsll $8, $8, 16 # encoding: [0x38,0x44,0x08,0x00] +# CHECK: ori $8, $8, %hi(symbol) # encoding: [A,A,0x08,0x35] + # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: dsll $8, $8, 16 # encoding: [0x38,0x44,0x08,0x00] +# CHECK: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] + # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: .set mips32r2 # CHECK: lui $10, %hi(symbol) # encoding: [A,A,0x0a,0x3c] # CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 # CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01] @@ -48,6 +64,10 @@ la $7,65538 la $a0, 20($a1) la $7,65538($8) + la $t0, symbol + .set mips64 + la $t0, symbol + .set mips32r2 .set noat lw $t2, symbol($a0) diff --git a/test/MC/Mips/mips-hwr-register-names.s b/test/MC/Mips/mips-hwr-register-names.s new file mode 100644 index 0000000..3849675 --- /dev/null +++ b/test/MC/Mips/mips-hwr-register-names.s @@ -0,0 +1,199 @@ +# Check the hardware registers +# +# FIXME: Use the code generator in order to print the .set directives +# instead of the instruction printer. +# +# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ +# RUN: FileCheck %s + .set noat + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $hwr_cpunum + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b] + rdhwr $a0,$hwr_cpunum + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $hwr_cpunum + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b] + rdhwr $a0,$0 + + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $5, $hwr_synci_step + # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b] + rdhwr $a1,$hwr_synci_step + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $5, $hwr_synci_step + # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b] + rdhwr $a1,$1 + + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $6, $hwr_cc + # CHECK-NEXT: .set pop # encoding: [0x7c,0x06,0x10,0x3b] + rdhwr $a2,$hwr_cc + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $6, $hwr_cc + # CHECK-NEXT: .set pop # encoding: [0x7c,0x06,0x10,0x3b] + rdhwr $a2,$2 + + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $7, $hwr_ccres + # CHECK-NEXT: .set pop # encoding: [0x7c,0x07,0x18,0x3b] + rdhwr $a3,$hwr_ccres + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $7, $hwr_ccres + # CHECK-NEXT: .set pop # encoding: [0x7c,0x07,0x18,0x3b] + rdhwr $a3,$3 + + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $4 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x20,0x3b] + rdhwr $a0,$4 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $5 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x28,0x3b] + rdhwr $a0,$5 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $6 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x30,0x3b] + rdhwr $a0,$6 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $7 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x38,0x3b] + rdhwr $a0,$7 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $8 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x40,0x3b] + rdhwr $a0,$8 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $9 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x48,0x3b] + rdhwr $a0,$9 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $10 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x50,0x3b] + rdhwr $a0,$10 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $11 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x58,0x3b] + rdhwr $a0,$11 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $12 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x60,0x3b] + rdhwr $a0,$12 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $13 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x68,0x3b] + rdhwr $a0,$13 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $14 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x70,0x3b] + rdhwr $a0,$14 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $15 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x78,0x3b] + rdhwr $a0,$15 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $16 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x80,0x3b] + rdhwr $a0,$16 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $17 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x88,0x3b] + rdhwr $a0,$17 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $18 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x90,0x3b] + rdhwr $a0,$18 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $19 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x98,0x3b] + rdhwr $a0,$19 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $20 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xa0,0x3b] + rdhwr $a0,$20 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $21 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xa8,0x3b] + rdhwr $a0,$21 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $22 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xb0,0x3b] + rdhwr $a0,$22 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $23 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xb8,0x3b] + rdhwr $a0,$23 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $24 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xc0,0x3b] + rdhwr $a0,$24 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $25 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xc8,0x3b] + rdhwr $a0,$25 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $26 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xd0,0x3b] + rdhwr $a0,$26 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $27 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xd8,0x3b] + rdhwr $a0,$27 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $28 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xe0,0x3b] + rdhwr $a0,$28 + + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $29 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xe8,0x3b] + rdhwr $a0,$29 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $29 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xe8,0x3b] + rdhwr $a0,$hwr_ulr + + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $30 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xf0,0x3b] + rdhwr $a0,$30 + # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $4, $31 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xf8,0x3b] + rdhwr $a0,$31 diff --git a/test/MC/Mips/mips-jump-delay-slots.s b/test/MC/Mips/mips-jump-delay-slots.s new file mode 100644 index 0000000..49f6c15 --- /dev/null +++ b/test/MC/Mips/mips-jump-delay-slots.s @@ -0,0 +1,122 @@ +# Verify that every branch and jump instruction is followed by a delay slot +# except for the branch likely instructions. +# +# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s + + .set noat + # CHECK: b 1332 + # CHECK: nop + b 1332 + # CHECK: bc1f 1332 + # CHECK: nop + bc1f 1332 + # CHECK: bc1t 1332 + # CHECK: nop + bc1t 1332 + # CHECK: beq $9, $6, 1332 + # CHECK: nop + beq $9,$6,1332 + # CHECK: bgez $6, 1332 + # CHECK: nop + bgez $6,1332 + # CHECK: bgezal $6, 1332 + # CHECK: nop + bgezal $6,1332 + # CHECK: bgtz $6, 1332 + # CHECK: nop + bgtz $6,1332 + # CHECK: blez $6, 1332 + # CHECK: nop + blez $6,1332 + # CHECK: bltz $6, 1332 + # CHECK: nop + bltz $6,1332 + # CHECK: bne $9, $6, 1332 + # CHECK: nop + bne $9,$6,1332 + # CHECK: bltzal $6, 1332 + # CHECK: nop + bltzal $6,1332 + # CHECK: bal 1332 + # CHECK: nop + bal 1332 + # CHECK: bnez $11, 1332 + # CHECK: nop + bnez $11,1332 + # CHECK: beqz $11, 1332 + # CHECK: nop + beqz $11,1332 + + # CHECK: bc1fl 1332 + # CHECK-NOT: nop + bc1fl 1332 + # CHECK: bc1fl 1332 + # CHECK-NOT: nop + bc1fl $fcc0, 1332 + # CHECK: bc1fl $fcc3, 1332 + # CHECK-NOT: nop + bc1fl $fcc3, 1332 + # CHECK: bc1tl 1332 + # CHECK-NOT: nop + bc1tl 1332 + # CHECK: bc1tl 1332 + # CHECK-NOT: nop + bc1tl $fcc0, 1332 + # CHECK: bc1tl $fcc3, 1332 + # CHECK-NOT: nop + bc1tl $fcc3, 1332 + # CHECK: beql $9, $6, 1332 + # CHECK-NOT: nop + beql $9,$6,1332 + # CHECK: bnel $9, $6, 1332 + # CHECK-NOT: nop + bnel $9,$6,1332 + # CHECK: bgezl $6, 1332 + # CHECK-NOT: nop + bgezl $6,1332 + # CHECK: bgtzl $6, 1332 + # CHECK-NOT: nop + bgtzl $6,1332 + # CHECK: blezl $6, 1332 + # CHECK-NOT: nop + blezl $6,1332 + # CHECK: bltzl $6, 1332 + # CHECK-NOT: nop + bltzl $6,1332 + # CHECK: bgezall $6, 1332 + # CHECK-NOT: nop + bgezall $6,1332 + # CHECK: bltzall $6, 1332 + # CHECK-NOT: nop + bltzall $6,1332 + + # CHECK: j 1328 + # CHECK: nop + j 1328 + # CHECK: jal 1328 + # CHECK: nop + jal 1328 + # CHECK: jalr $6 + # CHECK: nop + jalr $6 + # CHECK: jalr $25 + # CHECK: nop + jalr $31,$25 + # CHECK: jalr $10, $11 + # CHECK: nop + jalr $10,$11 + # CHECK: jr $7 + # CHECK: nop + jr $7 + # CHECK: jr $7 + # CHECK: nop + j $7 + # CHECK: jalr $25 + # CHECK: nop + jal $25 + # CHECK: jalr $4, $25 + # CHECK: nop + jal $4,$25 + # CHECK: jalx lab + # CHECK: nop + jalx lab diff --git a/test/MC/Mips/mips-noat.s b/test/MC/Mips/mips-noat.s index 07db251..f9d4efd 100644 --- a/test/MC/Mips/mips-noat.s +++ b/test/MC/Mips/mips-noat.s @@ -12,7 +12,7 @@ test1: test2: .set noat - lw $2, 65536($2) # ERROR: mips-noat.s:[[@LINE]]:9: error: Pseudo instruction requires $at, which is not available + lw $2, 65536($2) # ERROR: mips-noat.s:[[@LINE]]:9: error: pseudo-instruction requires $at, which is not available # Can we switch it back on successfully? @@ -26,4 +26,4 @@ test3: test4: .set at=$0 - lw $2, 65536($2) # ERROR: mips-noat.s:[[@LINE]]:9: error: Pseudo instruction requires $at, which is not available + lw $2, 65536($2) # ERROR: mips-noat.s:[[@LINE]]:9: error: pseudo-instruction requires $at, which is not available diff --git a/test/MC/Mips/mips-pdr-bad.s b/test/MC/Mips/mips-pdr-bad.s new file mode 100644 index 0000000..40c6ba2 --- /dev/null +++ b/test/MC/Mips/mips-pdr-bad.s @@ -0,0 +1,42 @@ +# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1 +# RUN: FileCheck %s < %t1 -check-prefix=ASM + + .text + + .ent # ASM: :[[@LINE]]:14: error: expected identifier after .ent + .ent bar, # ASM: :[[@LINE]]:19: error: expected number after comma + .ent foo, bar # AMS: :[[@LINE]]:23: error: expected an absolute expression after comma + .ent foo, 5, bar # AMS: :[[@LINE]]:20: error: unexpected token, expected end of statement + + .frame # ASM: :[[@LINE]]:16: error: expected stack register + .frame bar # ASM: :[[@LINE]]:16: error: expected stack register + .frame $f1, 8, # ASM: :[[@LINE]]:16: error: expected general purpose register + .frame $sp # ASM: :[[@LINE]]:20: error: unexpected token, expected comma + .frame $sp, # ASM: :[[@LINE]]:21: error: expected frame size value + .frame $sp, bar # ASM: :[[@LINE]]:25: error: frame size not an absolute expression + .frame $sp, 8 # ASM: :[[@LINE]]:23: error: unexpected token, expected comma + .frame $sp, 8, # ASM: :[[@LINE]]:24: error: expected return register + .frame $sp, 8, $f1 # ASM: :[[@LINE]]:24: error: expected general purpose register + .frame $sp, 8, $ra, foo # ASM: :[[@LINE]]:27: error: unexpected token, expected end of statement + + .mask # ASM: :[[@LINE]]:16: error: expected bitmask value + .mask foo # ASM: :[[@LINE]]:19: error: bitmask not an absolute expression + .mask 0x80000000 # ASM: :[[@LINE]]:26: error: unexpected token, expected comma + .mask 0x80000000, # ASM: :[[@LINE]]:27: error: expected frame offset value + .mask 0x80000000, foo # ASM: :[[@LINE]]:31: error: frame offset not an absolute expression + .mask 0x80000000, -4, bar # ASM: :[[@LINE]]:29: error: unexpected token, expected end of statement + + .fmask # ASM: :[[@LINE]]:17: error: expected bitmask value + .fmask foo # ASM: :[[@LINE]]:20: error: bitmask not an absolute expression + .fmask 0x80000000 # ASM: :[[@LINE]]:27: error: unexpected token, expected comma + .fmask 0x80000000, # ASM: :[[@LINE]]:28: error: expected frame offset value + .fmask 0x80000000, foo # ASM: :[[@LINE]]:32: error: frame offset not an absolute expression + .fmask 0x80000000, -4, bar # ASM: :[[@LINE]]:30: error: unexpected token, expected end of statement + + .end # ASM: :[[@LINE]]:14: error: expected identifier after .end + .ent _local_foo_bar + .end _local_foo_bar, foo # ASM: :[[@LINE]]:28: error: unexpected token, expected end of statement + .end _local_foo_bar + .end _local_foo # ASM: :[[@LINE]]:25: error: .end used without .ent + .ent _local_foo, 2 + .end _local_foo_bar # ASM: :[[@LINE]]:29: error: .end symbol does not match .ent symbol diff --git a/test/MC/Mips/mips-pdr.s b/test/MC/Mips/mips-pdr.s new file mode 100644 index 0000000..372c259 --- /dev/null +++ b/test/MC/Mips/mips-pdr.s @@ -0,0 +1,64 @@ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=asm | \ +# RUN: FileCheck %s -check-prefix=ASMOUT + +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \ +# RUN: llvm-readobj -s -section-data | \ +# RUN: FileCheck %s -check-prefix=OBJOUT + +# ASMOUT: .text +# ASMOUT: .type _local_foo,@function +# ASMOUT: .ent _local_foo +# ASMOUT:_local_foo: +# ASMOUT: .frame $fp,16,$ra +# ASMOUT: .mask 0x10101010,-4 +# ASMOUT: .fmask 0x01010101,-8 +# ASMOUT: .end _local_foo +# ASMOUT: .size local_foo, + +# OBJOUT: Section { +# OBJOUT: Name: .pdr +# OBJOUT: Type: SHT_PROGBITS (0x1) +# OBJOUT: Flags [ (0xB) +# OBJOUT: SHF_ALLOC (0x2) +# OBJOUT: SHF_WRITE (0x1) +# OBJOUT: ] +# OBJOUT: Size: 64 +# OBJOUT: SectionData ( +# OBJOUT: 0000: 00000000 10101010 FFFFFFFC 01010101 +# OBJOUT: 0010: FFFFFFF8 00000010 0000001E 0000001F +# OBJOUT: 0020: 00000000 10101010 FFFFFFFC 01010101 +# OBJOUT: 0030: FFFFFFF8 00000010 0000001E 0000001F +# OBJOUT: ) +# OBJOUT: } + +# We should also check if relocation information was correctly generated. +# OBJOUT: Section { +# OBJOUT: Name: .rel.pdr +# OBJOUT: Type: SHT_REL (0x9) +# OBJOUT: Flags [ (0x0) +# OBJOUT: ] +# OBJOUT: Size: 16 +# OBJOUT: SectionData ( +# OBJOUT: 0000: 00000000 00000202 00000020 00000802 +# OBJOUT: ) +# OBJOUT: } + +.text + .type _local_foo,@function + .ent _local_foo +_local_foo: + .frame $fp,16,$ra + .mask 0x10101010,-4 + .fmask 0x01010101,-8 + .end _local_foo + .size local_foo,.-_local_foo + + .globl _global_foo + .type _global_foo,@function + .ent _global_foo +_global_foo: + .frame $fp,16,$ra + .mask 0x10101010,-4 + .fmask 0x01010101,-8 + .end _global_foo + .size global_foo,.-_global_foo diff --git a/test/MC/Mips/mips-reginfo-fp32.s b/test/MC/Mips/mips-reginfo-fp32.s new file mode 100644 index 0000000..5b31884 --- /dev/null +++ b/test/MC/Mips/mips-reginfo-fp32.s @@ -0,0 +1,34 @@ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \ +# RUN: llvm-readobj -s -section-data | \ +# RUN: FileCheck %s + +# CHECK: Section { +# CHECK: Index: +# CHECK: Name: .reginfo +# CHECK: Type: SHT_MIPS_REGINFO (0x70000006) +# CHECK: Flags [ (0x2) +# CHECK: SHF_ALLOC (0x2) +# CHECK: ] +# CHECK: Size: 24 +# CHECK: SectionData ( +# CHECK: 0000: 01010101 00000000 C0007535 00000000 +# CHECK: 0010: 00000000 00000000 +# CHECK: ) +# CHECK: } + +.text + add $0,$0,$0 + add $8,$0,$0 + add $16,$0,$0 + add $24,$0,$0 + +# abs.s - Reads and writes from/to $f0. + abs.s $f0,$f0 +# round.w.d - Reads $f4 and $f5 and writes to $f2. + round.w.d $f2,$f4 +# ceil.w.s - Reads $f8 and writes to $f10. + ceil.w.s $f10, $f8 +# cvt.s.d - Reads from $f12 and $f13 and writes to $f14 + cvt.s.d $f14, $f12 +# abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31. + abs.d $f30,$f30 diff --git a/test/MC/Mips/mips-reginfo-fp64.s b/test/MC/Mips/mips-reginfo-fp64.s new file mode 100644 index 0000000..b60e54e --- /dev/null +++ b/test/MC/Mips/mips-reginfo-fp64.s @@ -0,0 +1,60 @@ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa,+fp64 -filetype=obj -o - | \ +# RUN: llvm-readobj -s -section-data | \ +# RUN: FileCheck %s -check-prefix=ELF32 + +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64,-n64,+n32 -filetype=obj -o - | \ +# RUN: llvm-readobj -s -section-data | \ +# RUN: FileCheck %s -check-prefix=ELF32 + +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64,+n64 -filetype=obj -o - | \ +# RUN: llvm-readobj -s -section-data | \ +# RUN: FileCheck %s -check-prefix=ELF64 + +# ELF32: Section { +# ELF32: Name: .reginfo +# ELF32: Type: SHT_MIPS_REGINFO (0x70000006) +# ELF32: Flags [ (0x2) +# ELF32: SHF_ALLOC (0x2) +# ELF32: ] +# ELF32: Size: 24 +# ELF32: SectionData ( +# ELF32: 0000: 01010101 00000000 4C005515 00000000 +# ELF32: 0010: 00000000 00000000 +# ELF32: ) +# ELF32: } + +# ELF64: Section { +# ELF64: Name: .MIPS.options +# ELF64: Type: SHT_MIPS_OPTIONS (0x7000000D) +# ELF64: Flags [ (0x8000002) +# ELF64: SHF_ALLOC (0x2) +# ELF64: SHF_MIPS_NOSTRIP (0x8000000) +# ELF64: ] +# ELF64: Size: 40 +# ELF64: SectionData ( +# ELF64: 0000: 01280000 00000000 01010101 00000000 +# ELF64: 0010: 00000000 4C005515 00000000 00000000 +# ELF64: 0020: 00000000 00000000 +# ELF64: ) +# ELF64: } + +.text + add $0,$0,$0 + add $8,$0,$0 + add $16,$0,$0 + add $24,$0,$0 + +# abs.s - Reads and writes from/to $f0. + abs.s $f0,$f0 +# round.w.d - Reads $f4 and writes to $f2. + round.w.d $f2,$f4 +# ceil.w.s - Reads $f8 and writes to $f10. + ceil.w.s $f10, $f8 +# cvt.s.d - Reads from $f12 and writes to $f14. + cvt.s.d $f14, $f12 +# abs.d - Reads from $f30 and writes to $f30. + abs.d $f30,$f30 + +# Read and write from/to $f26 and $f27 + add_a.b $w26,$w26,$w26 + add_a.b $w27,$w27,$w27 diff --git a/test/MC/Mips/mips1/invalid-mips2.s b/test/MC/Mips/mips1/invalid-mips2.s index 7db261d..29bd223 100644 --- a/test/MC/Mips/mips1/invalid-mips2.s +++ b/test/MC/Mips/mips1/invalid-mips2.s @@ -5,6 +5,18 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.w.d $f14,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled @@ -13,11 +25,23 @@ round.w.s $f27,$f28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled sqrt.d $f17,$f22 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled sqrt.s $f0,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + teq $0,$3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + teq $5,$7,620 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled teqi $s5,-17504 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tge $7,$10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tge $5,$19,340 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled tgei $s1,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled tgeiu $sp,-28621 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tgeu $22,$28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tgeu $20,$14,379 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tlt $15,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tlt $2,$19,133 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled tlti $t6,-21059 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled tltiu $ra,-5076 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tltu $11,$16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tltu $16,$29,1016 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tne $6,$17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + tne $7,$8,885 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled tnei $t4,-29647 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled trunc.w.d $f22,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled trunc.w.s $f28,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips1/invalid-mips3.s b/test/MC/Mips/mips1/invalid-mips3.s index d1b0eec..d4be08e 100644 --- a/test/MC/Mips/mips1/invalid-mips3.s +++ b/test/MC/Mips/mips1/invalid-mips3.s @@ -19,6 +19,8 @@ daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + daddu $24,$2,18079 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + daddu $19,26943 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ddiv $zero,$k0,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ddivu $zero,$s0,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dmfc1 $12,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled @@ -43,6 +45,8 @@ dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsrlv $s3,$14,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsubu $a1,$a1,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + dsubu $15,$11,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + dsubu $14,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.l.d $f26,$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.l.s $f12,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.w.d $f14,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips1/invalid-mips32r2.s b/test/MC/Mips/mips1/invalid-mips32r2.s new file mode 100644 index 0000000..679f21f --- /dev/null +++ b/test/MC/Mips/mips1/invalid-mips32r2.s @@ -0,0 +1,11 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips1/invalid-mips4-wrong-error.s b/test/MC/Mips/mips1/invalid-mips4-wrong-error.s index 2016e70..cec30c8 100644 --- a/test/MC/Mips/mips1/invalid-mips4-wrong-error.s +++ b/test/MC/Mips/mips1/invalid-mips4-wrong-error.s @@ -6,6 +6,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips1/invalid-mips5-wrong-error.s b/test/MC/Mips/mips1/invalid-mips5-wrong-error.s index 74473a3..18c0b61 100644 --- a/test/MC/Mips/mips1/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips1/invalid-mips5-wrong-error.s @@ -6,41 +6,41 @@ # RUN: FileCheck %s < %t1 .set noat - abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips1/valid.s b/test/MC/Mips/mips1/valid.s index 66e11ba..53ff6a0 100644 --- a/test/MC/Mips/mips1/valid.s +++ b/test/MC/Mips/mips1/valid.s @@ -10,7 +10,10 @@ add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] @@ -97,6 +100,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 diff --git a/test/MC/Mips/mips2/invalid-mips3.s b/test/MC/Mips/mips2/invalid-mips3.s index 458c416..e72b228 100644 --- a/test/MC/Mips/mips2/invalid-mips3.s +++ b/test/MC/Mips/mips2/invalid-mips3.s @@ -15,6 +15,8 @@ daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + daddu $24,$2,18079 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + daddu $19,26943 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ddiv $zero,$k0,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ddivu $zero,$s0,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled @@ -40,6 +42,8 @@ dsrlv $s3,$t2,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsub $a3,$s6,$a4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dsubu $a1,$a1,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + dsubu $15,$11,5025 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + dsubu $14,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled eret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.l.d $f26,$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled floor.l.s $f12,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips2/invalid-mips32r2.s b/test/MC/Mips/mips2/invalid-mips32r2.s index 72a570a..6dc8159 100644 --- a/test/MC/Mips/mips2/invalid-mips32r2.s +++ b/test/MC/Mips/mips2/invalid-mips32r2.s @@ -13,7 +13,9 @@ cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled eret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ldxc1 $f8,$s7($t7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips2/invalid-mips4-wrong-error.s b/test/MC/Mips/mips2/invalid-mips4-wrong-error.s index 193f6d7..28a98ba 100644 --- a/test/MC/Mips/mips2/invalid-mips4-wrong-error.s +++ b/test/MC/Mips/mips2/invalid-mips4-wrong-error.s @@ -6,6 +6,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction scd $15,-8243($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips2/invalid-mips5-wrong-error.s b/test/MC/Mips/mips2/invalid-mips5-wrong-error.s index 0c58c6c..5eaeaa2 100644 --- a/test/MC/Mips/mips2/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips2/invalid-mips5-wrong-error.s @@ -6,41 +6,41 @@ # RUN: FileCheck %s < %t1 .set noat - abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips2/valid.s b/test/MC/Mips/mips2/valid.s index 9c3706e..34843bc 100644 --- a/test/MC/Mips/mips2/valid.s +++ b/test/MC/Mips/mips2/valid.s @@ -6,21 +6,36 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] + bc1fl 50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,-8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] + bc1tl -8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 c.sf.d $f30,$f0 @@ -113,6 +128,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -123,15 +140,27 @@ swl $15,13694($s3) swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 diff --git a/test/MC/Mips/mips3/invalid-mips32r2.s b/test/MC/Mips/mips3/invalid-mips32r2.s new file mode 100644 index 0000000..178e0f0 --- /dev/null +++ b/test/MC/Mips/mips3/invalid-mips32r2.s @@ -0,0 +1,11 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips3 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips3/invalid-mips4-wrong-error.s b/test/MC/Mips/mips3/invalid-mips4-wrong-error.s new file mode 100644 index 0000000..c9af39a --- /dev/null +++ b/test/MC/Mips/mips3/invalid-mips4-wrong-error.s @@ -0,0 +1,10 @@ +# Instructions that are invalid and are correctly rejected but use the wrong +# error message at the moment. +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips3 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips3/invalid-mips5-wrong-error.s b/test/MC/Mips/mips3/invalid-mips5-wrong-error.s index 2c0246a..cf809d3 100644 --- a/test/MC/Mips/mips3/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips3/invalid-mips5-wrong-error.s @@ -6,41 +6,41 @@ # RUN: FileCheck %s < %t1 .set noat - abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips3/valid.s b/test/MC/Mips/mips3/valid.s index cb209fd..a55576d 100644 --- a/test/MC/Mips/mips3/valid.s +++ b/test/MC/Mips/mips3/valid.s @@ -6,21 +6,36 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] + bc1fl 50 # CHECK: bc1fl 50 # encoding: [0x45,0x02,0x00,0x0c] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,-8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] + bc1tl -8239 # CHECK: bc1tl -8239 # encoding: [0x45,0x03,0xf7,0xf4] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -50,6 +65,8 @@ daddi $sp,-27705 # CHECK: daddi $sp, $sp, -27705 # encoding: [0x63,0xbd,0x93,0xc7] daddiu $k0,$s6,-4586 daddu $s3,$at,$ra + daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f] + daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] ddiv $zero,$k0,$s3 ddivu $zero,$s0,$s1 div $zero,$25,$11 @@ -84,6 +101,8 @@ dsubi $sp,$s4,-27705 # CHECK: daddi $sp, $20, 27705 # encoding: [0x62,0x9d,0x6c,0x39] dsubi $sp,-27705 # CHECK: daddi $sp, $sp, 27705 # encoding: [0x63,0xbd,0x6c,0x39] dsubu $a1,$a1,$k0 + dsubu $15,$11,5025 # CHECK: daddiu $15, $11, -5025 # encoding: [0x65,0x6f,0xec,0x5f] + dsubu $14,-4586 # CHECK: daddiu $14, $14, 4586 # encoding: [0x65,0xce,0x11,0xea] ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 @@ -171,6 +190,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -180,15 +201,27 @@ swl $15,13694($s3) swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.l.d $f23,$f23 trunc.l.s $f28,$f31 diff --git a/test/MC/Mips/mips32/abiflags.s b/test/MC/Mips/mips32/abiflags.s index 896dd84..dd772c0 100644 --- a/test/MC/Mips/mips32/abiflags.s +++ b/test/MC/Mips/mips32/abiflags.s @@ -8,27 +8,26 @@ # CHECK-ASM: .module fp=32 # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002001 01010001 00000000 00000000 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00002001 01010001 00000000 00000000 |.. .............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=32 diff --git a/test/MC/Mips/mips32/invalid-mips32r2.s b/test/MC/Mips/mips32/invalid-mips32r2.s index fa6fe32..07a1e8f 100644 --- a/test/MC/Mips/mips32/invalid-mips32r2.s +++ b/test/MC/Mips/mips32/invalid-mips32r2.s @@ -8,7 +8,9 @@ cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ldxc1 $f8,$s7($t7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s index d330905..d79c390 100644 --- a/test/MC/Mips/mips32/valid.s +++ b/test/MC/Mips/mips32/valid.s @@ -6,23 +6,40 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -141,6 +158,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -151,15 +170,27 @@ swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 diff --git a/test/MC/Mips/mips32r2/abiflags.s b/test/MC/Mips/mips32r2/abiflags.s index 41a809a..e3bb15b 100644 --- a/test/MC/Mips/mips32r2/abiflags.s +++ b/test/MC/Mips/mips32r2/abiflags.s @@ -9,27 +9,26 @@ # CHECK-ASM: .set fp=64 # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002002 01010001 00000000 00000000 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00002002 01010001 00000000 00000000 |.. .............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=32 .set fp=64 diff --git a/test/MC/Mips/mips32r2/valid.s b/test/MC/Mips/mips32r2/valid.s index 631c691..4ef5aab 100644 --- a/test/MC/Mips/mips32r2/valid.s +++ b/test/MC/Mips/mips32r2/valid.s @@ -6,23 +6,40 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -43,13 +60,15 @@ cvt.w.d $f20,$f14 cvt.w.s $f20,$f24 deret - di $s8 + di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00] + di # CHECK: di # encoding: [0x41,0x60,0x60,0x00] div $zero,$25,$11 div.d $f29,$f20,$f27 div.s $f4,$f5,$f15 divu $zero,$25,$15 ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] - ei $14 + ei $14 # CHECK: ei $14 # encoding: [0x41,0x6e,0x60,0x20] + ei # CHECK: ei # encoding: [0x41,0x60,0x60,0x20] eret floor.w.d $f14,$f11 floor.w.s $f8,$f9 @@ -132,7 +151,12 @@ or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] - rdhwr $sp,$11 + # FIXME: Use the code generator in order to print the .set directives + # instead of the instruction printer. + rdhwr $sp,$11 # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $sp, $11 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] @@ -169,6 +193,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -181,15 +207,27 @@ swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 diff --git a/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s index 52fa5f5..cc7d403 100644 --- a/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s @@ -5,13 +5,13 @@ # RUN: FileCheck %s < %t1 .set noat - bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwr $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction - lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips32r6/invalid-mips1.s b/test/MC/Mips/mips32r6/invalid-mips1.s index 44d4fbb..94810f4 100644 --- a/test/MC/Mips/mips32r6/invalid-mips1.s +++ b/test/MC/Mips/mips32r6/invalid-mips1.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + add $9,$14,15176 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + add $24,-7193 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled c.ngl.d $f29,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled c.ngle.d $f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled @@ -22,3 +24,5 @@ multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled # div has been re-encoded. See valid.s # divu has been re-encoded. See valid.s + sub $22,$17,-3126 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + sub $13,6512 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s index b799c8e..1cec777 100644 --- a/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s @@ -6,15 +6,5 @@ # RUN: FileCheck %s < %t1 .set noat - beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips32r6/invalid-mips2.s b/test/MC/Mips/mips32r6/invalid-mips2.s index bfa2c4c..642d6bd 100644 --- a/test/MC/Mips/mips32r6/invalid-mips2.s +++ b/test/MC/Mips/mips32r6/invalid-mips2.s @@ -6,6 +6,18 @@ .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s index e63bdd4..3131c5a 100644 --- a/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s @@ -6,15 +6,11 @@ # RUN: FileCheck %s < %t1 .set noat - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips32r6/invalid-mips32.s b/test/MC/Mips/mips32r6/invalid-mips32.s index e0889ea..b2330c2 100644 --- a/test/MC/Mips/mips32r6/invalid-mips32.s +++ b/test/MC/Mips/mips32r6/invalid-mips32.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled maddu $s3,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s index f3131a9..06bf58c 100644 --- a/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s @@ -6,16 +6,6 @@ # RUN: FileCheck %s < %t1 .set noat - beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips32r6/invalid-mips4.s b/test/MC/Mips/mips32r6/invalid-mips4.s index 8ba2ed8..9d8f02f 100644 --- a/test/MC/Mips/mips32r6/invalid-mips4.s +++ b/test/MC/Mips/mips32r6/invalid-mips4.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ldxc1 $f8,$s7($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled sdxc1 $f11,$10($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s index 99d10c3..b5d7380 100644 --- a/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s @@ -5,7 +5,7 @@ # RUN: FileCheck %s < %t1 .set noat - bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips32r6/valid.s b/test/MC/Mips/mips32r6/valid.s index f23dbd7..362785b 100644 --- a/test/MC/Mips/mips32r6/valid.s +++ b/test/MC/Mips/mips32r6/valid.s @@ -17,6 +17,7 @@ # FIXME: Add the instructions carried forward from older ISA's and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0xec,0x80,0x00,0x19] + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] align $4, $2, $3, 2 # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0] aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0xec,0x7f,0x00,0x38] aui $3,$2,-23 # CHECK: aui $3, $2, -23 # encoding: [0x3c,0x62,0xff,0xe9] @@ -96,8 +97,12 @@ cmp.sle.d $f2,$f3,$f4 # CHECK: cmp.sle.d $f2, $f3, $f4 # encoding: [0x46,0xa4,0x18,0x8e] cmp.sule.s $f2,$f3,$f4 # CHECK: cmp.sule.s $f2, $f3, $f4 # encoding: [0x46,0x84,0x18,0x8f] cmp.sule.d $f2,$f3,$f4 # CHECK: cmp.sule.d $f2, $f3, $f4 # encoding: [0x46,0xa4,0x18,0x8f] + di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00] + di # CHECK: di # encoding: [0x41,0x60,0x60,0x00] div $2,$3,$4 # CHECK: div $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9a] divu $2,$3,$4 # CHECK: divu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9b] + ei $14 # CHECK: ei $14 # encoding: [0x41,0x6e,0x60,0x20] + ei # CHECK: ei # encoding: [0x41,0x60,0x60,0x20] jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00] jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xd8,0x05,0x01,0x00] lsa $2, $3, $4, 3 # CHECK: lsa $2, $3, $4, 3 # encoding: [0x00,0x64,0x10,0xc5] @@ -114,6 +119,12 @@ msubf.s $f2,$f3,$f4 # CHECK: msubf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x99] msubf.d $f2,$f3,$f4 # CHECK: msubf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x99] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35] + # FIXME: Use the code generator in order to print the .set directives + # instead of the instruction printer. + rdhwr $sp,$11 # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $sp, $11 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] sel.d $f0,$f1,$f2 # CHECK: sel.d $f0, $f1, $f2 # encoding: [0x46,0x22,0x08,0x10] sel.s $f0,$f1,$f2 # CHECK: sel.s $f0, $f1, $f2 # encoding: [0x46,0x02,0x08,0x10] seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x64,0x10,0x35] @@ -152,3 +163,15 @@ sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e] sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] diff --git a/test/MC/Mips/mips4/invalid-mips32r2.s b/test/MC/Mips/mips4/invalid-mips32r2.s new file mode 100644 index 0000000..3e78758 --- /dev/null +++ b/test/MC/Mips/mips4/invalid-mips32r2.s @@ -0,0 +1,11 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips4 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips4/invalid-mips5-wrong-error.s b/test/MC/Mips/mips4/invalid-mips5-wrong-error.s index c6c8968..5c8ab23 100644 --- a/test/MC/Mips/mips4/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips4/invalid-mips5-wrong-error.s @@ -6,41 +6,41 @@ # RUN: FileCheck %s < %t1 .set noat - abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips4/valid.s b/test/MC/Mips/mips4/valid.s index 949b91d..c221b76 100644 --- a/test/MC/Mips/mips4/valid.s +++ b/test/MC/Mips/mips4/valid.s @@ -6,23 +6,40 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -52,6 +69,8 @@ daddi $sp,-27705 # CHECK: daddi $sp, $sp, -27705 # encoding: [0x63,0xbd,0x93,0xc7] daddiu $k0,$s6,-4586 daddu $s3,$at,$ra + daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f] + daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] ddiv $zero,$k0,$s3 ddivu $zero,$s0,$s1 div $zero,$25,$11 @@ -86,6 +105,8 @@ dsubi $sp,$s4,-27705 # CHECK: daddi $sp, $20, 27705 # encoding: [0x62,0x9d,0x6c,0x39] dsubi $sp,-27705 # CHECK: daddi $sp, $sp, 27705 # encoding: [0x63,0xbd,0x6c,0x39] dsubu $a1,$a1,$k0 + dsubu $15,$11,5025 # CHECK: daddiu $15, $11, -5025 # encoding: [0x65,0x6f,0xec,0x5f] + dsubu $14,-4586 # CHECK: daddiu $14, $14, 4586 # encoding: [0x65,0xce,0x11,0xea] ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 @@ -189,6 +210,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -199,15 +222,27 @@ swr $s1,-26590($14) swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.l.d $f23,$f23 trunc.l.s $f28,$f31 diff --git a/test/MC/Mips/mips5/invalid-mips32r2.s b/test/MC/Mips/mips5/invalid-mips32r2.s new file mode 100644 index 0000000..a369efa --- /dev/null +++ b/test/MC/Mips/mips5/invalid-mips32r2.s @@ -0,0 +1,11 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips5 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips5/valid.s b/test/MC/Mips/mips5/valid.s index 3afdee1..b93b22f 100644 --- a/test/MC/Mips/mips5/valid.s +++ b/test/MC/Mips/mips5/valid.s @@ -6,23 +6,40 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -52,6 +69,8 @@ daddi $sp,-27705 # CHECK: daddi $sp, $sp, -27705 # encoding: [0x63,0xbd,0x93,0xc7] daddiu $k0,$s6,-4586 daddu $s3,$at,$ra + daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f] + daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] ddiv $zero,$k0,$s3 ddivu $zero,$s0,$s1 div $zero,$25,$11 @@ -86,6 +105,8 @@ dsubi $sp,$s4,-27705 # CHECK: daddi $sp, $20, 27705 # encoding: [0x62,0x9d,0x6c,0x39] dsubi $sp,-27705 # CHECK: daddi $sp, $sp, 27705 # encoding: [0x63,0xbd,0x6c,0x39] dsubu $a1,$a1,$k0 + dsubu $15,$11,5025 # CHECK: daddiu $15, $11, -5025 # encoding: [0x65,0x6f,0xec,0x5f] + dsubu $14,-4586 # CHECK: daddiu $14, $14, 4586 # encoding: [0x65,0xce,0x11,0xea] ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 @@ -190,6 +211,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -201,15 +224,27 @@ swr $s1,-26590($14) swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.l.d $f23,$f23 trunc.l.s $f28,$f31 diff --git a/test/MC/Mips/mips64-register-names-n32-n64.s b/test/MC/Mips/mips64-register-names-n32-n64.s index ee6f88f..efe1cdb 100644 --- a/test/MC/Mips/mips64-register-names-n32-n64.s +++ b/test/MC/Mips/mips64-register-names-n32-n64.s @@ -1,7 +1,11 @@ -# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding | FileCheck %s +# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding 2>%t0 \ +# RUN: | FileCheck %s +# RUN: FileCheck -check-prefix=WARNING %s < %t0 +# # RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding \ -# RUN: -mattr=-n64,+n32 | FileCheck %s - +# RUN: -mattr=-n64,+n32 2>%t1 | FileCheck %s +# RUN: FileCheck -check-prefix=WARNING %s < %t1 +# # Check that the register names are mapped to their correct numbers for n32/n64 # Second byte of addiu with $zero at rt contains the number of the source # register. @@ -23,9 +27,25 @@ daddiu $t0, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0c,0x00,0x00] daddiu $t1, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0d,0x00,0x00] daddiu $t2, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0e,0x00,0x00] daddiu $t3, $zero, 0 # [*] # CHECK: encoding: [0x64,0x0f,0x00,0x00] +# WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only available in O32. +# WARNING-NEXT: daddiu $t4, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0c,0x00,0x00] +# WARNING-NEXT: ^~ +# WARNING-NEXT: Did you mean $t0? daddiu $t4, $zero, 0 # CHECK: encoding: [0x64,0x0c,0x00,0x00] +# WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only available in O32. +# WARNING-NEXT: daddiu $t5, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0d,0x00,0x00] +# WARNING-NEXT: ^~ +# WARNING-NEXT: Did you mean $t1? daddiu $t5, $zero, 0 # CHECK: encoding: [0x64,0x0d,0x00,0x00] +# WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only available in O32. +# WARNING-NEXT: daddiu $t6, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0e,0x00,0x00] +# WARNING-NEXT: ^~ +# WARNING-NEXT: Did you mean $t2? daddiu $t6, $zero, 0 # CHECK: encoding: [0x64,0x0e,0x00,0x00] +# WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only available in O32. +# WARNING-NEXT: daddiu $t7, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0f,0x00,0x00] +# WARNING-NEXT: ^~ +# WARNING-NEXT: Did you mean $t3? daddiu $t7, $zero, 0 # CHECK: encoding: [0x64,0x0f,0x00,0x00] daddiu $s0, $zero, 0 # CHECK: encoding: [0x64,0x10,0x00,0x00] daddiu $s1, $zero, 0 # CHECK: encoding: [0x64,0x11,0x00,0x00] diff --git a/test/MC/Mips/mips64/abiflags.s b/test/MC/Mips/mips64/abiflags.s index 557e32a..ecaffcc 100644 --- a/test/MC/Mips/mips64/abiflags.s +++ b/test/MC/Mips/mips64/abiflags.s @@ -8,27 +8,26 @@ # CHECK-ASM: .module fp=64 # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00004001 02020001 00000000 00000000 |..@.............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00004001 02020001 00000000 00000000 |..@.............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=64 diff --git a/test/MC/Mips/mips64/invalid-mips32r2.s b/test/MC/Mips/mips64/invalid-mips32r2.s new file mode 100644 index 0000000..bc5d1f0 --- /dev/null +++ b/test/MC/Mips/mips64/invalid-mips32r2.s @@ -0,0 +1,11 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + di # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ei # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips64/valid.s b/test/MC/Mips/mips64/valid.s index 1bd057d..032777e 100644 --- a/test/MC/Mips/mips64/valid.s +++ b/test/MC/Mips/mips64/valid.s @@ -6,23 +6,40 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -54,6 +71,8 @@ daddi $sp,-27705 # CHECK: daddi $sp, $sp, -27705 # encoding: [0x63,0xbd,0x93,0xc7] daddiu $k0,$s6,-4586 daddu $s3,$at,$ra + daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f] + daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] dclo $s2,$a2 # CHECK: dclo $18, $6 # encoding: [0x70,0xd2,0x90,0x25] dclz $s0,$25 # CHECK: dclz $16, $25 # encoding: [0x73,0x30,0x80,0x24] deret @@ -91,6 +110,8 @@ dsubi $sp,$s4,-27705 # CHECK: daddi $sp, $20, 27705 # encoding: [0x62,0x9d,0x6c,0x39] dsubi $sp,-27705 # CHECK: daddi $sp, $sp, 27705 # encoding: [0x63,0xbd,0x6c,0x39] dsubu $a1,$a1,$k0 + dsubu $15,$11,5025 # CHECK: daddiu $15, $11, -5025 # encoding: [0x65,0x6f,0xec,0x5f] + dsubu $14,-4586 # CHECK: daddiu $14, $14, 4586 # encoding: [0x65,0xce,0x11,0xea] ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 @@ -206,6 +227,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -218,15 +241,27 @@ swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.l.d $f23,$f23 trunc.l.s $f28,$f31 diff --git a/test/MC/Mips/mips64r2/abiflags.s b/test/MC/Mips/mips64r2/abiflags.s index aa76dee..dc4a1e9 100644 --- a/test/MC/Mips/mips64r2/abiflags.s +++ b/test/MC/Mips/mips64r2/abiflags.s @@ -8,27 +8,26 @@ # CHECK-ASM: .module fp=64 # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00004002 02020001 00000000 00000000 |..@.............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00004002 02020001 00000000 00000000 |..@.............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=64 diff --git a/test/MC/Mips/mips64r2/valid.s b/test/MC/Mips/mips64r2/valid.s index 7a2244a..7717238 100644 --- a/test/MC/Mips/mips64r2/valid.s +++ b/test/MC/Mips/mips64r2/valid.s @@ -6,23 +6,40 @@ abs.d $f7,$f25 # CHECK: encoding: abs.s $f9,$f16 add $s7,$s2,$a1 + add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] + add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add.d $f1,$f7,$f29 add.s $f8,$f21,$f24 addi $13,$9,26322 addi $8,$8,~1 # CHECK: addi $8, $8, -2 # encoding: [0x21,0x08,0xff,0xfe] addu $9,$a0,$a2 + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] and $s7,$v0,$12 and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01] bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01] + bc1fl $fcc0,4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl 4688 # CHECK: bc1fl 4688 # encoding: [0x45,0x02,0x04,0x94] + bc1fl $fcc7,27 # CHECK: bc1fl $fcc7, 27 # encoding: [0x45,0x1e,0x00,0x06] bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01] bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01] + bc1tl $fcc0,4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl 4688 # CHECK: bc1tl 4688 # encoding: [0x45,0x03,0x04,0x94] + bc1tl $fcc7,27 # CHECK: bc1tl $fcc7, 27 # encoding: [0x45,0x1f,0x00,0x06] bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b] bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b] bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b] + beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40] + bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f] + bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d] + bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59] + blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7] + bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a] + bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45] + bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc] cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08] c.ngl.d $f29,$f29 c.ngle.d $f0,$f16 @@ -54,10 +71,13 @@ daddi $sp,-27705 # CHECK: daddi $sp, $sp, -27705 # encoding: [0x63,0xbd,0x93,0xc7] daddiu $k0,$s6,-4586 daddu $s3,$at,$ra + daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f] + daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] dclo $s2,$a2 # CHECK: dclo $18, $6 # encoding: [0x70,0xd2,0x90,0x25] dclz $s0,$25 # CHECK: dclz $16, $25 # encoding: [0x73,0x30,0x80,0x24] deret - di $s8 + di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00] + di # CHECK: di # encoding: [0x41,0x60,0x60,0x00] ddiv $zero,$k0,$s3 ddivu $zero,$s0,$s1 div $zero,$25,$11 @@ -101,8 +121,11 @@ dsubi $sp,-27705 # CHECK: daddi $sp, $sp, 27705 # encoding: [0x63,0xbd,0x6c,0x39] dsubu $a1,$a1,$k0 dsubu $a1,$a1,$k0 + dsubu $15,$11,5025 # CHECK: daddiu $15, $11, -5025 # encoding: [0x65,0x6f,0xec,0x5f] + dsubu $14,-4586 # CHECK: daddiu $14, $14, 4586 # encoding: [0x65,0xce,0x11,0xea] ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] - ei $14 + ei $14 # CHECK: ei $14 # encoding: [0x41,0x6e,0x60,0x20] + ei # CHECK: ei # encoding: [0x41,0x60,0x60,0x20] eret floor.l.d $f26,$f7 floor.l.s $f12,$f5 @@ -190,7 +213,12 @@ or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] - rdhwr $sp,$11 + # FIXME: Use the code generator in order to print the .set directives + # instead of the instruction printer. + rdhwr $sp,$11 # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $sp, $11 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] @@ -233,6 +261,8 @@ srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$12 + sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] + sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 subu $sp,$s6,$s6 @@ -245,15 +275,27 @@ swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tgei $s1,5025 tgeiu $sp,-28621 + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlti $14,-21059 tltiu $ra,-5076 + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 trunc.l.d $f23,$f23 trunc.l.s $f28,$f31 diff --git a/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s index e914c89..5156429 100644 --- a/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s @@ -5,13 +5,13 @@ # RUN: FileCheck %s < %t1 .set noat - bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwr $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction - lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips1.s b/test/MC/Mips/mips64r6/invalid-mips1.s index 6efd8f4..ce0ab97 100644 --- a/test/MC/Mips/mips64r6/invalid-mips1.s +++ b/test/MC/Mips/mips64r6/invalid-mips1.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + add $9,$14,15176 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + add $24,-7193 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled @@ -25,3 +27,5 @@ multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled # div has been re-encoded. See valid.s # divu has been re-encoded. See valid.s + sub $22,$17,-3126 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + sub $13,6512 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips64r6/invalid-mips2.s b/test/MC/Mips/mips64r6/invalid-mips2.s index 8a5c50c..a09a051 100644 --- a/test/MC/Mips/mips64r6/invalid-mips2.s +++ b/test/MC/Mips/mips64r6/invalid-mips2.s @@ -6,9 +6,21 @@ .set noat addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s index 7424f49..eda18ac 100644 --- a/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s @@ -9,15 +9,15 @@ ldr $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction sdl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction sdr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction - ldle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - ldre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sdle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sdre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + ldle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + ldre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sdle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sdre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwr $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swr $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction - lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + swle $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + swre $s1,-26590($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s index cc85f18..8702318 100644 --- a/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s @@ -6,15 +6,11 @@ # RUN: FileCheck %s < %t1 .set noat - bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s index f3131a9..06bf58c 100644 --- a/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s @@ -6,16 +6,6 @@ # RUN: FileCheck %s < %t1 .set noat - beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips4.s b/test/MC/Mips/mips64r6/invalid-mips4.s index 706db27..82a1196 100644 --- a/test/MC/Mips/mips64r6/invalid-mips4.s +++ b/test/MC/Mips/mips64r6/invalid-mips4.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s index 4fc94e2..ceeb577 100644 --- a/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s @@ -5,44 +5,44 @@ # RUN: FileCheck %s < %t1 .set noat - abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - alnv.ps $f12,$f18,$f30,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - cvt.ps.pw $f3,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction - sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + alnv.ps $f12,$f18,$f30,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngle.ps $fcc7,$f12,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ole.ps $fcc7,$f21,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.olt.ps $fcc3,$f7,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.sf.ps $fcc6,$f4,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ueq.ps $fcc1,$f5,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ule.ps $fcc6,$f17,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.ult.ps $fcc7,$f14,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + cvt.ps.pw $f3,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movf.ps $f10,$f28,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + mul.ps $f14,$f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + nmsub.ps $f6,$f12,$f14,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction + sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction diff --git a/test/MC/Mips/mips64r6/valid.s b/test/MC/Mips/mips64r6/valid.s index 34c1dac..3e8fc41 100644 --- a/test/MC/Mips/mips64r6/valid.s +++ b/test/MC/Mips/mips64r6/valid.s @@ -17,6 +17,7 @@ # FIXME: Add the instructions carried forward from older ISA's and $2,4 # CHECK: andi $2, $2, 4 # encoding: [0x30,0x42,0x00,0x04] addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0xec,0x80,0x00,0x19] + addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] align $4, $2, $3, 2 # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0] aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0xec,0x7f,0x00,0x38] aui $3,$2,-23 # CHECK: aui $3, $2, -23 # encoding: [0x3c,0x62,0xff,0xe9] @@ -96,13 +97,21 @@ cmp.sle.d $f2,$f3,$f4 # CHECK: cmp.sle.d $f2, $f3, $f4 # encoding: [0x46,0xa4,0x18,0x8e] cmp.sule.s $f2,$f3,$f4 # CHECK: cmp.sule.s $f2, $f3, $f4 # encoding: [0x46,0x84,0x18,0x8f] cmp.sule.d $f2,$f3,$f4 # CHECK: cmp.sule.d $f2, $f3, $f4 # encoding: [0x46,0xa4,0x18,0x8f] + daddu $24,$2,18079 # CHECK: daddiu $24, $2, 18079 # encoding: [0x64,0x58,0x46,0x9f] + daddu $19,26943 # CHECK: daddiu $19, $19, 26943 # encoding: [0x66,0x73,0x69,0x3f] dalign $4,$2,$3,5 # CHECK: dalign $4, $2, $3, 5 # encoding: [0x7c,0x43,0x23,0x64] daui $3,$2,0x1234 # CHECK: daui $3, $2, 4660 # encoding: [0x74,0x62,0x12,0x34] dahi $3,0x5678 # CHECK: dahi $3, 22136 # encoding: [0x04,0x66,0x56,0x78] dati $3,0xabcd # CHECK: dati $3, 43981 # encoding: [0x04,0x7e,0xab,0xcd] dbitswap $4, $2 # CHECK: dbitswap $4, $2 # encoding: [0x7c,0x02,0x20,0x24] + di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00] + di # CHECK: di # encoding: [0x41,0x60,0x60,0x00] div $2,$3,$4 # CHECK: div $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9a] divu $2,$3,$4 # CHECK: divu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x9b] + dsubu $15,$11,5025 # CHECK: daddiu $15, $11, -5025 # encoding: [0x65,0x6f,0xec,0x5f] + dsubu $14,-4586 # CHECK: daddiu $14, $14, 4586 # encoding: [0x65,0xce,0x11,0xea] + ei $14 # CHECK: ei $14 # encoding: [0x41,0x6e,0x60,0x20] + ei # CHECK: ei # encoding: [0x41,0x60,0x60,0x20] jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00] jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xd8,0x05,0x01,0x00] mod $2,$3,$4 # CHECK: mod $2, $3, $4 # encoding: [0x00,0x64,0x10,0xda] @@ -146,6 +155,12 @@ seleqz.d $f0, $f2, $f4 # CHECK: seleqz.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x14] selnez.s $f0, $f2, $f4 # CHECK: selnez.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x17] selnez.d $f0, $f2, $f4 # CHECK: selnez.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x17] + # FIXME: Use the code generator in order to print the .set directives + # instead of the instruction printer. + rdhwr $sp,$11 # CHECK: .set push + # CHECK-NEXT: .set mips32r2 + # CHECK-NEXT: rdhwr $sp, $11 + # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] rint.s $f2, $f4 # CHECK: rint.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9a] rint.d $f2, $f4 # CHECK: rint.d $f2, $f4 # encoding: [0x46,0x20,0x20,0x9a] class.s $f2, $f4 # CHECK: class.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9b] @@ -171,3 +186,15 @@ sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e] sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] + teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] + tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] + tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] + tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] + tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] + tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] + tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] + tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] + tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] + tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] + tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] diff --git a/test/MC/Mips/mips_abi_flags_xx.s b/test/MC/Mips/mips_abi_flags_xx.s index 1d65e99..cd6c9de 100644 --- a/test/MC/Mips/mips_abi_flags_xx.s +++ b/test/MC/Mips/mips_abi_flags_xx.s @@ -3,32 +3,40 @@ # # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \ -# RUN: FileCheck %s -check-prefix=CHECK-OBJ +# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-R1 + +# RUN: llvm-mc /dev/null -arch=mips -mcpu=mips32 -mattr=fpxx -filetype=obj -o - | \ +# RUN: llvm-readobj -sections -section-data -section-relocations - | \ +# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-R1 + +# RUN: llvm-mc /dev/null -arch=mips -mcpu=mips32r6 -mattr=fpxx -filetype=obj -o - | \ +# RUN: llvm-readobj -sections -section-data -section-relocations - | \ +# RUN: FileCheck %s -check-prefix=CHECK-OBJ -check-prefix=CHECK-OBJ-R6 # CHECK-ASM: .module fp=xx # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002001 01010005 00000000 00000000 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ-R1: 0000: 00002001 01010005 00000000 00000000 |.. .............| +# CHECK-OBJ-R6: 0000: 00002006 01010005 00000000 00000000 |.. .............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=xx diff --git a/test/MC/Mips/mips_abi_flags_xx_set.s b/test/MC/Mips/mips_abi_flags_xx_set.s index 56f19d3..a548972 100644 --- a/test/MC/Mips/mips_abi_flags_xx_set.s +++ b/test/MC/Mips/mips_abi_flags_xx_set.s @@ -9,27 +9,26 @@ # CHECK-ASM: .set fp=64 # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002001 01010005 00000000 00000000 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00002001 01010005 00000000 00000000 |.. .............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=xx .set fp=64 diff --git a/test/MC/Mips/mips_directives_bad.s b/test/MC/Mips/mips_directives_bad.s index c823cac..a4512b5 100644 --- a/test/MC/Mips/mips_directives_bad.s +++ b/test/MC/Mips/mips_directives_bad.s @@ -2,7 +2,7 @@ # RUN: not llvm-mc -triple mips-unknown-unknown %s 2>&1 | FileCheck %s .abicalls should have no operands -# CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in directive +# CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected end of statement # CHECK-NEXT: .abicalls should have no operands # CHECK-NEXT: ^ @@ -12,48 +12,48 @@ # Blank option operand .option -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected identifier # CHECK-NEXT: .option # CHECK-NEXT: ^ # Numeric option operand .option 2 -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected identifier # CHECK-NEXT: .option 2 # CHECK-NEXT: ^ # Register option operand .option $2 -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected identifier # CHECK-NEXT: .option $2 # CHECK-NEXT: ^ .option WithBadOption -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: warning: unknown option in .option directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: warning: unknown option, expected 'pic0' or 'pic2' # CHECK-NEXT: .option WithBadOption # CHECK-NEXT: ^ .option pic0, -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic0 directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected end of statement # CHECK-NEXT: .option pic0, # CHECK-NEXT: ^ .option pic0,pic2 -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic0 directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected end of statement # CHECK-NEXT: .option pic0,pic2 # CHECK-NEXT: ^ .option pic0 pic2 -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic0 directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected end of statement # CHECK-NEXT: .option pic0 pic2 # CHECK-NEXT: ^ .option pic2, -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic2 directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected end of statement # CHECK-NEXT: .option pic2, # CHECK-NEXT: ^ .option pic2 pic3 -# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token in .option pic2 directive +# CHECK-NEXT: :{{[0-9]+}}:{{[0-9]+}}: error: unexpected token, expected end of statement # CHECK-NEXT: .option pic2 pic3 # CHECK-NEXT: ^ diff --git a/test/MC/Mips/msa/abiflags.s b/test/MC/Mips/msa/abiflags.s index 83b83cc..136c035 100644 --- a/test/MC/Mips/msa/abiflags.s +++ b/test/MC/Mips/msa/abiflags.s @@ -9,27 +9,26 @@ # CHECK-ASM: .set fp=64 # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002002 01030001 00000000 00000200 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00002002 01030001 00000000 00000200 |.. .............| +# CHECK-OBJ: 0010: 00000001 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } .module fp=32 .set fp=64 diff --git a/test/MC/Mips/msa/set-msa-directive-bad.s b/test/MC/Mips/msa/set-msa-directive-bad.s new file mode 100644 index 0000000..02cb9a6 --- /dev/null +++ b/test/MC/Mips/msa/set-msa-directive-bad.s @@ -0,0 +1,11 @@ +# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1 +# RUN: FileCheck %s < %t1 + + .set nomsa + addvi.b $w14, $w12, 14 # CHECK: error: instruction requires a CPU feature not currently enabled + + .set msa + addvi.h $w26, $w17, 4 + + .set nomsa + addvi.w $w19, $w13, 11 # CHECK: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/msa/set-msa-directive.s b/test/MC/Mips/msa/set-msa-directive.s new file mode 100644 index 0000000..461ddba --- /dev/null +++ b/test/MC/Mips/msa/set-msa-directive.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s + +# CHECK: .set msa +# CHECK: addvi.b $w14, $w12, 14 +# CHECK: addvi.h $w26, $w17, 4 +# CHECK: addvi.w $w19, $w13, 11 +# CHECK: addvi.d $w16, $w19, 7 +# CHECK: subvi.b $w14, $w12, 14 +# CHECK: subvi.h $w26, $w17, 4 +# CHECK: subvi.w $w19, $w13, 11 +# CHECK: subvi.d $w16, $w19, 7 + + .set msa + addvi.b $w14, $w12, 14 + addvi.h $w26, $w17, 4 + addvi.w $w19, $w13, 11 + addvi.d $w16, $w19, 7 + + subvi.b $w14, $w12, 14 + subvi.h $w26, $w17, 4 + subvi.w $w19, $w13, 11 + subvi.d $w16, $w19, 7 diff --git a/test/MC/Mips/nacl-mask.s b/test/MC/Mips/nacl-mask.s index 22286ac..c776460 100644 --- a/test/MC/Mips/nacl-mask.s +++ b/test/MC/Mips/nacl-mask.s @@ -252,10 +252,10 @@ test5: jalr $t9 addiu $4, $zero, 5 -# CHECK-LABEL: test5: +# CHECK: nop # CHECK-NEXT: nop -# CHECK-NEXT: nop +# CHECK-LABEL: test5: # CHECK-NEXT: jal # CHECK-NEXT: addiu $4, $zero, 1 @@ -301,10 +301,11 @@ test6: jalr $t9 sw $sp, 0($sp) -# CHECK-LABEL: test6: + +# CHECK: nop # CHECK-NEXT: nop -# CHECK-NEXT: nop +# CHECK-LABEL: test6: # CHECK-NEXT: jal # CHECK-NEXT: sw $4, 0($sp) diff --git a/test/MC/Mips/nooddspreg-cmdarg.s b/test/MC/Mips/nooddspreg-cmdarg.s index 826db12..52b040e 100644 --- a/test/MC/Mips/nooddspreg-cmdarg.s +++ b/test/MC/Mips/nooddspreg-cmdarg.s @@ -14,27 +14,26 @@ # CHECK-ASM-NOT: .module nooddspreg # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002001 01020007 00000000 00000000 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00002001 01020007 00000000 00000000 |.. .............| +# CHECK-OBJ: 0010: 00000000 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } # INVALID: ERROR: -mno-odd-spreg requires the O32 ABI diff --git a/test/MC/Mips/nooddspreg.s b/test/MC/Mips/nooddspreg.s index 5a283f5..f268ef4 100644 --- a/test/MC/Mips/nooddspreg.s +++ b/test/MC/Mips/nooddspreg.s @@ -14,27 +14,26 @@ # CHECK-ASM: .module nooddspreg # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ: Section { -# CHECK-OBJ: Index: 5 -# CHECK-OBJ: Name: .MIPS.abiflags (12) -# CHECK-OBJ: Type: (0x7000002A) -# CHECK-OBJ: Flags [ (0x2) -# CHECK-OBJ: SHF_ALLOC (0x2) -# CHECK-OBJ: ] -# CHECK-OBJ: Address: 0x0 -# CHECK-OBJ: Offset: 0x50 -# CHECK-OBJ: Size: 24 -# CHECK-OBJ: Link: 0 -# CHECK-OBJ: Info: 0 -# CHECK-OBJ: AddressAlignment: 8 -# CHECK-OBJ: EntrySize: 0 -# CHECK-OBJ: Relocations [ -# CHECK-OBJ: ] -# CHECK-OBJ: SectionData ( -# CHECK-OBJ: 0000: 00002001 01020007 00000000 00000000 |.. .............| -# CHECK-OBJ: 0010: 00000000 00000000 |........| -# CHECK-OBJ: ) -# CHECK-OBJ: } +# CHECK-OBJ: Section { +# CHECK-OBJ: Index: 5 +# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) +# CHECK-OBJ: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ: Flags [ (0x2) +# CHECK-OBJ: SHF_ALLOC (0x2) +# CHECK-OBJ: ] +# CHECK-OBJ: Address: 0x0 +# CHECK-OBJ: Size: 24 +# CHECK-OBJ: Link: 0 +# CHECK-OBJ: Info: 0 +# CHECK-OBJ: AddressAlignment: 8 +# CHECK-OBJ: EntrySize: 24 +# CHECK-OBJ: Relocations [ +# CHECK-OBJ: ] +# CHECK-OBJ: SectionData ( +# CHECK-OBJ: 0000: 00002001 01020007 00000000 00000000 |.. .............| +# CHECK-OBJ: 0010: 00000000 00000000 |........| +# CHECK-OBJ: ) +# CHECK-OBJ-LABEL: } # INVALID: '.module nooddspreg' requires the O32 ABI diff --git a/test/MC/Mips/octeon-instructions.s b/test/MC/Mips/octeon-instructions.s index b7c89b4..2922744 100644 --- a/test/MC/Mips/octeon-instructions.s +++ b/test/MC/Mips/octeon-instructions.s @@ -35,6 +35,10 @@ # CHECK: sne $23, $23, $20 # encoding: [0x72,0xf4,0xb8,0x2b] # CHECK: snei $4, $16, -313 # encoding: [0x72,0x04,0xb1,0xef] # CHECK: snei $26, $26, 511 # encoding: [0x73,0x5a,0x7f,0xef] +# CHECK: sync 2 # encoding: [0x00,0x00,0x00,0x8f] +# CHECK: sync 6 # encoding: [0x00,0x00,0x01,0x8f] +# CHECK: sync 4 # encoding: [0x00,0x00,0x01,0x0f] +# CHECK: sync 5 # encoding: [0x00,0x00,0x01,0x4f] # CHECK: v3mulu $21, $10, $21 # encoding: [0x71,0x55,0xa8,0x11] # CHECK: v3mulu $20, $20, $10 # encoding: [0x72,0x8a,0xa0,0x11] # CHECK: vmm0 $3, $19, $16 # encoding: [0x72,0x70,0x18,0x10] @@ -77,6 +81,10 @@ sne $23, $20 snei $4, $16, -313 snei $26, 511 + synciobdma + syncs + syncw + syncws v3mulu $21, $10, $21 v3mulu $20, $10 vmm0 $3, $19, $16 diff --git a/test/MC/Mips/oddspreg.s b/test/MC/Mips/oddspreg.s index f5aa9c0..32ba9e0 100644 --- a/test/MC/Mips/oddspreg.s +++ b/test/MC/Mips/oddspreg.s @@ -15,38 +15,51 @@ # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 | \ # RUN: FileCheck %s -check-prefix=CHECK-ASM # -# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \ +# Repeat the -filetype=obj tests but this time use an empty assembly file. The +# output should be unchanged. +# RUN: llvm-mc /dev/null -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \ +# RUN: llvm-readobj -sections -section-data -section-relocations - | \ +# RUN: FileCheck %s -check-prefix=CHECK-OBJ-ALL -check-prefix=CHECK-OBJ-N64 + +# RUN: llvm-mc /dev/null -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \ +# RUN: llvm-readobj -sections -section-data -section-relocations - | \ +# RUN: FileCheck %s -check-prefix=CHECK-OBJ-ALL -check-prefix=CHECK-OBJ-O32 +# +# RUN: llvm-mc /dev/null -arch=mips64 -mcpu=mips64 -mattr=-n64,+n32 -filetype=obj -o - | \ +# RUN: llvm-readobj -sections -section-data -section-relocations - | \ +# RUN: FileCheck %s -check-prefix=CHECK-OBJ-ALL -check-prefix=CHECK-OBJ-N32 + +# RUN: llvm-mc /dev/null -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \ # RUN: llvm-readobj -sections -section-data -section-relocations - | \ # RUN: FileCheck %s -check-prefix=CHECK-OBJ-ALL -check-prefix=CHECK-OBJ-N64 # CHECK-ASM: .module oddspreg # Checking if the Mips.abiflags were correctly emitted. -# CHECK-OBJ-ALL: Section { -# CHECK-OBJ-ALL: Index: 5 -# CHECK-OBJ-ALL: Name: .MIPS.abiflags ({{[0-9]+}}) -# CHECK-OBJ-ALL: Type: (0x7000002A) -# CHECK-OBJ-ALL: Flags [ (0x2) -# CHECK-OBJ-ALL: SHF_ALLOC (0x2) -# CHECK-OBJ-ALL: ] -# CHECK-OBJ-ALL: Address: 0x0 -# CHECK-OBJ-ALL: Offset: 0x{{[0-9A-F]+}} -# CHECK-OBJ-ALL: Size: 24 -# CHECK-OBJ-ALL: Link: 0 -# CHECK-OBJ-ALL: Info: 0 -# CHECK-OBJ-ALL: AddressAlignment: 8 -# CHECK-OBJ-ALL: EntrySize: 0 -# CHECK-OBJ-ALL: Relocations [ -# CHECK-OBJ-ALL: ] -# CHECK-OBJ-ALL: SectionData ( -# CHECK-OBJ-O32: 0000: 00002001 01020006 00000000 00000000 |.. .............| -# CHECK-OBJ-O32: 0010: 00000001 00000000 |........| -# CHECK-OBJ-N32: 0000: 00004001 02020001 00000000 00000000 |..@.............| -# CHECK-OBJ-N32: 0010: 00000001 00000000 |........| -# CHECK-OBJ-N64: 0000: 00004001 02020001 00000000 00000000 |..@.............| -# CHECK-OBJ-N64: 0010: 00000001 00000000 |........| -# CHECK-OBJ-ALL: ) -# CHECK-OBJ-ALL: } +# CHECK-OBJ-ALL: Section { +# CHECK-OBJ-ALL: Index: 5 +# CHECK-OBJ-ALL-LABEL: Name: .MIPS.abiflags ({{[0-9]+}}) +# CHECK-OBJ-ALL: Type: SHT_MIPS_ABIFLAGS (0x7000002A) +# CHECK-OBJ-ALL: Flags [ (0x2) +# CHECK-OBJ-ALL: SHF_ALLOC (0x2) +# CHECK-OBJ-ALL: ] +# CHECK-OBJ-ALL: Address: 0x0 +# CHECK-OBJ-ALL: Size: 24 +# CHECK-OBJ-ALL: Link: 0 +# CHECK-OBJ-ALL: Info: 0 +# CHECK-OBJ-ALL: AddressAlignment: 8 +# CHECK-OBJ-ALL: EntrySize: 24 +# CHECK-OBJ-ALL: Relocations [ +# CHECK-OBJ-ALL: ] +# CHECK-OBJ-ALL: SectionData ( +# CHECK-OBJ-O32: 0000: 00002001 01020006 00000000 00000000 |.. .............| +# CHECK-OBJ-O32: 0010: 00000001 00000000 |........| +# CHECK-OBJ-N32: 0000: 00004001 02020001 00000000 00000000 |..@.............| +# CHECK-OBJ-N32: 0010: 00000001 00000000 |........| +# CHECK-OBJ-N64: 0000: 00004001 02020001 00000000 00000000 |..@.............| +# CHECK-OBJ-N64: 0010: 00000001 00000000 |........| +# CHECK-OBJ-ALL: ) +# CHECK-OBJ-ALL-LABEL: } .module oddspreg add.s $f3, $f1, $f5 diff --git a/test/MC/Mips/set-arch.s b/test/MC/Mips/set-arch.s new file mode 100644 index 0000000..6267468 --- /dev/null +++ b/test/MC/Mips/set-arch.s @@ -0,0 +1,55 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \ +# RUN: FileCheck %s + + .text + .set arch=mips1 + add $2, $2, $2 + .set arch=mips2 + ll $2, -2($2) + .set arch=mips3 + dadd $2, $2, $2 + .set arch=mips4 + ldxc1 $f8, $2($4) + .set arch=mips5 + luxc1 $f19, $2($4) + .set arch=mips32 + clo $2, $2 + .set arch=mips32r2 + rotr $2, $2, 15 + .set arch=mips32r6 + mod $2, $4, $6 + .set arch=mips64 + daddi $2, $2, 10 + .set arch=mips64r2 + drotr32 $1, $14, 15 + .set arch=mips64r6 + mod $2, $4, $6 + .set arch=cnmips + .set arch=r4000 + dadd $2, $2, $2 + +# CHECK: .set arch=mips1 +# CHECK: add $2, $2, $2 +# CHECK: .set arch=mips2 +# CHECK: ll $2, -2($2) +# CHECK: .set arch=mips3 +# CHECK: dadd $2, $2, $2 +# CHECK: .set arch=mips4 +# CHECK: ldxc1 $f8, $2($4) +# CHECK: .set arch=mips5 +# CHECK: luxc1 $f19, $2($4) +# CHECK: .set arch=mips32 +# CHECK: clo $2, $2 +# CHECK: .set arch=mips32r2 +# CHECK: rotr $2, $2, 15 +# CHECK: .set arch=mips32r6 +# CHECK: mod $2, $4, $6 +# CHECK: .set arch=mips64 +# CHECK: daddi $2, $2, 10 +# CHECK: .set arch=mips64r2 +# CHECK: drotr32 $1, $14, 15 +# CHECK: .set arch=mips64r6 +# CHECK: mod $2, $4, $6 +# CHECK: .set arch=cnmips +# CHECK: .set arch=r4000 +# CHECK: dadd $2, $2, $2 diff --git a/test/MC/Mips/set-at-directive-explicit-at.s b/test/MC/Mips/set-at-directive-explicit-at.s index 1bd26ff..797a2b7 100644 --- a/test/MC/Mips/set-at-directive-explicit-at.s +++ b/test/MC/Mips/set-at-directive-explicit-at.s @@ -7,15 +7,15 @@ .text foo: # CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00] -# WARNINGS: :[[@LINE+2]]:11: warning: Used $at without ".set noat" +# WARNINGS: :[[@LINE+2]]:11: warning: used $at without ".set noat" .set at=$1 jr $at # CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00] -# WARNINGS: :[[@LINE+2]]:11: warning: Used $at without ".set noat" +# WARNINGS: :[[@LINE+2]]:11: warning: used $at without ".set noat" .set at=$1 jr $1 -# WARNINGS-NOT: warning: Used $at without ".set noat" +# WARNINGS-NOT: warning: used $at without ".set noat" # CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00] .set at=$2 @@ -31,12 +31,12 @@ foo: jr $at # CHECK: jr $16 # encoding: [0x08,0x00,0x00,0x02] -# WARNINGS: :[[@LINE+2]]:11: warning: Used $16 with ".set at=$16" +# WARNINGS: :[[@LINE+2]]:11: warning: used $16 with ".set at=$16" .set at=$16 jr $s0 # CHECK: jr $16 # encoding: [0x08,0x00,0x00,0x02] -# WARNINGS: :[[@LINE+2]]:11: warning: Used $16 with ".set at=$16" +# WARNINGS: :[[@LINE+2]]:11: warning: used $16 with ".set at=$16" .set at=$16 jr $16 # WARNINGS-NOT: warning diff --git a/test/MC/Mips/set-mips-directives-bad.s b/test/MC/Mips/set-mips-directives-bad.s new file mode 100644 index 0000000..6726987 --- /dev/null +++ b/test/MC/Mips/set-mips-directives-bad.s @@ -0,0 +1,30 @@ +# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips1 2>%t1 +# RUN: FileCheck %s < %t1 + +# FIXME: At the moment we emit the wrong error message if we try to assemble the +# ll instruction using an unsupported architecture so we just check for "error" +# and ignore the rest of the message. + + .text + .set noreorder + .set mips1 + ll $2,-2($2) # CHECK: error: + .set mips2 + dadd $2,$2,$2 # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips3 + ldxc1 $f8,$2($4) # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips4 + luxc1 $f19,$2($4) # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips5 + clo $2,$2 # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips32 + rotr $2,15 # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips32r2 + mod $2, $4, $6 # CHECK: error:instruction requires a CPU feature not currently enabled + .set mips32r6 + daddi $2, $2, 10 # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips64 + drotr32 $1,$14,15 # CHECK: error: instruction requires a CPU feature not currently enabled + .set mips64r2 + mod $2, $4, $6 # CHECK: error: instruction requires a CPU feature not currently enabled + diff --git a/test/MC/Mips/set-mips-directives.s b/test/MC/Mips/set-mips-directives.s new file mode 100644 index 0000000..96c2308 --- /dev/null +++ b/test/MC/Mips/set-mips-directives.s @@ -0,0 +1,51 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips1 | \ +# RUN: FileCheck %s + + .text + .set noreorder + .set mips1 + add $2, $2, $2 + .set mips2 + ll $2,-2($2) + .set mips3 + dadd $2,$2,$2 + .set mips4 + ldxc1 $f8,$2($4) + .set mips5 + luxc1 $f19,$2($4) + .set mips32 + clo $2,$2 + .set mips32r2 + rotr $2,15 + .set mips32r6 + mod $2, $4, $6 + .set mips64 + daddi $2, $2, 10 + .set mips64r2 + drotr32 $1,$14,15 + .set mips64r6 + mod $2, $4, $6 + +# CHECK: .set noreorder +# CHECK: .set mips1 +# CHECK: add $2, $2, $2 +# CHECK: .set mips2 +# CHECK: ll $2, -2($2) +# CHECK: .set mips3 +# CHECK: dadd $2, $2, $2 +# CHECK: .set mips4 +# CHECK: ldxc1 $f8, $2($4) +# CHECK: .set mips5 +# CHECK: luxc1 $f19, $2($4) +# CHECK: .set mips32 +# CHECK: clo $2, $2 +# CHECK: .set mips32r2 +# CHECK: rotr $2, $2, 15 +# CHECK: .set mips32r6 +# CHECK: mod $2, $4, $6 +# CHECK: .set mips64 +# CHECK: daddi $2, $2, 10 +# CHECK: .set mips64r2 +# CHECK: drotr32 $1, $14, 15 +# CHECK: .set mips64r6 +# CHECK: mod $2, $4, $6 diff --git a/test/MC/Mips/set-mips0-directive.s b/test/MC/Mips/set-mips0-directive.s new file mode 100644 index 0000000..5cb75bb --- /dev/null +++ b/test/MC/Mips/set-mips0-directive.s @@ -0,0 +1,27 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | \ +# RUN: FileCheck %s + + .text + rotr $7, $7, 22 + + .set mips32r6 + mod $2, $4, $6 + .set mips0 + rotr $2, $2, 15 + + .set mips3 + dadd $4, $4, $4 + .set mips0 + rotr $3, $3, 19 + +# CHECK: rotr $7, $7, 22 + +# CHECK: .set mips32r6 +# CHECK: mod $2, $4, $6 +# CHECK: .set mips0 +# CHECK: rotr $2, $2, 15 + +# CHECK: .set mips3 +# CHECK: dadd $4, $4, $4 +# CHECK: .set mips0 +# CHECK: rotr $3, $3, 19 diff --git a/test/MC/Mips/set-mips16-directive.s b/test/MC/Mips/set-mips16-directive.s new file mode 100644 index 0000000..cf8090e --- /dev/null +++ b/test/MC/Mips/set-mips16-directive.s @@ -0,0 +1,10 @@ +# RUN: llvm-mc %s -arch=mips | FileCheck %s +# FIXME: Update this test when we have a more mature implementation of Mips16 in the IAS. + +.text +.set mips16 +.set nomips16 + +# CHECK: .text +# CHECK: .set mips16 +# CHECK: .set nomips16 diff --git a/test/MC/Mips/set-nodsp.s b/test/MC/Mips/set-nodsp.s new file mode 100644 index 0000000..f98cefb --- /dev/null +++ b/test/MC/Mips/set-nodsp.s @@ -0,0 +1,12 @@ +# RUN: not llvm-mc %s -mcpu=mips32 -mattr=+dsp -triple mips-unknown-linux 2>%t1 +# RUN: FileCheck %s < %t1 + + lbux $7, $10($11) + + .set nodsp + lbux $6, $10($11) + # CHECK: error: instruction requires a CPU feature not currently enabled + + .set dsp + lbux $5, $10($11) + # CHECK-NOT: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/set-push-pop-directives-bad.s b/test/MC/Mips/set-push-pop-directives-bad.s new file mode 100644 index 0000000..53d8b23 --- /dev/null +++ b/test/MC/Mips/set-push-pop-directives-bad.s @@ -0,0 +1,14 @@ +# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 2>%t1 +# RUN: FileCheck %s < %t1 + + .text + .set pop +# CHECK: :[[@LINE-1]]:14: error: .set pop with no .set push + .set push + .set pop + .set pop +# CHECK: :[[@LINE-1]]:14: error: .set pop with no .set push + .set push foo +# CHECK: :[[@LINE-1]]:19: error: unexpected token, expected end of statement + .set pop bar +# CHECK: :[[@LINE-1]]:18: error: unexpected token, expected end of statement diff --git a/test/MC/Mips/set-push-pop-directives.s b/test/MC/Mips/set-push-pop-directives.s new file mode 100644 index 0000000..5f55b7c --- /dev/null +++ b/test/MC/Mips/set-push-pop-directives.s @@ -0,0 +1,53 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa | \ +# RUN: FileCheck %s +# .set push creates a copy of the current environment. +# .set pop restores the previous environment. +# FIXME: Also test resetting of .set macro/nomacro option. + + .text + # The first environment on the stack (with initial values). + lw $1, 65536($1) + b 1336 + addvi.b $w15, $w13, 18 + + # Create a new environment. + .set push + .set at=$ra # Test the ATReg option. + lw $1, 65536($1) + .set noreorder # Test the Reorder option. + b 1336 + .set nomsa # Test the Features option (ASE). + .set mips32r6 # Test the Features option (ISA). + mod $2, $4, $6 + + # Switch back to the first environment. + .set pop + lw $1, 65536($1) + b 1336 + addvi.b $w15, $w13, 18 + +# CHECK: lui $1, 1 +# CHECK: addu $1, $1, $1 +# CHECK: lw $1, 0($1) +# CHECK: b 1336 +# CHECK: nop +# CHECK: addvi.b $w15, $w13, 18 + +# CHECK: .set push +# CHECK: lui $ra, 1 +# CHECK: addu $ra, $ra, $1 +# CHECK: lw $1, 0($ra) +# CHECK: .set noreorder +# CHECK: b 1336 +# CHECK-NOT: nop +# CHECK: .set nomsa +# CHECK: .set mips32r6 +# CHECK: mod $2, $4, $6 + +# CHECK: .set pop +# CHECK: lui $1, 1 +# CHECK: addu $1, $1, $1 +# CHECK: lw $1, 0($1) +# CHECK: b 1336 +# CHECK: nop +# CHECK: addvi.b $w15, $w13, 18 diff --git a/test/MC/Mips/unaligned-nops.s b/test/MC/Mips/unaligned-nops.s new file mode 100644 index 0000000..ebbbb40 --- /dev/null +++ b/test/MC/Mips/unaligned-nops.s @@ -0,0 +1,4 @@ +# RUN: llvm-mc -filetype=obj -triple=mipsel %s -o %t +.byte 1 +.p2align 2 +foo: diff --git a/test/MC/PowerPC/lcomm.s b/test/MC/PowerPC/lcomm.s new file mode 100644 index 0000000..a84f138 --- /dev/null +++ b/test/MC/PowerPC/lcomm.s @@ -0,0 +1,21 @@ +# RUN: llvm-mc -triple powerpc-unknown-unknown -filetype=obj %s | \ +# RUN: llvm-readobj -s -sd | FileCheck %s +# RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \ +# RUN: llvm-readobj -s -sd | FileCheck %s + +.lcomm foo, 16, 16 + +// CHECK: Section { +// CHECK: Name: .bss +// CHECK-NEXT: Type: SHT_NOBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_WRITE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 16 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 16 +// CHECK-NEXT: EntrySize: 0 diff --git a/test/MC/PowerPC/ppc-reloc.s b/test/MC/PowerPC/ppc-reloc.s new file mode 100644 index 0000000..19dd2a3 --- /dev/null +++ b/test/MC/PowerPC/ppc-reloc.s @@ -0,0 +1,17 @@ +# RUN: llvm-mc -triple=powerpc-unknown-linux-gnu -filetype=obj %s | \ +# RUN: llvm-readobj -r | FileCheck %s + .section .text + + .globl foo + .type foo,@function + .align 2 +foo: + bl printf@plt +.LC1: + .size foo, . - foo + +# CHECK: Relocations [ +# CHECK-NEXT: Section (2) .rela.text { +# CHECK-NEXT: 0x0 R_PPC_PLTREL24 printf 0x0 +# CHECK-NEXT: } +# CHECK-NEXT: ] diff --git a/test/MC/PowerPC/ppc32-ba.s b/test/MC/PowerPC/ppc32-ba.s new file mode 100644 index 0000000..133423b --- /dev/null +++ b/test/MC/PowerPC/ppc32-ba.s @@ -0,0 +1,6 @@ +# RUN: llvm-mc -triple powerpc-unknown-unknown --show-encoding %s | FileCheck %s + +# Check that large immediates in 32bit mode are accepted. + +# CHECK: ba -33554432 # encoding: [0x4a,0x00,0x00,0x02] + ba 0xfe000000 diff --git a/test/MC/PowerPC/ppc64-abiversion.s b/test/MC/PowerPC/ppc64-abiversion.s new file mode 100644 index 0000000..d2970f8 --- /dev/null +++ b/test/MC/PowerPC/ppc64-abiversion.s @@ -0,0 +1,9 @@ + +# RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \ +# RUN: llvm-readobj -h | FileCheck %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \ +# RUN: llvm-readobj -h | FileCheck %s + + .abiversion 2 +# CHECK: Flags [ (0x2) + diff --git a/test/MC/PowerPC/ppc64-encoding-4xx.s b/test/MC/PowerPC/ppc64-encoding-4xx.s new file mode 100644 index 0000000..5414e1a --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-4xx.s @@ -0,0 +1,167 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# Instructions specific to the PowerPC 4xx embedded controllers: + +# CHECK-BE: mfdcr 3, 178 # encoding: [0x7c,0x72,0x2a,0x86] +# CHECK-LE: mfdcr 3, 178 # encoding: [0x86,0x2a,0x72,0x7c] + mfdcr 3,178 +# CHECK-BE: mtdcr 178, 3 # encoding: [0x7c,0x72,0x2b,0x86] +# CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c] + mtdcr 178,3 + +# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64] +# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c] + tlbre %r2, %r3, 0 +# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64] +# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c] + tlbre %r2, %r3, 1 +# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64] +# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c] + tlbrehi %r2, %r3 +# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64] +# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c] + tlbrelo %r2, %r3 + +# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4] +# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c] + tlbwe %r2, %r3, 0 +# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4] +# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c] + tlbwe %r2, %r3, 1 +# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4] +# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c] + tlbwehi %r2, %r3 +# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4] +# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c] + tlbwelo %r2, %r3 + +# CHECK-BE: tlbsx 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x24] +# CHECK-LE: tlbsx 2, 3, 1 # encoding: [0x24,0x0f,0x43,0x7c] + tlbsx %r2, %r3, %r1 +# CHECK-BE: tlbsx. 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x25] +# CHECK-LE: tlbsx. 2, 3, 1 # encoding: [0x25,0x0f,0x43,0x7c] + tlbsx. %r2, %r3, %r1 + +# CHECK-BE: mfspr 2, 1018 # encoding: [0x7c,0x5a,0xfa,0xa6] +# CHECK-LE: mfspr 2, 1018 # encoding: [0xa6,0xfa,0x5a,0x7c] + mfdccr %r2 +# CHECK-BE: mtspr 1018, 2 # encoding: [0x7c,0x5a,0xfb,0xa6] +# CHECK-LE: mtspr 1018, 2 # encoding: [0xa6,0xfb,0x5a,0x7c] + mtdccr %r2 + +# CHECK-BE: mfspr 2, 1019 # encoding: [0x7c,0x5b,0xfa,0xa6] +# CHECK-LE: mfspr 2, 1019 # encoding: [0xa6,0xfa,0x5b,0x7c] + mficcr %r2 +# CHECK-BE: mtspr 1019, 2 # encoding: [0x7c,0x5b,0xfb,0xa6] +# CHECK-LE: mtspr 1019, 2 # encoding: [0xa6,0xfb,0x5b,0x7c] + mticcr %r2 + +# CHECK-BE: mfspr 2, 981 # encoding: [0x7c,0x55,0xf2,0xa6] +# CHECK-LE: mfspr 2, 981 # encoding: [0xa6,0xf2,0x55,0x7c] + mfdear %r2 +# CHECK-BE: mtspr 981, 2 # encoding: [0x7c,0x55,0xf3,0xa6] +# CHECK-LE: mtspr 981, 2 # encoding: [0xa6,0xf3,0x55,0x7c] + mtdear %r2 + +# CHECK-BE: mfspr 2, 980 # encoding: [0x7c,0x54,0xf2,0xa6] +# CHECK-LE: mfspr 2, 980 # encoding: [0xa6,0xf2,0x54,0x7c] + mfesr %r2 +# CHECK-BE: mtspr 980, 2 # encoding: [0x7c,0x54,0xf3,0xa6] +# CHECK-LE: mtspr 980, 2 # encoding: [0xa6,0xf3,0x54,0x7c] + mtesr %r2 + +# CHECK-BE: mfspr 2, 986 # encoding: [0x7c,0x5a,0xf2,0xa6] +# CHECK-LE: mfspr 2, 986 # encoding: [0xa6,0xf2,0x5a,0x7c] + mftcr %r2 +# CHECK-BE: mtspr 986, 2 # encoding: [0x7c,0x5a,0xf3,0xa6] +# CHECK-LE: mtspr 986, 2 # encoding: [0xa6,0xf3,0x5a,0x7c] + mttcr %r2 + +# CHECK-BE: mfspr 2, 989 # encoding: [0x7c,0x5d,0xf2,0xa6] +# CHECK-LE: mfspr 2, 989 # encoding: [0xa6,0xf2,0x5d,0x7c] + mftblo %r2 +# CHECK-BE: mtspr 989, 2 # encoding: [0x7c,0x5d,0xf3,0xa6] +# CHECK-LE: mtspr 989, 2 # encoding: [0xa6,0xf3,0x5d,0x7c] + mttblo %r2 +# CHECK-BE: mfspr 2, 988 # encoding: [0x7c,0x5c,0xf2,0xa6] +# CHECK-LE: mfspr 2, 988 # encoding: [0xa6,0xf2,0x5c,0x7c] + mftbhi %r2 +# CHECK-BE: mtspr 988, 2 # encoding: [0x7c,0x5c,0xf3,0xa6] +# CHECK-LE: mtspr 988, 2 # encoding: [0xa6,0xf3,0x5c,0x7c] + mttbhi %r2 + +# CHECK-BE: dccci 5, 6 # encoding: [0x7c,0x05,0x33,0x8c] +# CHECK-LE: dccci 5, 6 # encoding: [0x8c,0x33,0x05,0x7c] + dccci %r5,%r6 +# CHECK-BE: iccci 5, 6 # encoding: [0x7c,0x05,0x37,0x8c] +# CHECK-LE: iccci 5, 6 # encoding: [0x8c,0x37,0x05,0x7c] + iccci %r5,%r6 +# CHECK-BE: dccci 0, 0 # encoding: [0x7c,0x00,0x03,0x8c] +# CHECK-LE: dccci 0, 0 # encoding: [0x8c,0x03,0x00,0x7c] + dci %r0 +# CHECK-BE: iccci 0, 0 # encoding: [0x7c,0x00,0x07,0x8c] +# CHECK-LE: iccci 0, 0 # encoding: [0x8c,0x07,0x00,0x7c] + ici 0 + +# CHECK-BE: mfspr 2, 990 # encoding: [0x7c,0x5e,0xf2,0xa6] +# CHECK-LE: mfspr 2, 990 # encoding: [0xa6,0xf2,0x5e,0x7c] + mfsrr2 2 +# CHECK-BE: mtspr 990, 2 # encoding: [0x7c,0x5e,0xf3,0xa6] +# CHECK-LE: mtspr 990, 2 # encoding: [0xa6,0xf3,0x5e,0x7c] + mtsrr2 2 +# CHECK-BE: mfspr 2, 991 # encoding: [0x7c,0x5f,0xf2,0xa6] +# CHECK-LE: mfspr 2, 991 # encoding: [0xa6,0xf2,0x5f,0x7c] + mfsrr3 2 +# CHECK-BE: mtspr 991, 2 # encoding: [0x7c,0x5f,0xf3,0xa6] +# CHECK-LE: mtspr 991, 2 # encoding: [0xa6,0xf3,0x5f,0x7c] + mtsrr3 2 + +# CHECK-BE: mfdcr 5, 128 # encoding: [0x7c,0xa0,0x22,0x86] +# CHECK-LE: mfdcr 5, 128 # encoding: [0x86,0x22,0xa0,0x7c] + mfbr0 %r5 +# CHECK-BE: mtdcr 128, 5 # encoding: [0x7c,0xa0,0x23,0x86] +# CHECK-LE: mtdcr 128, 5 # encoding: [0x86,0x23,0xa0,0x7c] + mtbr0 %r5 +# CHECK-BE: mfdcr 5, 129 # encoding: [0x7c,0xa1,0x22,0x86] +# CHECK-LE: mfdcr 5, 129 # encoding: [0x86,0x22,0xa1,0x7c] + mfbr1 %r5 +# CHECK-BE: mtdcr 129, 5 # encoding: [0x7c,0xa1,0x23,0x86] +# CHECK-LE: mtdcr 129, 5 # encoding: [0x86,0x23,0xa1,0x7c] + mtbr1 %r5 +# CHECK-BE: mfdcr 5, 130 # encoding: [0x7c,0xa2,0x22,0x86] +# CHECK-LE: mfdcr 5, 130 # encoding: [0x86,0x22,0xa2,0x7c] + mfbr2 %r5 +# CHECK-BE: mtdcr 130, 5 # encoding: [0x7c,0xa2,0x23,0x86] +# CHECK-LE: mtdcr 130, 5 # encoding: [0x86,0x23,0xa2,0x7c] + mtbr2 %r5 +# CHECK-BE: mfdcr 5, 131 # encoding: [0x7c,0xa3,0x22,0x86] +# CHECK-LE: mfdcr 5, 131 # encoding: [0x86,0x22,0xa3,0x7c] + mfbr3 %r5 +# CHECK-BE: mtdcr 131, 5 # encoding: [0x7c,0xa3,0x23,0x86] +# CHECK-LE: mtdcr 131, 5 # encoding: [0x86,0x23,0xa3,0x7c] + mtbr3 %r5 +# CHECK-BE: mfdcr 5, 132 # encoding: [0x7c,0xa4,0x22,0x86] +# CHECK-LE: mfdcr 5, 132 # encoding: [0x86,0x22,0xa4,0x7c] + mfbr4 %r5 +# CHECK-BE: mtdcr 132, 5 # encoding: [0x7c,0xa4,0x23,0x86] +# CHECK-LE: mtdcr 132, 5 # encoding: [0x86,0x23,0xa4,0x7c] + mtbr4 %r5 +# CHECK-BE: mfdcr 5, 133 # encoding: [0x7c,0xa5,0x22,0x86] +# CHECK-LE: mfdcr 5, 133 # encoding: [0x86,0x22,0xa5,0x7c] + mfbr5 %r5 +# CHECK-BE: mtdcr 133, 5 # encoding: [0x7c,0xa5,0x23,0x86] +# CHECK-LE: mtdcr 133, 5 # encoding: [0x86,0x23,0xa5,0x7c] + mtbr5 %r5 +# CHECK-BE: mfdcr 5, 134 # encoding: [0x7c,0xa6,0x22,0x86] +# CHECK-LE: mfdcr 5, 134 # encoding: [0x86,0x22,0xa6,0x7c] + mfbr6 %r5 +# CHECK-BE: mtdcr 134, 5 # encoding: [0x7c,0xa6,0x23,0x86] +# CHECK-LE: mtdcr 134, 5 # encoding: [0x86,0x23,0xa6,0x7c] + mtbr6 %r5 +# CHECK-BE: mfdcr 5, 135 # encoding: [0x7c,0xa7,0x22,0x86] +# CHECK-LE: mfdcr 5, 135 # encoding: [0x86,0x22,0xa7,0x7c] + mfbr7 %r5 +# CHECK-BE: mtdcr 135, 5 # encoding: [0x7c,0xa7,0x23,0x86] +# CHECK-LE: mtdcr 135, 5 # encoding: [0x86,0x23,0xa7,0x7c] + mtbr7 %r5 diff --git a/test/MC/PowerPC/ppc64-encoding-6xx.s b/test/MC/PowerPC/ppc64-encoding-6xx.s new file mode 100644 index 0000000..3a5e7a1 --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-6xx.s @@ -0,0 +1,109 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# Instructions specific to the PowerPC 6xx family: + +# CHECK-BE: mfspr 12, 528 # encoding: [0x7d,0x90,0x82,0xa6] +# CHECK-LE: mfspr 12, 528 # encoding: [0xa6,0x82,0x90,0x7d] +mfibatu %r12, 0 +# CHECK-BE: mfspr 12, 529 # encoding: [0x7d,0x91,0x82,0xa6] +# CHECK-LE: mfspr 12, 529 # encoding: [0xa6,0x82,0x91,0x7d] +mfibatl %r12, 0 +# CHECK-BE: mfspr 12, 530 # encoding: [0x7d,0x92,0x82,0xa6] +# CHECK-LE: mfspr 12, 530 # encoding: [0xa6,0x82,0x92,0x7d] +mfibatu %r12, 1 +# CHECK-BE: mfspr 12, 531 # encoding: [0x7d,0x93,0x82,0xa6] +# CHECK-LE: mfspr 12, 531 # encoding: [0xa6,0x82,0x93,0x7d] +mfibatl %r12, 1 +# CHECK-BE: mfspr 12, 532 # encoding: [0x7d,0x94,0x82,0xa6] +# CHECK-LE: mfspr 12, 532 # encoding: [0xa6,0x82,0x94,0x7d] +mfibatu %r12, 2 +# CHECK-BE: mfspr 12, 533 # encoding: [0x7d,0x95,0x82,0xa6] +# CHECK-LE: mfspr 12, 533 # encoding: [0xa6,0x82,0x95,0x7d] +mfibatl %r12, 2 +# CHECK-BE: mfspr 12, 534 # encoding: [0x7d,0x96,0x82,0xa6] +# CHECK-LE: mfspr 12, 534 # encoding: [0xa6,0x82,0x96,0x7d] +mfibatu %r12, 3 +# CHECK-BE: mfspr 12, 535 # encoding: [0x7d,0x97,0x82,0xa6] +# CHECK-LE: mfspr 12, 535 # encoding: [0xa6,0x82,0x97,0x7d] +mfibatl %r12, 3 +# CHECK-BE: mtspr 528, 12 # encoding: [0x7d,0x90,0x83,0xa6] +# CHECK-LE: mtspr 528, 12 # encoding: [0xa6,0x83,0x90,0x7d] +mtibatu 0, %r12 +# CHECK-BE: mtspr 529, 12 # encoding: [0x7d,0x91,0x83,0xa6] +# CHECK-LE: mtspr 529, 12 # encoding: [0xa6,0x83,0x91,0x7d] +mtibatl 0, %r12 +# CHECK-BE: mtspr 530, 12 # encoding: [0x7d,0x92,0x83,0xa6] +# CHECK-LE: mtspr 530, 12 # encoding: [0xa6,0x83,0x92,0x7d] +mtibatu 1, %r12 +# CHECK-BE: mtspr 531, 12 # encoding: [0x7d,0x93,0x83,0xa6] +# CHECK-LE: mtspr 531, 12 # encoding: [0xa6,0x83,0x93,0x7d] +mtibatl 1, %r12 +# CHECK-BE: mtspr 532, 12 # encoding: [0x7d,0x94,0x83,0xa6] +# CHECK-LE: mtspr 532, 12 # encoding: [0xa6,0x83,0x94,0x7d] +mtibatu 2, %r12 +# CHECK-BE: mtspr 533, 12 # encoding: [0x7d,0x95,0x83,0xa6] +# CHECK-LE: mtspr 533, 12 # encoding: [0xa6,0x83,0x95,0x7d] +mtibatl 2, %r12 +# CHECK-BE: mtspr 534, 12 # encoding: [0x7d,0x96,0x83,0xa6] +# CHECK-LE: mtspr 534, 12 # encoding: [0xa6,0x83,0x96,0x7d] +mtibatu 3, %r12 +# CHECK-BE: mtspr 535, 12 # encoding: [0x7d,0x97,0x83,0xa6] +# CHECK-LE: mtspr 535, 12 # encoding: [0xa6,0x83,0x97,0x7d] +mtibatl 3, %r12 + +# CHECK-BE: mfspr 12, 536 # encoding: [0x7d,0x98,0x82,0xa6] +# CHECK-LE: mfspr 12, 536 # encoding: [0xa6,0x82,0x98,0x7d] +mfdbatu %r12, 0 +# CHECK-BE: mfspr 12, 537 # encoding: [0x7d,0x99,0x82,0xa6] +# CHECK-LE: mfspr 12, 537 # encoding: [0xa6,0x82,0x99,0x7d] +mfdbatl %r12, 0 +# CHECK-BE: mfspr 12, 538 # encoding: [0x7d,0x9a,0x82,0xa6] +# CHECK-LE: mfspr 12, 538 # encoding: [0xa6,0x82,0x9a,0x7d] +mfdbatu %r12, 1 +# CHECK-BE: mfspr 12, 539 # encoding: [0x7d,0x9b,0x82,0xa6] +# CHECK-LE: mfspr 12, 539 # encoding: [0xa6,0x82,0x9b,0x7d] +mfdbatl %r12, 1 +# CHECK-BE: mfspr 12, 540 # encoding: [0x7d,0x9c,0x82,0xa6] +# CHECK-LE: mfspr 12, 540 # encoding: [0xa6,0x82,0x9c,0x7d] +mfdbatu %r12, 2 +# CHECK-BE: mfspr 12, 541 # encoding: [0x7d,0x9d,0x82,0xa6] +# CHECK-LE: mfspr 12, 541 # encoding: [0xa6,0x82,0x9d,0x7d] +mfdbatl %r12, 2 +# CHECK-BE: mfspr 12, 542 # encoding: [0x7d,0x9e,0x82,0xa6] +# CHECK-LE: mfspr 12, 542 # encoding: [0xa6,0x82,0x9e,0x7d] +mfdbatu %r12, 3 +# CHECK-BE: mfspr 12, 543 # encoding: [0x7d,0x9f,0x82,0xa6] +# CHECK-LE: mfspr 12, 543 # encoding: [0xa6,0x82,0x9f,0x7d] +mfdbatl %r12, 3 +# CHECK-BE: mtspr 536, 12 # encoding: [0x7d,0x98,0x83,0xa6] +# CHECK-LE: mtspr 536, 12 # encoding: [0xa6,0x83,0x98,0x7d] +mtdbatu 0, %r12 +# CHECK-BE: mtspr 537, 12 # encoding: [0x7d,0x99,0x83,0xa6] +# CHECK-LE: mtspr 537, 12 # encoding: [0xa6,0x83,0x99,0x7d] +mtdbatl 0, %r12 +# CHECK-BE: mtspr 538, 12 # encoding: [0x7d,0x9a,0x83,0xa6] +# CHECK-LE: mtspr 538, 12 # encoding: [0xa6,0x83,0x9a,0x7d] +mtdbatu 1, %r12 +# CHECK-BE: mtspr 539, 12 # encoding: [0x7d,0x9b,0x83,0xa6] +# CHECK-LE: mtspr 539, 12 # encoding: [0xa6,0x83,0x9b,0x7d] +mtdbatl 1, %r12 +# CHECK-BE: mtspr 540, 12 # encoding: [0x7d,0x9c,0x83,0xa6] +# CHECK-LE: mtspr 540, 12 # encoding: [0xa6,0x83,0x9c,0x7d] +mtdbatu 2, %r12 +# CHECK-BE: mtspr 541, 12 # encoding: [0x7d,0x9d,0x83,0xa6] +# CHECK-LE: mtspr 541, 12 # encoding: [0xa6,0x83,0x9d,0x7d] +mtdbatl 2, %r12 +# CHECK-BE: mtspr 542, 12 # encoding: [0x7d,0x9e,0x83,0xa6] +# CHECK-LE: mtspr 542, 12 # encoding: [0xa6,0x83,0x9e,0x7d] +mtdbatu 3, %r12 +# CHECK-BE: mtspr 543, 12 # encoding: [0x7d,0x9f,0x83,0xa6] +# CHECK-LE: mtspr 543, 12 # encoding: [0xa6,0x83,0x9f,0x7d] +mtdbatl 3, %r12 + +# CHECK-BE: tlbld 4 # encoding: [0x7c,0x00,0x27,0xa4] +# CHECK-LE: tlbld 4 # encoding: [0xa4,0x27,0x00,0x7c] +tlbld %r4 +# CHECK-BE: tlbli 4 # encoding: [0x7c,0x00,0x27,0xe4] +# CHECK-LE: tlbli 4 # encoding: [0xe4,0x27,0x00,0x7c] +tlbli %r4 diff --git a/test/MC/PowerPC/ppc64-encoding-bookII.s b/test/MC/PowerPC/ppc64-encoding-bookII.s index 99796ca..20eba70 100644 --- a/test/MC/PowerPC/ppc64-encoding-bookII.s +++ b/test/MC/PowerPC/ppc64-encoding-bookII.s @@ -8,6 +8,10 @@ # CHECK-LE: icbi 2, 3 # encoding: [0xac,0x1f,0x02,0x7c] icbi 2, 3 +# CHECK-BE: icbt 0, 5, 31 # encoding: [0x7c,0x05,0xf8,0x2c] +# CHECK-LE: icbt 0, 5, 31 # encoding: [0x2c,0xf8,0x05,0x7c] + icbt 0, 5, 31 + # FIXME: dcbt 2, 3, 10 # CHECK-BE: dcbt 2, 3 # encoding: [0x7c,0x02,0x1a,0x2c] # CHECK-LE: dcbt 2, 3 # encoding: [0x2c,0x1a,0x02,0x7c] @@ -53,6 +57,11 @@ # CHECK-BE: wait 2 # encoding: [0x7c,0x40,0x00,0x7c] # CHECK-LE: wait 2 # encoding: [0x7c,0x00,0x40,0x7c] wait 2 +# CHECK-BE: mbar 1 # encoding: [0x7c,0x20,0x06,0xac] +# CHECK-LE: mbar 1 # encoding: [0xac,0x06,0x20,0x7c] + mbar 1 +# CHECK-BE: mbar 0 + mbar # Extended mnemonics @@ -101,7 +110,16 @@ # CHECK-BE: mftb 2, 268 # encoding: [0x7c,0x4c,0x42,0xe6] # CHECK-LE: mftb 2, 268 # encoding: [0xe6,0x42,0x4c,0x7c] mftb 2 +# CHECK-BE: mftb 2, 268 # encoding: [0x7c,0x4c,0x42,0xe6] +# CHECK-LE: mftb 2, 268 # encoding: [0xe6,0x42,0x4c,0x7c] + mftbl 2 # CHECK-BE: mftb 2, 269 # encoding: [0x7c,0x4d,0x42,0xe6] # CHECK-LE: mftb 2, 269 # encoding: [0xe6,0x42,0x4d,0x7c] mftbu 2 +# CHECK-BE: mtspr 284, 3 # encoding: [0x7c,0x7c,0x43,0xa6] +# CHECK-LE: mtspr 284, 3 # encoding: [0xa6,0x43,0x7c,0x7c] + mttbl 3 +# CHECK-BE: mtspr 285, 3 # encoding: [0x7c,0x7d,0x43,0xa6] +# CHECK-LE: mtspr 285, 3 # encoding: [0xa6,0x43,0x7d,0x7c] + mttbu 3 diff --git a/test/MC/PowerPC/ppc64-encoding-bookIII.s b/test/MC/PowerPC/ppc64-encoding-bookIII.s index dfce395..9e784db 100644 --- a/test/MC/PowerPC/ppc64-encoding-bookIII.s +++ b/test/MC/PowerPC/ppc64-encoding-bookIII.s @@ -21,53 +21,66 @@ # CHECK-LE: mtmsrd 4, 1 # encoding: [0x64,0x01,0x81,0x7c] mtmsrd %r4, 1 -# CHECK-BE: mfspr 4, 272 # encoding: [0x7c,0x90,0x42,0xa6] -# CHECK-LE: mfspr 4, 272 # encoding: [0xa6,0x42,0x90,0x7c] - mfsprg %r4, 0 - -# CHECK-BE: mfspr 4, 273 # encoding: [0x7c,0x91,0x42,0xa6] -# CHECK-LE: mfspr 4, 273 # encoding: [0xa6,0x42,0x91,0x7c] - mfsprg %r4, 1 - -# CHECK-BE: mfspr 4, 274 # encoding: [0x7c,0x92,0x42,0xa6] -# CHECK-LE: mfspr 4, 274 # encoding: [0xa6,0x42,0x92,0x7c] - mfsprg %r4, 2 - -# CHECK-BE: mfspr 4, 275 # encoding: [0x7c,0x93,0x42,0xa6] -# CHECK-LE: mfspr 4, 275 # encoding: [0xa6,0x42,0x93,0x7c] - mfsprg %r4, 3 - -# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] -# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] - mtsprg 0, %r4 - -# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] -# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] - mtsprg 1, %r4 - -# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] -# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] - mtsprg 2, %r4 - -# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] -# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] - mtsprg 3, %r4 - -# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] -# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] - mtsprg0 %r4 - -# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] -# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] - mtsprg1 %r4 - -# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] -# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] - mtsprg2 %r4 - -# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] -# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] - mtsprg3 %r4 +# CHECK-BE: mfspr 4, 260 # encoding: [0x7c,0x84,0x42,0xa6] +# CHECK-LE: mfspr 4, 260 # encoding: [0xa6,0x42,0x84,0x7c] + mfsprg %r4, 4 + +# CHECK-BE: mfspr 4, 261 # encoding: [0x7c,0x85,0x42,0xa6] +# CHECK-LE: mfspr 4, 261 # encoding: [0xa6,0x42,0x85,0x7c] + mfsprg %r4, 5 + +# CHECK-BE: mfspr 4, 262 # encoding: [0x7c,0x86,0x42,0xa6] +# CHECK-LE: mfspr 4, 262 # encoding: [0xa6,0x42,0x86,0x7c] + mfsprg %r4, 6 + +# CHECK-BE: mfspr 4, 263 # encoding: [0x7c,0x87,0x42,0xa6] +# CHECK-LE: mfspr 4, 263 # encoding: [0xa6,0x42,0x87,0x7c] + mfsprg %r4, 7 + +# CHECK-BE: mfspr 2, 260 # encoding: [0x7c,0x44,0x42,0xa6] +# CHECK-LE: mfspr 2, 260 # encoding: [0xa6,0x42,0x44,0x7c] + mfsprg4 %r2 +# CHECK-BE: mfspr 2, 261 # encoding: [0x7c,0x45,0x42,0xa6] +# CHECK-LE: mfspr 2, 261 # encoding: [0xa6,0x42,0x45,0x7c] + mfsprg5 %r2 +# CHECK-BE: mfspr 2, 262 # encoding: [0x7c,0x46,0x42,0xa6] +# CHECK-LE: mfspr 2, 262 # encoding: [0xa6,0x42,0x46,0x7c] + mfsprg6 %r2 +# CHECK-BE: mfspr 2, 263 # encoding: [0x7c,0x47,0x42,0xa6] +# CHECK-LE: mfspr 2, 263 # encoding: [0xa6,0x42,0x47,0x7c] + mfsprg7 %r2 + +# NOT-CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x90,0x43,0xa6] +# NOT-CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x90,0x7c] + mtsprg 4, %r4 + +# NOT-CHECK-BE: mtspr 261, 4 # encoding: [0x7c,0x91,0x43,0xa6] +# NOT-CHECK-LE: mtspr 261, 4 # encoding: [0xa6,0x43,0x91,0x7c] + mtsprg 5, %r4 + +# NOT-CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x92,0x43,0xa6] +# NOT-CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x92,0x7c] + mtsprg 6, %r4 + +# NOT-CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x93,0x43,0xa6] +# NOT-CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x93,0x7c] + mtsprg 7, %r4 + +# CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x84,0x43,0xa6] +# CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x84,0x7c] + mtsprg4 %r4 + +# CHECK-BE: mtspr 261, 4 # encoding: [0x7c,0x85,0x43,0xa6] +# CHECK-LE: mtspr 261, 4 # encoding: [0xa6,0x43,0x85,0x7c] + mtsprg5 %r4 + +# CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x86,0x43,0xa6] +# CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x86,0x7c] + mtsprg6 %r4 + +# CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x87,0x43,0xa6] +# CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x87,0x7c] + mtsprg7 %r4 # CHECK-BE: mtspr 280, 4 # encoding: [0x7c,0x98,0x43,0xa6] # CHECK-LE: mtspr 280, 4 # encoding: [0xa6,0x43,0x98,0x7c] @@ -141,3 +154,34 @@ # CHECK-LE: tlbie 4,0 # encoding: [0x64,0x22,0x00,0x7c] tlbie %r4 +# CHECK-BE: rfi # encoding: [0x4c,0x00,0x00,0x64] +# CHECK-LE: rfi # encoding: [0x64,0x00,0x00,0x4c] + rfi +# CHECK-BE: rfci # encoding: [0x4c,0x00,0x00,0x66] +# CHECK-LE: rfci # encoding: [0x66,0x00,0x00,0x4c] + rfci + +# CHECK-BE: wrtee 12 # encoding: [0x7d,0x80,0x01,0x06] +# CHECK-LE: wrtee 12 # encoding: [0x06,0x01,0x80,0x7d] + wrtee %r12 + +# CHECK-BE: wrteei 0 # encoding: [0x7c,0x00,0x01,0x46] +# CHECK-LE: wrteei 0 # encoding: [0x46,0x01,0x00,0x7c] + wrteei 0 + +# CHECK-BE: wrteei 1 # encoding: [0x7c,0x00,0x81,0x46] +# CHECK-LE: wrteei 1 # encoding: [0x46,0x81,0x00,0x7c] + wrteei 1 + +# CHECK-BE: tlbre # encoding: [0x7c,0x00,0x07,0x64] +# CHECK-LE: tlbre # encoding: [0x64,0x07,0x00,0x7c] + tlbre +# CHECK-BE: tlbwe # encoding: [0x7c,0x00,0x07,0xa4] +# CHECK-LE: tlbwe # encoding: [0xa4,0x07,0x00,0x7c] + tlbwe +# CHECK-BE: tlbivax 11, 12 # encoding: [0x7c,0x0b,0x66,0x24] +# CHECK-LE: tlbivax 11, 12 # encoding: [0x24,0x66,0x0b,0x7c] + tlbivax %r11, %r12 +# CHECK-BE: tlbsx 11, 12 # encoding: [0x7c,0x0b,0x67,0x24] +# CHECK-LE: tlbsx 11, 12 # encoding: [0x24,0x67,0x0b,0x7c] + tlbsx %r11, %r12 diff --git a/test/MC/PowerPC/ppc64-encoding-e500.s b/test/MC/PowerPC/ppc64-encoding-e500.s new file mode 100644 index 0000000..fee91ee --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-e500.s @@ -0,0 +1,11 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# Instructions specific to the e500 / e500mc cores: + +# CHECK-BE: rfdi # encoding: [0x4c,0x00,0x00,0x4e] +# CHECK-LE: rfdi # encoding: [0x4e,0x00,0x00,0x4c] + rfdi +# CHECK-BE: rfmci # encoding: [0x4c,0x00,0x00,0x4c] +# CHECK-LE: rfmci # encoding: [0x4c,0x00,0x00,0x4c] + rfmci diff --git a/test/MC/PowerPC/ppc64-encoding-ext.s b/test/MC/PowerPC/ppc64-encoding-ext.s index 2374675..0ffe0bf 100644 --- a/test/MC/PowerPC/ppc64-encoding-ext.s +++ b/test/MC/PowerPC/ppc64-encoding-ext.s @@ -3419,6 +3419,72 @@ # CHECK-BE: mfspr 2, 1 # encoding: [0x7c,0x41,0x02,0xa6] # CHECK-LE: mfspr 2, 1 # encoding: [0xa6,0x02,0x41,0x7c] mfxer 2 +# CHECK-BE: mfspr 2, 4 # encoding: [0x7c,0x44,0x02,0xa6] +# CHECK-LE: mfspr 2, 4 # encoding: [0xa6,0x02,0x44,0x7c] + mfrtcu 2 +# CHECK-BE: mfspr 2, 5 # encoding: [0x7c,0x45,0x02,0xa6] +# CHECK-LE: mfspr 2, 5 # encoding: [0xa6,0x02,0x45,0x7c] + mfrtcl 2 +# CHECK-BE: mtspr 17, 2 # encoding: [0x7c,0x51,0x03,0xa6] +# CHECK-LE: mtspr 17, 2 # encoding: [0xa6,0x03,0x51,0x7c] + mtdscr 2 +# CHECK-BE: mfspr 2, 17 # encoding: [0x7c,0x51,0x02,0xa6] +# CHECK-LE: mfspr 2, 17 # encoding: [0xa6,0x02,0x51,0x7c] + mfdscr 2 +# CHECK-BE: mtspr 18, 2 # encoding: [0x7c,0x52,0x03,0xa6] +# CHECK-LE: mtspr 18, 2 # encoding: [0xa6,0x03,0x52,0x7c] + mtdsisr 2 +# CHECK-BE: mfspr 2, 18 # encoding: [0x7c,0x52,0x02,0xa6] +# CHECK-LE: mfspr 2, 18 # encoding: [0xa6,0x02,0x52,0x7c] + mfdsisr 2 +# CHECK-BE: mtspr 19, 2 # encoding: [0x7c,0x53,0x03,0xa6] +# CHECK-LE: mtspr 19, 2 # encoding: [0xa6,0x03,0x53,0x7c] + mtdar 2 +# CHECK-BE: mfspr 2, 19 # encoding: [0x7c,0x53,0x02,0xa6] +# CHECK-LE: mfspr 2, 19 # encoding: [0xa6,0x02,0x53,0x7c] + mfdar 2 +# CHECK-BE: mtspr 22, 2 # encoding: [0x7c,0x56,0x03,0xa6] +# CHECK-LE: mtspr 22, 2 # encoding: [0xa6,0x03,0x56,0x7c] + mtdec 2 +# CHECK-BE: mfspr 2, 22 # encoding: [0x7c,0x56,0x02,0xa6] +# CHECK-LE: mfspr 2, 22 # encoding: [0xa6,0x02,0x56,0x7c] + mfdec 2 +# CHECK-BE: mtspr 25, 2 # encoding: [0x7c,0x59,0x03,0xa6] +# CHECK-LE: mtspr 25, 2 # encoding: [0xa6,0x03,0x59,0x7c] + mtsdr1 2 +# CHECK-BE: mfspr 2, 25 # encoding: [0x7c,0x59,0x02,0xa6] +# CHECK-LE: mfspr 2, 25 # encoding: [0xa6,0x02,0x59,0x7c] + mfsdr1 2 +# CHECK-BE: mtspr 26, 2 # encoding: [0x7c,0x5a,0x03,0xa6] +# CHECK-LE: mtspr 26, 2 # encoding: [0xa6,0x03,0x5a,0x7c] + mtsrr0 2 +# CHECK-BE: mfspr 2, 26 # encoding: [0x7c,0x5a,0x02,0xa6] +# CHECK-LE: mfspr 2, 26 # encoding: [0xa6,0x02,0x5a,0x7c] + mfsrr0 2 +# CHECK-BE: mtspr 27, 2 # encoding: [0x7c,0x5b,0x03,0xa6] +# CHECK-LE: mtspr 27, 2 # encoding: [0xa6,0x03,0x5b,0x7c] + mtsrr1 2 +# CHECK-BE: mfspr 2, 27 # encoding: [0x7c,0x5b,0x02,0xa6] +# CHECK-LE: mfspr 2, 27 # encoding: [0xa6,0x02,0x5b,0x7c] + mfsrr1 2 +# CHECK-BE: mtspr 28, 2 # encoding: [0x7c,0x5c,0x03,0xa6] +# CHECK-LE: mtspr 28, 2 # encoding: [0xa6,0x03,0x5c,0x7c] + mtcfar 2 +# CHECK-BE: mfspr 2, 28 # encoding: [0x7c,0x5c,0x02,0xa6] +# CHECK-LE: mfspr 2, 28 # encoding: [0xa6,0x02,0x5c,0x7c] + mfcfar 2 +# CHECK-BE: mtspr 29, 2 # encoding: [0x7c,0x5d,0x03,0xa6] +# CHECK-LE: mtspr 29, 2 # encoding: [0xa6,0x03,0x5d,0x7c] + mtamr 2 +# CHECK-BE: mfspr 2, 29 # encoding: [0x7c,0x5d,0x02,0xa6] +# CHECK-LE: mfspr 2, 29 # encoding: [0xa6,0x02,0x5d,0x7c] + mfamr 2 +# CHECK-BE: mtspr 48, 2 # encoding: [0x7c,0x50,0x0b,0xa6] +# CHECK-LE: mtspr 48, 2 # encoding: [0xa6,0x0b,0x50,0x7c] + mtpid 2 +# CHECK-BE: mfspr 2, 48 # encoding: [0x7c,0x50,0x0a,0xa6] +# CHECK-LE: mfspr 2, 48 # encoding: [0xa6,0x0a,0x50,0x7c] + mfpid 2 # CHECK-BE: mtlr 2 # encoding: [0x7c,0x48,0x03,0xa6] # CHECK-LE: mtlr 2 # encoding: [0xa6,0x03,0x48,0x7c] mtlr 2 @@ -3465,3 +3531,105 @@ # CHECK-LE: mtcrf 255, 2 # encoding: [0x20,0xf1,0x4f,0x7c] mtcr 2 +# CHECK-BE: mfspr 4, 272 # encoding: [0x7c,0x90,0x42,0xa6] +# CHECK-LE: mfspr 4, 272 # encoding: [0xa6,0x42,0x90,0x7c] + mfsprg %r4, 0 + +# CHECK-BE: mfspr 4, 273 # encoding: [0x7c,0x91,0x42,0xa6] +# CHECK-LE: mfspr 4, 273 # encoding: [0xa6,0x42,0x91,0x7c] + mfsprg %r4, 1 + +# CHECK-BE: mfspr 4, 274 # encoding: [0x7c,0x92,0x42,0xa6] +# CHECK-LE: mfspr 4, 274 # encoding: [0xa6,0x42,0x92,0x7c] + mfsprg %r4, 2 + +# CHECK-BE: mfspr 4, 275 # encoding: [0x7c,0x93,0x42,0xa6] +# CHECK-LE: mfspr 4, 275 # encoding: [0xa6,0x42,0x93,0x7c] + mfsprg %r4, 3 + +# CHECK-BE: mfspr 2, 272 # encoding: [0x7c,0x50,0x42,0xa6] +# CHECK-LE: mfspr 2, 272 # encoding: [0xa6,0x42,0x50,0x7c] + mfsprg0 %r2 +# CHECK-BE: mfspr 2, 273 # encoding: [0x7c,0x51,0x42,0xa6] +# CHECK-LE: mfspr 2, 273 # encoding: [0xa6,0x42,0x51,0x7c] + mfsprg1 %r2 +# CHECK-BE: mfspr 2, 274 # encoding: [0x7c,0x52,0x42,0xa6] +# CHECK-LE: mfspr 2, 274 # encoding: [0xa6,0x42,0x52,0x7c] + mfsprg2 %r2 +# CHECK-BE: mfspr 2, 275 # encoding: [0x7c,0x53,0x42,0xa6] +# CHECK-LE: mfspr 2, 275 # encoding: [0xa6,0x42,0x53,0x7c] + mfsprg3 %r2 + +# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] +# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] + mtsprg 0, %r4 + +# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] +# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] + mtsprg 1, %r4 + +# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] +# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] + mtsprg 2, %r4 + +# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] +# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] + mtsprg 3, %r4 + +# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] +# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] + mtsprg0 %r4 + +# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] +# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] + mtsprg1 %r4 + +# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] +# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] + mtsprg2 %r4 + +# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] +# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] + mtsprg3 %r4 + +# Altivec Data Stream instruction: +# CHECK-BE: dss 3 # encoding: [0x7c,0x60,0x06,0x6c] +# CHECK-LE: dss 3 # encoding: [0x6c,0x06,0x60,0x7c] + dss 3 +# CHECK-BE: dssall # encoding: [0x7e,0x00,0x06,0x6c] +# CHECK-LE: dssall # encoding: [0x6c,0x06,0x00,0x7e] + dssall +# CHECK-BE: dst 12, 11, 3 # encoding: [0x7c,0x6c,0x5a,0xac] +# CHECK-LE: dst 12, 11, 3 # encoding: [0xac,0x5a,0x6c,0x7c] + dst %r12, %r11, 3 +# CHECK-BE: dstt 12, 11, 3 # encoding: [0x7e,0x6c,0x5a,0xac] +# CHECK-LE: dstt 12, 11, 3 # encoding: [0xac,0x5a,0x6c,0x7e] + dstt %r12, %r11, 3 +# CHECK-BE: dstst 12, 11, 3 # encoding: [0x7c,0x6c,0x5a,0xec] +# CHECK-LE: dstst 12, 11, 3 # encoding: [0xec,0x5a,0x6c,0x7c] + dstst %r12, %r11, 3 +# CHECK-BE: dststt 12, 11, 3 # encoding: [0x7e,0x6c,0x5a,0xec] +# CHECK-LE: dststt 12, 11, 3 # encoding: [0xec,0x5a,0x6c,0x7e] + dststt %r12, %r11, 3 + +# CHECK-BE: tlbia # encoding: [0x7c,0x00,0x02,0xe4] +# CHECK-LE: tlbia # encoding: [0xe4,0x02,0x00,0x7c] + tlbia + +# CHECK-BE: lswi 8, 6, 7 # encoding: [0x7d,0x06,0x3c,0xaa] +# CHECK-LE: lswi 8, 6, 7 # encoding: [0xaa,0x3c,0x06,0x7d] + lswi %r8, %r6, 7 +# CHECK-BE: stswi 8, 6, 7 # encoding: [0x7d,0x06,0x3d,0xaa] +# CHECK-LE: stswi 8, 6, 7 # encoding: [0xaa,0x3d,0x06,0x7d] + stswi %r8, %r6, 7 + +# CHECK-BE: rfid # encoding: [0x4c,0x00,0x00,0x24] +# CHECK-LE: rfid # encoding: [0x24,0x00,0x00,0x4c] + rfid + +# CHECK-BE: mfspr 2, 280 # encoding: [0x7c,0x58,0x42,0xa6] +# CHECK-LE: mfspr 2, 280 # encoding: [0xa6,0x42,0x58,0x7c] + mfasr 2 +# CHECK-BE: mtspr 280, 2 # encoding: [0x7c,0x58,0x43,0xa6] +# CHECK-LE: mtspr 280, 2 # encoding: [0xa6,0x43,0x58,0x7c] + mtasr 2 diff --git a/test/MC/PowerPC/ppc64-encoding-spe.s b/test/MC/PowerPC/ppc64-encoding-spe.s new file mode 100644 index 0000000..d90eb30 --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-spe.s @@ -0,0 +1,622 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# Instructions from the Signal Processing Engine extension: + +# CHECK-BE: evlddx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x00] +# CHECK-LE: evlddx 14, 21, 28 # encoding: [0x00,0xe3,0xd5,0x11] + evlddx %r14, %r21, %r28 +# CHECK-BE: evldwx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x02] +# CHECK-LE: evldwx 14, 21, 28 # encoding: [0x02,0xe3,0xd5,0x11] + evldwx %r14, %r21, %r28 +# CHECK-BE: evldhx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x04] +# CHECK-LE: evldhx 14, 21, 28 # encoding: [0x04,0xe3,0xd5,0x11] + evldhx %r14, %r21, %r28 +# CHECK-BE: evlhhesplatx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x08] +# CHECK-LE: evlhhesplatx 14, 21, 28 # encoding: [0x08,0xe3,0xd5,0x11] + evlhhesplatx %r14, %r21, %r28 +# CHECK-BE: evlhhousplatx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x0c] +# CHECK-LE: evlhhousplatx 14, 21, 28 # encoding: [0x0c,0xe3,0xd5,0x11] + evlhhousplatx %r14, %r21, %r28 +# CHECK-BE: evlhhossplatx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x0e] +# CHECK-LE: evlhhossplatx 14, 21, 28 # encoding: [0x0e,0xe3,0xd5,0x11] + evlhhossplatx %r14, %r21, %r28 +# CHECK-BE: evlwhex 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x10] +# CHECK-LE: evlwhex 14, 21, 28 # encoding: [0x10,0xe3,0xd5,0x11] + evlwhex %r14, %r21, %r28 +# CHECK-BE: evlwhoux 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x14] +# CHECK-LE: evlwhoux 14, 21, 28 # encoding: [0x14,0xe3,0xd5,0x11] + evlwhoux %r14, %r21, %r28 +# CHECK-BE: evlwhosx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x16] +# CHECK-LE: evlwhosx 14, 21, 28 # encoding: [0x16,0xe3,0xd5,0x11] + evlwhosx %r14, %r21, %r28 +# CHECK-BE: evlwwsplatx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x18] +# CHECK-LE: evlwwsplatx 14, 21, 28 # encoding: [0x18,0xe3,0xd5,0x11] + evlwwsplatx %r14, %r21, %r28 +# CHECK-BE: evlwhsplatx 14, 21, 28 # encoding: [0x11,0xd5,0xe3,0x1c] +# CHECK-LE: evlwhsplatx 14, 21, 28 # encoding: [0x1c,0xe3,0xd5,0x11] + evlwhsplatx %r14, %r21, %r28 +# CHECK-BE: evmergehi 14, 21, 28 # encoding: [0x11,0xd5,0xe2,0x2c] +# CHECK-LE: evmergehi 14, 21, 28 # encoding: [0x2c,0xe2,0xd5,0x11] + evmergehi %r14, %r21, %r28 +# CHECK-BE: evmergelo 14, 21, 28 # encoding: [0x11,0xd5,0xe2,0x2d] +# CHECK-LE: evmergelo 14, 21, 28 # encoding: [0x2d,0xe2,0xd5,0x11] + evmergelo %r14, %r21, %r28 +# CHECK-BE: evmergehilo 14, 21, 28 # encoding: [0x11,0xd5,0xe2,0x2e] +# CHECK-LE: evmergehilo 14, 21, 28 # encoding: [0x2e,0xe2,0xd5,0x11] + evmergehilo %r14, %r21, %r28 +# CHECK-BE: evmergelohi 14, 21, 28 # encoding: [0x11,0xd5,0xe2,0x2f] +# CHECK-LE: evmergelohi 14, 21, 28 # encoding: [0x2f,0xe2,0xd5,0x11] + evmergelohi %r14, %r21, %r28 + +# CHECK-BE: brinc 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x0f] +# CHECK-LE: brinc 14, 22, 19 # encoding: [0x0f,0x9a,0xd6,0x11] + brinc %r14, %r22, %r19 +# CHECK-BE: evabs 14, 22 # encoding: [0x11,0xd6,0x02,0x08] +# CHECK-LE: evabs 14, 22 # encoding: [0x08,0x02,0xd6,0x11] + evabs %r14, %r22 +# CHECK-BE: evaddsmiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xc9] +# CHECK-LE: evaddsmiaaw 14, 22 # encoding: [0xc9,0x04,0xd6,0x11] + evaddsmiaaw %r14, %r22 +# CHECK-BE: evaddssiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xc1] +# CHECK-LE: evaddssiaaw 14, 22 # encoding: [0xc1,0x04,0xd6,0x11] + evaddssiaaw %r14, %r22 +# CHECK-BE: evaddusiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xc0] +# CHECK-LE: evaddusiaaw 14, 22 # encoding: [0xc0,0x04,0xd6,0x11] + evaddusiaaw %r14, %r22 +# CHECK-BE: evaddumiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xc8] +# CHECK-LE: evaddumiaaw 14, 22 # encoding: [0xc8,0x04,0xd6,0x11] + evaddumiaaw %r14, %r22 +# CHECK-BE: evaddw 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x00] +# CHECK-LE: evaddw 14, 22, 19 # encoding: [0x00,0x9a,0xd6,0x11] + evaddw %r14, %r22, %r19 +# CHECK-BE: evaddiw 14, 29, 19 # encoding: [0x11,0xd3,0xea,0x02] +# CHECK-LE: evaddiw 14, 29, 19 # encoding: [0x02,0xea,0xd3,0x11] + evaddiw %r14, 29, %r19 +# CHECK-BE: evand 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x11] +# CHECK-LE: evand 14, 22, 19 # encoding: [0x11,0x9a,0xd6,0x11] + evand %r14, %r22, %r19 +# CHECK-BE: evandc 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x12] +# CHECK-LE: evandc 14, 22, 19 # encoding: [0x12,0x9a,0xd6,0x11] + evandc %r14, %r22, %r19 +# CHECK-BE: evcmpeq 3, 22, 19 # encoding: [0x11,0x96,0x9a,0x34] +# CHECK-LE: evcmpeq 3, 22, 19 # encoding: [0x34,0x9a,0x96,0x11] + evcmpeq %cr3, %r22, %r19 +# CHECK-BE: evcmpgts 3, 22, 19 # encoding: [0x11,0x96,0x9a,0x31] +# CHECK-LE: evcmpgts 3, 22, 19 # encoding: [0x31,0x9a,0x96,0x11] + evcmpgts %cr3, %r22, %r19 +# CHECK-BE: evcmpgtu 3, 22, 19 # encoding: [0x11,0x96,0x9a,0x30] +# CHECK-LE: evcmpgtu 3, 22, 19 # encoding: [0x30,0x9a,0x96,0x11] + evcmpgtu %cr3, %r22, %r19 +# CHECK-BE: evcmplts 3, 22, 19 # encoding: [0x11,0x96,0x9a,0x33] +# CHECK-LE: evcmplts 3, 22, 19 # encoding: [0x33,0x9a,0x96,0x11] + evcmplts %cr3, %r22, %r19 +# CHECK-BE: evcmpltu 3, 22, 19 # encoding: [0x11,0x96,0x9a,0x32] +# CHECK-LE: evcmpltu 3, 22, 19 # encoding: [0x32,0x9a,0x96,0x11] + evcmpltu %cr3, %r22, %r19 +# CHECK-BE: evcntlsw 14, 22 # encoding: [0x11,0xd6,0x02,0x0e] +# CHECK-LE: evcntlsw 14, 22 # encoding: [0x0e,0x02,0xd6,0x11] + evcntlsw %r14, %r22 +# CHECK-BE: evcntlzw 14, 22 # encoding: [0x11,0xd6,0x02,0x0d] +# CHECK-LE: evcntlzw 14, 22 # encoding: [0x0d,0x02,0xd6,0x11] + evcntlzw %r14, %r22 +# CHECK-BE: evdivws 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0xc6] +# CHECK-LE: evdivws 14, 22, 19 # encoding: [0xc6,0x9c,0xd6,0x11] + evdivws %r14, %r22, %r19 +# CHECK-BE: evdivwu 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0xc7] +# CHECK-LE: evdivwu 14, 22, 19 # encoding: [0xc7,0x9c,0xd6,0x11] + evdivwu %r14, %r22, %r19 +# CHECK-BE: eveqv 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x19] +# CHECK-LE: eveqv 14, 22, 19 # encoding: [0x19,0x9a,0xd6,0x11] + eveqv %r14, %r22, %r19 +# CHECK-BE: evextsb 14, 22 # encoding: [0x11,0xd6,0x02,0x0a] +# CHECK-LE: evextsb 14, 22 # encoding: [0x0a,0x02,0xd6,0x11] + evextsb %r14, %r22 +# CHECK-BE: evextsh 14, 22 # encoding: [0x11,0xd6,0x02,0x0b] +# CHECK-LE: evextsh 14, 22 # encoding: [0x0b,0x02,0xd6,0x11] + evextsh %r14, %r22 +# CHECK-BE: evmhegsmfaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x2b] +# CHECK-LE: evmhegsmfaa 14, 22, 19 # encoding: [0x2b,0x9d,0xd6,0x11] + evmhegsmfaa %r14, %r22, %r19 +# CHECK-BE: evmhegsmfan 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xab] +# CHECK-LE: evmhegsmfan 14, 22, 19 # encoding: [0xab,0x9d,0xd6,0x11] + evmhegsmfan %r14, %r22, %r19 +# CHECK-BE: evmhegsmiaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x29] +# CHECK-LE: evmhegsmiaa 14, 22, 19 # encoding: [0x29,0x9d,0xd6,0x11] + evmhegsmiaa %r14, %r22, %r19 +# CHECK-BE: evmhegsmian 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xa9] +# CHECK-LE: evmhegsmian 14, 22, 19 # encoding: [0xa9,0x9d,0xd6,0x11] + evmhegsmian %r14, %r22, %r19 +# CHECK-BE: evmhegumiaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x28] +# CHECK-LE: evmhegumiaa 14, 22, 19 # encoding: [0x28,0x9d,0xd6,0x11] + evmhegumiaa %r14, %r22, %r19 +# CHECK-BE: evmhegumian 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xa8] +# CHECK-LE: evmhegumian 14, 22, 19 # encoding: [0xa8,0x9d,0xd6,0x11] + evmhegumian %r14, %r22, %r19 +# CHECK-BE: evmhesmf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x0b] +# CHECK-LE: evmhesmf 14, 22, 19 # encoding: [0x0b,0x9c,0xd6,0x11] + evmhesmf %r14, %r22, %r19 +# CHECK-BE: evmhesmfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x2b] +# CHECK-LE: evmhesmfa 14, 22, 19 # encoding: [0x2b,0x9c,0xd6,0x11] + evmhesmfa %r14, %r22, %r19 +# CHECK-BE: evmhesmfaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x0b] +# CHECK-LE: evmhesmfaaw 14, 22, 19 # encoding: [0x0b,0x9d,0xd6,0x11] + evmhesmfaaw %r14, %r22, %r19 +# CHECK-BE: evmhesmfanw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x8b] +# CHECK-LE: evmhesmfanw 14, 22, 19 # encoding: [0x8b,0x9d,0xd6,0x11] + evmhesmfanw %r14, %r22, %r19 +# CHECK-BE: evmhesmi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x09] +# CHECK-LE: evmhesmi 14, 22, 19 # encoding: [0x09,0x9c,0xd6,0x11] + evmhesmi %r14, %r22, %r19 +# CHECK-BE: evmhesmia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x29] +# CHECK-LE: evmhesmia 14, 22, 19 # encoding: [0x29,0x9c,0xd6,0x11] + evmhesmia %r14, %r22, %r19 +# CHECK-BE: evmhesmiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x09] +# CHECK-LE: evmhesmiaaw 14, 22, 19 # encoding: [0x09,0x9d,0xd6,0x11] + evmhesmiaaw %r14, %r22, %r19 +# CHECK-BE: evmhesmianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x89] +# CHECK-LE: evmhesmianw 14, 22, 19 # encoding: [0x89,0x9d,0xd6,0x11] + evmhesmianw %r14, %r22, %r19 +# CHECK-BE: evmhessf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x03] +# CHECK-LE: evmhessf 14, 22, 19 # encoding: [0x03,0x9c,0xd6,0x11] + evmhessf %r14, %r22, %r19 +# CHECK-BE: evmhessfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x23] +# CHECK-LE: evmhessfa 14, 22, 19 # encoding: [0x23,0x9c,0xd6,0x11] + evmhessfa %r14, %r22, %r19 +# CHECK-BE: evmhessfaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x03] +# CHECK-LE: evmhessfaaw 14, 22, 19 # encoding: [0x03,0x9d,0xd6,0x11] + evmhessfaaw %r14, %r22, %r19 +# CHECK-BE: evmhessfanw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x83] +# CHECK-LE: evmhessfanw 14, 22, 19 # encoding: [0x83,0x9d,0xd6,0x11] + evmhessfanw %r14, %r22, %r19 +# CHECK-BE: evmhessiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x01] +# CHECK-LE: evmhessiaaw 14, 22, 19 # encoding: [0x01,0x9d,0xd6,0x11] + evmhessiaaw %r14, %r22, %r19 +# CHECK-BE: evmhessianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x81] +# CHECK-LE: evmhessianw 14, 22, 19 # encoding: [0x81,0x9d,0xd6,0x11] + evmhessianw %r14, %r22, %r19 +# CHECK-BE: evmheumi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x08] +# CHECK-LE: evmheumi 14, 22, 19 # encoding: [0x08,0x9c,0xd6,0x11] + evmheumi %r14, %r22, %r19 +# CHECK-BE: evmheumia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x28] +# CHECK-LE: evmheumia 14, 22, 19 # encoding: [0x28,0x9c,0xd6,0x11] + evmheumia %r14, %r22, %r19 +# CHECK-BE: evmheumiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x08] +# CHECK-LE: evmheumiaaw 14, 22, 19 # encoding: [0x08,0x9d,0xd6,0x11] + evmheumiaaw %r14, %r22, %r19 +# CHECK-BE: evmheumianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x88] +# CHECK-LE: evmheumianw 14, 22, 19 # encoding: [0x88,0x9d,0xd6,0x11] + evmheumianw %r14, %r22, %r19 +# CHECK-BE: evmheusiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x00] +# CHECK-LE: evmheusiaaw 14, 22, 19 # encoding: [0x00,0x9d,0xd6,0x11] + evmheusiaaw %r14, %r22, %r19 +# CHECK-BE: evmheusianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x80] +# CHECK-LE: evmheusianw 14, 22, 19 # encoding: [0x80,0x9d,0xd6,0x11] + evmheusianw %r14, %r22, %r19 +# CHECK-BE: evmhogsmfaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x2f] +# CHECK-LE: evmhogsmfaa 14, 22, 19 # encoding: [0x2f,0x9d,0xd6,0x11] + evmhogsmfaa %r14, %r22, %r19 +# CHECK-BE: evmhogsmfan 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xaf] +# CHECK-LE: evmhogsmfan 14, 22, 19 # encoding: [0xaf,0x9d,0xd6,0x11] + evmhogsmfan %r14, %r22, %r19 +# CHECK-BE: evmhogsmiaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x2d] +# CHECK-LE: evmhogsmiaa 14, 22, 19 # encoding: [0x2d,0x9d,0xd6,0x11] + evmhogsmiaa %r14, %r22, %r19 +# CHECK-BE: evmhogsmian 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xad] +# CHECK-LE: evmhogsmian 14, 22, 19 # encoding: [0xad,0x9d,0xd6,0x11] + evmhogsmian %r14, %r22, %r19 +# CHECK-BE: evmhogumiaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x2c] +# CHECK-LE: evmhogumiaa 14, 22, 19 # encoding: [0x2c,0x9d,0xd6,0x11] + evmhogumiaa %r14, %r22, %r19 +# CHECK-BE: evmhogumian 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xac] +# CHECK-LE: evmhogumian 14, 22, 19 # encoding: [0xac,0x9d,0xd6,0x11] + evmhogumian %r14, %r22, %r19 +# CHECK-BE: evmhosmf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x0f] +# CHECK-LE: evmhosmf 14, 22, 19 # encoding: [0x0f,0x9c,0xd6,0x11] + evmhosmf %r14, %r22, %r19 +# CHECK-BE: evmhosmfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x2f] +# CHECK-LE: evmhosmfa 14, 22, 19 # encoding: [0x2f,0x9c,0xd6,0x11] + evmhosmfa %r14, %r22, %r19 +# CHECK-BE: evmhosmfaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x0f] +# CHECK-LE: evmhosmfaaw 14, 22, 19 # encoding: [0x0f,0x9d,0xd6,0x11] + evmhosmfaaw %r14, %r22, %r19 +# CHECK-BE: evmhosmfanw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x8f] +# CHECK-LE: evmhosmfanw 14, 22, 19 # encoding: [0x8f,0x9d,0xd6,0x11] + evmhosmfanw %r14, %r22, %r19 +# CHECK-BE: evmhosmi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x0d] +# CHECK-LE: evmhosmi 14, 22, 19 # encoding: [0x0d,0x9c,0xd6,0x11] + evmhosmi %r14, %r22, %r19 +# CHECK-BE: evmhosmia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x2d] +# CHECK-LE: evmhosmia 14, 22, 19 # encoding: [0x2d,0x9c,0xd6,0x11] + evmhosmia %r14, %r22, %r19 +# CHECK-BE: evmhosmiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x0d] +# CHECK-LE: evmhosmiaaw 14, 22, 19 # encoding: [0x0d,0x9d,0xd6,0x11] + evmhosmiaaw %r14, %r22, %r19 +# CHECK-BE: evmhosmianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x8d] +# CHECK-LE: evmhosmianw 14, 22, 19 # encoding: [0x8d,0x9d,0xd6,0x11] + evmhosmianw %r14, %r22, %r19 +# CHECK-BE: evmhossf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x07] +# CHECK-LE: evmhossf 14, 22, 19 # encoding: [0x07,0x9c,0xd6,0x11] + evmhossf %r14, %r22, %r19 +# CHECK-BE: evmhossfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x27] +# CHECK-LE: evmhossfa 14, 22, 19 # encoding: [0x27,0x9c,0xd6,0x11] + evmhossfa %r14, %r22, %r19 +# CHECK-BE: evmhossfaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x07] +# CHECK-LE: evmhossfaaw 14, 22, 19 # encoding: [0x07,0x9d,0xd6,0x11] + evmhossfaaw %r14, %r22, %r19 +# CHECK-BE: evmhossfanw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x87] +# CHECK-LE: evmhossfanw 14, 22, 19 # encoding: [0x87,0x9d,0xd6,0x11] + evmhossfanw %r14, %r22, %r19 +# CHECK-BE: evmhossiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x05] +# CHECK-LE: evmhossiaaw 14, 22, 19 # encoding: [0x05,0x9d,0xd6,0x11] + evmhossiaaw %r14, %r22, %r19 +# CHECK-BE: evmhossianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x85] +# CHECK-LE: evmhossianw 14, 22, 19 # encoding: [0x85,0x9d,0xd6,0x11] + evmhossianw %r14, %r22, %r19 +# CHECK-BE: evmhoumi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x0c] +# CHECK-LE: evmhoumi 14, 22, 19 # encoding: [0x0c,0x9c,0xd6,0x11] + evmhoumi %r14, %r22, %r19 +# CHECK-BE: evmhoumia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x2c] +# CHECK-LE: evmhoumia 14, 22, 19 # encoding: [0x2c,0x9c,0xd6,0x11] + evmhoumia %r14, %r22, %r19 +# CHECK-BE: evmhoumiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x0c] +# CHECK-LE: evmhoumiaaw 14, 22, 19 # encoding: [0x0c,0x9d,0xd6,0x11] + evmhoumiaaw %r14, %r22, %r19 +# CHECK-BE: evmhoumianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x8c] +# CHECK-LE: evmhoumianw 14, 22, 19 # encoding: [0x8c,0x9d,0xd6,0x11] + evmhoumianw %r14, %r22, %r19 +# CHECK-BE: evmhousiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x04] +# CHECK-LE: evmhousiaaw 14, 22, 19 # encoding: [0x04,0x9d,0xd6,0x11] + evmhousiaaw %r14, %r22, %r19 +# CHECK-BE: evmhousianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x84] +# CHECK-LE: evmhousianw 14, 22, 19 # encoding: [0x84,0x9d,0xd6,0x11] + evmhousianw %r14, %r22, %r19 +# CHECK-BE: evmwhsmf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x4f] +# CHECK-LE: evmwhsmf 14, 22, 19 # encoding: [0x4f,0x9c,0xd6,0x11] + evmwhsmf %r14, %r22, %r19 +# CHECK-BE: evmwhsmfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x6f] +# CHECK-LE: evmwhsmfa 14, 22, 19 # encoding: [0x6f,0x9c,0xd6,0x11] + evmwhsmfa %r14, %r22, %r19 +# CHECK-BE: evmwhsmi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x4d] +# CHECK-LE: evmwhsmi 14, 22, 19 # encoding: [0x4d,0x9c,0xd6,0x11] + evmwhsmi %r14, %r22, %r19 +# CHECK-BE: evmwhsmia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x6d] +# CHECK-LE: evmwhsmia 14, 22, 19 # encoding: [0x6d,0x9c,0xd6,0x11] + evmwhsmia %r14, %r22, %r19 +# CHECK-BE: evmwhssf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x47] +# CHECK-LE: evmwhssf 14, 22, 19 # encoding: [0x47,0x9c,0xd6,0x11] + evmwhssf %r14, %r22, %r19 +# CHECK-BE: evmwhssfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x67] +# CHECK-LE: evmwhssfa 14, 22, 19 # encoding: [0x67,0x9c,0xd6,0x11] + evmwhssfa %r14, %r22, %r19 +# CHECK-BE: evmwhumi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x4c] +# CHECK-LE: evmwhumi 14, 22, 19 # encoding: [0x4c,0x9c,0xd6,0x11] + evmwhumi %r14, %r22, %r19 +# CHECK-BE: evmwhumia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x6c] +# CHECK-LE: evmwhumia 14, 22, 19 # encoding: [0x6c,0x9c,0xd6,0x11] + evmwhumia %r14, %r22, %r19 +# CHECK-BE: evmwlsmiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x49] +# CHECK-LE: evmwlsmiaaw 14, 22, 19 # encoding: [0x49,0x9d,0xd6,0x11] + evmwlsmiaaw %r14, %r22, %r19 +# CHECK-BE: evmwlsmianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xc9] +# CHECK-LE: evmwlsmianw 14, 22, 19 # encoding: [0xc9,0x9d,0xd6,0x11] + evmwlsmianw %r14, %r22, %r19 +# CHECK-BE: evmwlssiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x41] +# CHECK-LE: evmwlssiaaw 14, 22, 19 # encoding: [0x41,0x9d,0xd6,0x11] + evmwlssiaaw %r14, %r22, %r19 +# CHECK-BE: evmwlssianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xc1] +# CHECK-LE: evmwlssianw 14, 22, 19 # encoding: [0xc1,0x9d,0xd6,0x11] + evmwlssianw %r14, %r22, %r19 +# CHECK-BE: evmwlumi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x48] +# CHECK-LE: evmwlumi 14, 22, 19 # encoding: [0x48,0x9c,0xd6,0x11] + evmwlumi %r14, %r22, %r19 +# CHECK-BE: evmwlumia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x68] +# CHECK-LE: evmwlumia 14, 22, 19 # encoding: [0x68,0x9c,0xd6,0x11] + evmwlumia %r14, %r22, %r19 +# CHECK-BE: evmwlumiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x48] +# CHECK-LE: evmwlumiaaw 14, 22, 19 # encoding: [0x48,0x9d,0xd6,0x11] + evmwlumiaaw %r14, %r22, %r19 +# CHECK-BE: evmwlumianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xc8] +# CHECK-LE: evmwlumianw 14, 22, 19 # encoding: [0xc8,0x9d,0xd6,0x11] + evmwlumianw %r14, %r22, %r19 +# CHECK-BE: evmwlusiaaw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x40] +# CHECK-LE: evmwlusiaaw 14, 22, 19 # encoding: [0x40,0x9d,0xd6,0x11] + evmwlusiaaw %r14, %r22, %r19 +# CHECK-BE: evmwlusianw 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xc0] +# CHECK-LE: evmwlusianw 14, 22, 19 # encoding: [0xc0,0x9d,0xd6,0x11] + evmwlusianw %r14, %r22, %r19 +# CHECK-BE: evmwsmf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x5b] +# CHECK-LE: evmwsmf 14, 22, 19 # encoding: [0x5b,0x9c,0xd6,0x11] + evmwsmf %r14, %r22, %r19 +# CHECK-BE: evmwsmfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x7b] +# CHECK-LE: evmwsmfa 14, 22, 19 # encoding: [0x7b,0x9c,0xd6,0x11] + evmwsmfa %r14, %r22, %r19 +# CHECK-BE: evmwsmfaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x5b] +# CHECK-LE: evmwsmfaa 14, 22, 19 # encoding: [0x5b,0x9d,0xd6,0x11] + evmwsmfaa %r14, %r22, %r19 +# CHECK-BE: evmwsmfan 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xdb] +# CHECK-LE: evmwsmfan 14, 22, 19 # encoding: [0xdb,0x9d,0xd6,0x11] + evmwsmfan %r14, %r22, %r19 +# CHECK-BE: evmwsmi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x59] +# CHECK-LE: evmwsmi 14, 22, 19 # encoding: [0x59,0x9c,0xd6,0x11] + evmwsmi %r14, %r22, %r19 +# CHECK-BE: evmwsmia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x79] +# CHECK-LE: evmwsmia 14, 22, 19 # encoding: [0x79,0x9c,0xd6,0x11] + evmwsmia %r14, %r22, %r19 +# CHECK-BE: evmwsmiaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x59] +# CHECK-LE: evmwsmiaa 14, 22, 19 # encoding: [0x59,0x9d,0xd6,0x11] + evmwsmiaa %r14, %r22, %r19 +# CHECK-BE: evmwsmian 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xd9] +# CHECK-LE: evmwsmian 14, 22, 19 # encoding: [0xd9,0x9d,0xd6,0x11] + evmwsmian %r14, %r22, %r19 +# CHECK-BE: evmwssf 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x53] +# CHECK-LE: evmwssf 14, 22, 19 # encoding: [0x53,0x9c,0xd6,0x11] + evmwssf %r14, %r22, %r19 +# CHECK-BE: evmwssfa 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x73] +# CHECK-LE: evmwssfa 14, 22, 19 # encoding: [0x73,0x9c,0xd6,0x11] + evmwssfa %r14, %r22, %r19 +# CHECK-BE: evmwssfaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x53] +# CHECK-LE: evmwssfaa 14, 22, 19 # encoding: [0x53,0x9d,0xd6,0x11] + evmwssfaa %r14, %r22, %r19 +# CHECK-BE: evmwssfan 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xd3] +# CHECK-LE: evmwssfan 14, 22, 19 # encoding: [0xd3,0x9d,0xd6,0x11] + evmwssfan %r14, %r22, %r19 +# CHECK-BE: evmwumi 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x58] +# CHECK-LE: evmwumi 14, 22, 19 # encoding: [0x58,0x9c,0xd6,0x11] + evmwumi %r14, %r22, %r19 +# CHECK-BE: evmwumia 14, 22, 19 # encoding: [0x11,0xd6,0x9c,0x78] +# CHECK-LE: evmwumia 14, 22, 19 # encoding: [0x78,0x9c,0xd6,0x11] + evmwumia %r14, %r22, %r19 +# CHECK-BE: evmwumiaa 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0x58] +# CHECK-LE: evmwumiaa 14, 22, 19 # encoding: [0x58,0x9d,0xd6,0x11] + evmwumiaa %r14, %r22, %r19 +# CHECK-BE: evmwumian 14, 22, 19 # encoding: [0x11,0xd6,0x9d,0xd8] +# CHECK-LE: evmwumian 14, 22, 19 # encoding: [0xd8,0x9d,0xd6,0x11] + evmwumian %r14, %r22, %r19 +# CHECK-BE: evnand 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x1e] +# CHECK-LE: evnand 14, 22, 19 # encoding: [0x1e,0x9a,0xd6,0x11] + evnand %r14, %r22, %r19 +# CHECK-BE: evneg 14, 22 # encoding: [0x11,0xd6,0x02,0x09] +# CHECK-LE: evneg 14, 22 # encoding: [0x09,0x02,0xd6,0x11] + evneg %r14, %r22 +# CHECK-BE: evnor 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x18] +# CHECK-LE: evnor 14, 22, 19 # encoding: [0x18,0x9a,0xd6,0x11] + evnor %r14, %r22, %r19 +# CHECK-BE: evor 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x17] +# CHECK-LE: evor 14, 22, 19 # encoding: [0x17,0x9a,0xd6,0x11] + evor %r14, %r22, %r19 +# CHECK-BE: evorc 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x1b] +# CHECK-LE: evorc 14, 22, 19 # encoding: [0x1b,0x9a,0xd6,0x11] + evorc %r14, %r22, %r19 +# CHECK-BE: evrlwi 14, 29, 19 # encoding: [0x11,0xdd,0x9a,0x2a] +# CHECK-LE: evrlwi 14, 29, 19 # encoding: [0x2a,0x9a,0xdd,0x11] + evrlwi %r14, 29, %r19 +# CHECK-BE: evrlw 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x28] +# CHECK-LE: evrlw 14, 22, 19 # encoding: [0x28,0x9a,0xd6,0x11] + evrlw %r14, %r22, %r19 +# CHECK-BE: evrndw 14, 22 # encoding: [0x11,0xd6,0x02,0x0c] +# CHECK-LE: evrndw 14, 22 # encoding: [0x0c,0x02,0xd6,0x11] + evrndw %r14, %r22 +# CHECK-BE: evslwi 14, 29, 19 # encoding: [0x11,0xdd,0x9a,0x26] +# CHECK-LE: evslwi 14, 29, 19 # encoding: [0x26,0x9a,0xdd,0x11] + evslwi %r14, 29, %r19 +# CHECK-BE: evslw 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x24] +# CHECK-LE: evslw 14, 22, 19 # encoding: [0x24,0x9a,0xd6,0x11] + evslw %r14, %r22, %r19 +# CHECK-BE: evsplatfi 14, -13 # encoding: [0x11,0xd3,0x02,0x2b] +# CHECK-LE: evsplatfi 14, -13 # encoding: [0x2b,0x02,0xd3,0x11] + evsplatfi %r14, -13 +# CHECK-BE: evsplati 14, -13 # encoding: [0x11,0xd3,0x02,0x29] +# CHECK-LE: evsplati 14, -13 # encoding: [0x29,0x02,0xd3,0x11] + evsplati %r14, -13 +# CHECK-BE: evsrwis 14, 29, 19 # encoding: [0x11,0xdd,0x9a,0x23] +# CHECK-LE: evsrwis 14, 29, 19 # encoding: [0x23,0x9a,0xdd,0x11] + evsrwis %r14, 29, %r19 +# CHECK-BE: evsrwiu 14, 29, 19 # encoding: [0x11,0xdd,0x9a,0x22] +# CHECK-LE: evsrwiu 14, 29, 19 # encoding: [0x22,0x9a,0xdd,0x11] + evsrwiu %r14, 29, %r19 +# CHECK-BE: evsrws 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x21] +# CHECK-LE: evsrws 14, 22, 19 # encoding: [0x21,0x9a,0xd6,0x11] + evsrws %r14, %r22, %r19 +# CHECK-BE: evsrwu 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x20] +# CHECK-LE: evsrwu 14, 22, 19 # encoding: [0x20,0x9a,0xd6,0x11] + evsrwu %r14, %r22, %r19 +# CHECK-BE: evstddx 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x20] +# CHECK-LE: evstddx 14, 22, 19 # encoding: [0x20,0x9b,0xd6,0x11] + evstddx %r14, %r22, %r19 +# CHECK-BE: evstdhx 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x24] +# CHECK-LE: evstdhx 14, 22, 19 # encoding: [0x24,0x9b,0xd6,0x11] + evstdhx %r14, %r22, %r19 +# CHECK-BE: evstdwx 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x22] +# CHECK-LE: evstdwx 14, 22, 19 # encoding: [0x22,0x9b,0xd6,0x11] + evstdwx %r14, %r22, %r19 +# CHECK-BE: evstwhex 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x30] +# CHECK-LE: evstwhex 14, 22, 19 # encoding: [0x30,0x9b,0xd6,0x11] + evstwhex %r14, %r22, %r19 +# CHECK-BE: evstwhox 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x34] +# CHECK-LE: evstwhox 14, 22, 19 # encoding: [0x34,0x9b,0xd6,0x11] + evstwhox %r14, %r22, %r19 +# CHECK-BE: evstwwex 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x38] +# CHECK-LE: evstwwex 14, 22, 19 # encoding: [0x38,0x9b,0xd6,0x11] + evstwwex %r14, %r22, %r19 +# CHECK-BE: evstwwox 14, 22, 19 # encoding: [0x11,0xd6,0x9b,0x3c] +# CHECK-LE: evstwwox 14, 22, 19 # encoding: [0x3c,0x9b,0xd6,0x11] + evstwwox %r14, %r22, %r19 +# CHECK-BE: evsubfssiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xc3] +# CHECK-LE: evsubfssiaaw 14, 22 # encoding: [0xc3,0x04,0xd6,0x11] + evsubfssiaaw %r14, %r22 +# CHECK-BE: evsubfsmiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xcb] +# CHECK-LE: evsubfsmiaaw 14, 22 # encoding: [0xcb,0x04,0xd6,0x11] + evsubfsmiaaw %r14, %r22 +# CHECK-BE: evsubfumiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xca] +# CHECK-LE: evsubfumiaaw 14, 22 # encoding: [0xca,0x04,0xd6,0x11] + evsubfumiaaw %r14, %r22 +# CHECK-BE: evsubfusiaaw 14, 22 # encoding: [0x11,0xd6,0x04,0xc2] +# CHECK-LE: evsubfusiaaw 14, 22 # encoding: [0xc2,0x04,0xd6,0x11] + evsubfusiaaw %r14, %r22 +# CHECK-BE: evsubfw 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x04] +# CHECK-LE: evsubfw 14, 22, 19 # encoding: [0x04,0x9a,0xd6,0x11] + evsubfw %r14, %r22, %r19 +# CHECK-BE: evsubifw 14, 29, 19 # encoding: [0x11,0xdd,0x9a,0x06] +# CHECK-LE: evsubifw 14, 29, 19 # encoding: [0x06,0x9a,0xdd,0x11] + evsubifw %r14, 29, %r19 +# CHECK-BE: evxor 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x16] +# CHECK-LE: evxor 14, 22, 19 # encoding: [0x16,0x9a,0xd6,0x11] + evxor %r14, %r22, %r19 + +# CHECK-BE: evldd 14, 0(27) # encoding: [0x11,0xdb,0x03,0x01] +# CHECK-LE: evldd 14, 0(27) # encoding: [0x01,0x03,0xdb,0x11] + evldd %r14, 0(%r27) +# CHECK-BE: evldd 14, 248(27) # encoding: [0x11,0xdb,0xfb,0x01] +# CHECK-LE: evldd 14, 248(27) # encoding: [0x01,0xfb,0xdb,0x11] + evldd %r14, 248(%r27) +# CHECK-BE: evldd 14, 248(9) # encoding: [0x11,0xc9,0xfb,0x01] +# CHECK-LE: evldd 14, 248(9) # encoding: [0x01,0xfb,0xc9,0x11] + evldd %r14, 248(%r9) +# CHECK-BE: evldw 14, 0(27) # encoding: [0x11,0xdb,0x03,0x03] +# CHECK-LE: evldw 14, 0(27) # encoding: [0x03,0x03,0xdb,0x11] + evldw %r14, 0(%r27) +# CHECK-BE: evldw 14, 248(27) # encoding: [0x11,0xdb,0xfb,0x03] +# CHECK-LE: evldw 14, 248(27) # encoding: [0x03,0xfb,0xdb,0x11] + evldw %r14, 248(%r27) +# CHECK-BE: evldw 14, 248(9) # encoding: [0x11,0xc9,0xfb,0x03] +# CHECK-LE: evldw 14, 248(9) # encoding: [0x03,0xfb,0xc9,0x11] + evldw %r14, 248(%r9) +# CHECK-BE: evldh 14, 0(27) # encoding: [0x11,0xdb,0x03,0x05] +# CHECK-LE: evldh 14, 0(27) # encoding: [0x05,0x03,0xdb,0x11] + evldh %r14, 0(%r27) +# CHECK-BE: evldh 14, 248(27) # encoding: [0x11,0xdb,0xfb,0x05] +# CHECK-LE: evldh 14, 248(27) # encoding: [0x05,0xfb,0xdb,0x11] + evldh %r14, 248(%r27) +# CHECK-BE: evldh 14, 248(9) # encoding: [0x11,0xc9,0xfb,0x05] +# CHECK-LE: evldh 14, 248(9) # encoding: [0x05,0xfb,0xc9,0x11] + evldh %r14, 248(%r9) +# CHECK-BE: evlhhesplat 14, 0(27) # encoding: [0x11,0xdb,0x03,0x09] +# CHECK-LE: evlhhesplat 14, 0(27) # encoding: [0x09,0x03,0xdb,0x11] + evlhhesplat %r14, 0(%r27) +# CHECK-BE: evlhhousplat 14, 0(27) # encoding: [0x11,0xdb,0x03,0x0d] +# CHECK-LE: evlhhousplat 14, 0(27) # encoding: [0x0d,0x03,0xdb,0x11] + evlhhousplat %r14, 0(%r27) +# CHECK-BE: evlhhousplat 14, 62(27) # encoding: [0x11,0xdb,0xfb,0x0d] +# CHECK-LE: evlhhousplat 14, 62(27) # encoding: [0x0d,0xfb,0xdb,0x11] + evlhhousplat %r14, 62(%r27) +# CHECK-BE: evlhhousplat 14, 62(9) # encoding: [0x11,0xc9,0xfb,0x0d] +# CHECK-LE: evlhhousplat 14, 62(9) # encoding: [0x0d,0xfb,0xc9,0x11] + evlhhousplat %r14, 62(%r9) +# CHECK-BE: evlhhossplat 14, 0(27) # encoding: [0x11,0xdb,0x03,0x0f] +# CHECK-LE: evlhhossplat 14, 0(27) # encoding: [0x0f,0x03,0xdb,0x11] + evlhhossplat %r14, 0(%r27) +# CHECK-BE: evlhhossplat 14, 62(27) # encoding: [0x11,0xdb,0xfb,0x0f] +# CHECK-LE: evlhhossplat 14, 62(27) # encoding: [0x0f,0xfb,0xdb,0x11] + evlhhossplat %r14, 62(%r27) +# CHECK-BE: evlhhossplat 14, 62(9) # encoding: [0x11,0xc9,0xfb,0x0f] +# CHECK-LE: evlhhossplat 14, 62(9) # encoding: [0x0f,0xfb,0xc9,0x11] + evlhhossplat %r14, 62(%r9) +# CHECK-BE: evlwhe 14, 0(27) # encoding: [0x11,0xdb,0x03,0x11] +# CHECK-LE: evlwhe 14, 0(27) # encoding: [0x11,0x03,0xdb,0x11] + evlwhe %r14, 0(%r27) +# CHECK-BE: evlwhe 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x11] +# CHECK-LE: evlwhe 14, 124(27) # encoding: [0x11,0xfb,0xdb,0x11] + evlwhe %r14, 124(%r27) +# CHECK-BE: evlwhe 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x11] +# CHECK-LE: evlwhe 14, 124(9) # encoding: [0x11,0xfb,0xc9,0x11] + evlwhe %r14, 124(%r9) +# CHECK-BE: evlwhou 14, 0(27) # encoding: [0x11,0xdb,0x03,0x15] +# CHECK-LE: evlwhou 14, 0(27) # encoding: [0x15,0x03,0xdb,0x11] + evlwhou %r14, 0(%r27) +# CHECK-BE: evlwhou 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x15] +# CHECK-LE: evlwhou 14, 124(27) # encoding: [0x15,0xfb,0xdb,0x11] + evlwhou %r14, 124(%r27) +# CHECK-BE: evlwhou 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x15] +# CHECK-LE: evlwhou 14, 124(9) # encoding: [0x15,0xfb,0xc9,0x11] + evlwhou %r14, 124(%r9) +# CHECK-BE: evlwhos 14, 0(27) # encoding: [0x11,0xdb,0x03,0x17] +# CHECK-LE: evlwhos 14, 0(27) # encoding: [0x17,0x03,0xdb,0x11] + evlwhos %r14, 0(%r27) +# CHECK-BE: evlwhos 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x17] +# CHECK-LE: evlwhos 14, 124(27) # encoding: [0x17,0xfb,0xdb,0x11] + evlwhos %r14, 124(%r27) +# CHECK-BE: evlwhos 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x17] +# CHECK-LE: evlwhos 14, 124(9) # encoding: [0x17,0xfb,0xc9,0x11] + evlwhos %r14, 124(%r9) +# CHECK-BE: evlwwsplat 14, 0(27) # encoding: [0x11,0xdb,0x03,0x19] +# CHECK-LE: evlwwsplat 14, 0(27) # encoding: [0x19,0x03,0xdb,0x11] + evlwwsplat %r14, 0(%r27) +# CHECK-BE: evlwwsplat 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x19] +# CHECK-LE: evlwwsplat 14, 124(27) # encoding: [0x19,0xfb,0xdb,0x11] + evlwwsplat %r14, 124(%r27) +# CHECK-BE: evlwwsplat 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x19] +# CHECK-LE: evlwwsplat 14, 124(9) # encoding: [0x19,0xfb,0xc9,0x11] + evlwwsplat %r14, 124(%r9) +# CHECK-BE: evlwhsplat 14, 0(27) # encoding: [0x11,0xdb,0x03,0x1d] +# CHECK-LE: evlwhsplat 14, 0(27) # encoding: [0x1d,0x03,0xdb,0x11] + evlwhsplat %r14, 0(%r27) +# CHECK-BE: evlwhsplat 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x1d] +# CHECK-LE: evlwhsplat 14, 124(27) # encoding: [0x1d,0xfb,0xdb,0x11] + evlwhsplat %r14, 124(%r27) +# CHECK-BE: evlwhsplat 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x1d] +# CHECK-LE: evlwhsplat 14, 124(9) # encoding: [0x1d,0xfb,0xc9,0x11] + evlwhsplat %r14, 124(%r9) +# CHECK-BE: evstdd 14, 0(27) # encoding: [0x11,0xdb,0x03,0x21] +# CHECK-LE: evstdd 14, 0(27) # encoding: [0x21,0x03,0xdb,0x11] + evstdd %r14, 0(%r27) +# CHECK-BE: evstdd 14, 248(27) # encoding: [0x11,0xdb,0xfb,0x21] +# CHECK-LE: evstdd 14, 248(27) # encoding: [0x21,0xfb,0xdb,0x11] + evstdd %r14, 248(%r27) +# CHECK-BE: evstdd 14, 248(9) # encoding: [0x11,0xc9,0xfb,0x21] +# CHECK-LE: evstdd 14, 248(9) # encoding: [0x21,0xfb,0xc9,0x11] + evstdd %r14, 248(%r9) +# CHECK-BE: evstdh 14, 0(27) # encoding: [0x11,0xdb,0x03,0x25] +# CHECK-LE: evstdh 14, 0(27) # encoding: [0x25,0x03,0xdb,0x11] + evstdh %r14, 0(%r27) +# CHECK-BE: evstdh 14, 248(27) # encoding: [0x11,0xdb,0xfb,0x25] +# CHECK-LE: evstdh 14, 248(27) # encoding: [0x25,0xfb,0xdb,0x11] + evstdh %r14, 248(%r27) +# CHECK-BE: evstdh 14, 248(9) # encoding: [0x11,0xc9,0xfb,0x25] +# CHECK-LE: evstdh 14, 248(9) # encoding: [0x25,0xfb,0xc9,0x11] + evstdh %r14, 248(%r9) +# CHECK-BE: evstdw 14, 0(27) # encoding: [0x11,0xdb,0x03,0x23] +# CHECK-LE: evstdw 14, 0(27) # encoding: [0x23,0x03,0xdb,0x11] + evstdw %r14, 0(%r27) +# CHECK-BE: evstdw 14, 248(27) # encoding: [0x11,0xdb,0xfb,0x23] +# CHECK-LE: evstdw 14, 248(27) # encoding: [0x23,0xfb,0xdb,0x11] + evstdw %r14, 248(%r27) +# CHECK-BE: evstdw 14, 248(9) # encoding: [0x11,0xc9,0xfb,0x23] +# CHECK-LE: evstdw 14, 248(9) # encoding: [0x23,0xfb,0xc9,0x11] + evstdw %r14, 248(%r9) +# CHECK-BE: evstwhe 14, 0(27) # encoding: [0x11,0xdb,0x03,0x31] +# CHECK-LE: evstwhe 14, 0(27) # encoding: [0x31,0x03,0xdb,0x11] + evstwhe %r14, 0(%r27) +# CHECK-BE: evstwhe 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x31] +# CHECK-LE: evstwhe 14, 124(27) # encoding: [0x31,0xfb,0xdb,0x11] + evstwhe %r14, 124(%r27) +# CHECK-BE: evstwhe 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x31] +# CHECK-LE: evstwhe 14, 124(9) # encoding: [0x31,0xfb,0xc9,0x11] + evstwhe %r14, 124(%r9) +# CHECK-BE: evstwho 14, 0(27) # encoding: [0x11,0xdb,0x03,0x35] +# CHECK-LE: evstwho 14, 0(27) # encoding: [0x35,0x03,0xdb,0x11] + evstwho %r14, 0(%r27) +# CHECK-BE: evstwho 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x35] +# CHECK-LE: evstwho 14, 124(27) # encoding: [0x35,0xfb,0xdb,0x11] + evstwho %r14, 124(%r27) +# CHECK-BE: evstwho 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x35] +# CHECK-LE: evstwho 14, 124(9) # encoding: [0x35,0xfb,0xc9,0x11] + evstwho %r14, 124(%r9) +# CHECK-BE: evstwwe 14, 0(27) # encoding: [0x11,0xdb,0x03,0x39] +# CHECK-LE: evstwwe 14, 0(27) # encoding: [0x39,0x03,0xdb,0x11] + evstwwe %r14, 0(%r27) +# CHECK-BE: evstwwe 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x39] +# CHECK-LE: evstwwe 14, 124(27) # encoding: [0x39,0xfb,0xdb,0x11] + evstwwe %r14, 124(%r27) +# CHECK-BE: evstwwe 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x39] +# CHECK-LE: evstwwe 14, 124(9) # encoding: [0x39,0xfb,0xc9,0x11] + evstwwe %r14, 124(%r9) +# CHECK-BE: evstwwo 14, 0(27) # encoding: [0x11,0xdb,0x03,0x3d] +# CHECK-LE: evstwwo 14, 0(27) # encoding: [0x3d,0x03,0xdb,0x11] + evstwwo %r14, 0(%r27) +# CHECK-BE: evstwwo 14, 124(27) # encoding: [0x11,0xdb,0xfb,0x3d] +# CHECK-LE: evstwwo 14, 124(27) # encoding: [0x3d,0xfb,0xdb,0x11] + evstwwo %r14, 124(%r27) +# CHECK-BE: evstwwo 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x3d] +# CHECK-LE: evstwwo 14, 124(9) # encoding: [0x3d,0xfb,0xc9,0x11] + evstwwo %r14, 124(%r9) diff --git a/test/MC/PowerPC/ppc64-encoding.s b/test/MC/PowerPC/ppc64-encoding.s index 4c3530d..d483f9d 100644 --- a/test/MC/PowerPC/ppc64-encoding.s +++ b/test/MC/PowerPC/ppc64-encoding.s @@ -767,3 +767,17 @@ # CHECK-LE: mfocrf 16, 8 # encoding: [0x26,0x80,0x10,0x7e] mfocrf 16, 8 +# Move to/from segment register +# CHECK-BE: mtsr 12, 10 # encoding: [0x7d,0x4c,0x01,0xa4] +# CHECK-LE: mtsr 12, 10 # encoding: [0xa4,0x01,0x4c,0x7d] + mtsr 12,%r10 +# CHECK-BE: mfsr 10, 12 # encoding: [0x7d,0x4c,0x04,0xa6] +# CHECK-LE: mfsr 10, 12 # encoding: [0xa6,0x04,0x4c,0x7d] + mfsr %r10,12 + +# CHECK-BE: mtsrin 10, 12 # encoding: [0x7d,0x40,0x61,0xe4] +# CHECK-LE: mtsrin 10, 12 # encoding: [0xe4,0x61,0x40,0x7d] + mtsrin %r10,%r12 +# CHECK-BE: mfsrin 10, 12 # encoding: [0x7d,0x40,0x65,0x26] +# CHECK-LE: mfsrin 10, 12 # encoding: [0x26,0x65,0x40,0x7d] + mfsrin %r10,%r12 diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s index 1693405..f98b46d 100644 --- a/test/MC/PowerPC/ppc64-fixup-apply.s +++ b/test/MC/PowerPC/ppc64-fixup-apply.s @@ -14,19 +14,21 @@ addis 1, 1, target .set target, 0x1234 -addi 1, 1, target2@l -addis 1, 1, target2@ha +subi 1, 1, -target2@l +subis 1, 1, -target2@ha .set target2, 0x12345678 addi 1, 1, target3-target4@l -addis 1, 1, target3-target4@ha +subis 1, 1, target4-target3@ha .set target3, 0x23455678 .set target4, 0x12341234 addi 1, 1, target5+0x8000@l addis 1, 1, target5+0x8000@ha +ori 1, 1, target5+0x8000@l +oris 1, 1, target5+0x8000@ha .set target5, 0x10000001 @@ -68,7 +70,7 @@ addis 1, 1, target7@highesta # CHECK-NEXT: ] # CHECK-NEXT: Address: 0x0 # CHECK-NEXT: Offset: -# CHECK-NEXT: Size: 64 +# CHECK-NEXT: Size: 72 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 # CHECK-NEXT: AddressAlignment: 4 @@ -78,10 +80,12 @@ addis 1, 1, target7@highesta # CHECK-LE-NEXT: 0000: 34122138 3412213C 78562138 3412213C # CHECK-BE-NEXT: 0010: 38214444 3C211111 38218001 3C211001 # CHECK-LE-NEXT: 0010: 44442138 1111213C 01802138 0110213C -# CHECK-BE-NEXT: 0020: 38210008 3C210000 38214321 3C214321 -# CHECK-LE-NEXT: 0020: 08002138 0000213C 21432138 2143213C -# CHECK-BE-NEXT: 0030: 3821FFFF 3C211234 38210000 3C211235 -# CHECK-LE-NEXT: 0030: FFFF2138 3412213C 00002138 3512213C +# CHECK-BE-NEXT: 0020: 60218001 64211001 38210008 3C210000 +# CHECK-LE-NEXT: 0020: 01802160 01102164 08002138 0000213C +# CHECK-BE-NEXT: 0030: 38214321 3C214321 3821FFFF 3C211234 +# CHECK-LE-NEXT: 0030: 21432138 2143213C FFFF2138 3412213C +# CHECK-BE-NEXT: 0040: 38210000 3C211235 +# CHECK-LE-NEXT: 0040: 00002138 3512213C # CHECK-NEXT: ) # CHECK-NEXT: } diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s index d3769f5..20a70c2 100644 --- a/test/MC/PowerPC/ppc64-fixups.s +++ b/test/MC/PowerPC/ppc64-fixups.s @@ -687,6 +687,18 @@ base: # CHECK-BE: ori 1, 2, 2 # encoding: [0x60,0x41,0x00,0x02] # CHECK-LE: ori 1, 2, 2 # encoding: [0x02,0x00,0x41,0x60] ori 1, 2, 131071@ha +# CHECK-BE: addi 1, 2, -1 # encoding: [0x38,0x22,0xff,0xff] +# CHECK-LE: addi 1, 2, -1 # encoding: [0xff,0xff,0x22,0x38] + addi 1, 2, 131071@l +# CHECK-BE: addi 1, 2, 1 # encoding: [0x38,0x22,0x00,0x01] +# CHECK-LE: addi 1, 2, 1 # encoding: [0x01,0x00,0x22,0x38] + addi 1, 2, 131071@h +# CHECK-BE: addi 1, 2, 2 # encoding: [0x38,0x22,0x00,0x02] +# CHECK-LE: addi 1, 2, 2 # encoding: [0x02,0x00,0x22,0x38] + addi 1, 2, 131071@ha +# CHECK-BE: addis 1, 2, -4096 # encoding: [0x3c,0x22,0xf0,0x00] +# CHECK-LE: addis 1, 2, -4096 # encoding: [0x00,0xf0,0x22,0x3c] + addis 1, 2, 0xf0000000@h # Data relocs # llvm-mc does not show any "encoding" string for data, so we just check the relocs diff --git a/test/MC/PowerPC/ppc64-localentry-error1.s b/test/MC/PowerPC/ppc64-localentry-error1.s new file mode 100644 index 0000000..e47640f --- /dev/null +++ b/test/MC/PowerPC/ppc64-localentry-error1.s @@ -0,0 +1,11 @@ + +# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t +# RUN: FileCheck < %t %s +# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t +# RUN: FileCheck < %t %s + +sym: + .localentry sym, 123 + +# CHECK: LLVM ERROR: .localentry expression cannot be encoded. + diff --git a/test/MC/PowerPC/ppc64-localentry-error2.s b/test/MC/PowerPC/ppc64-localentry-error2.s new file mode 100644 index 0000000..b05687f --- /dev/null +++ b/test/MC/PowerPC/ppc64-localentry-error2.s @@ -0,0 +1,12 @@ + +# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t +# RUN: FileCheck < %t %s +# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t +# RUN: FileCheck < %t %s + + .globl remote_sym +sym: + .localentry sym, remote_sym + +# CHECK: LLVM ERROR: .localentry expression must be absolute. + diff --git a/test/MC/PowerPC/ppc64-localentry.s b/test/MC/PowerPC/ppc64-localentry.s new file mode 100644 index 0000000..6d2c120 --- /dev/null +++ b/test/MC/PowerPC/ppc64-localentry.s @@ -0,0 +1,70 @@ + +# RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \ +# RUN: llvm-readobj -h -r -symbols | FileCheck %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \ +# RUN: llvm-readobj -h -r -symbols | FileCheck %s + + .type callee1, @function +callee1: + nop + nop + .localentry callee1, .-callee1 + nop + nop + .size callee1, .-callee1 + + .type callee2, @function +callee2: + nop + nop + .size callee2, .-callee2 + + .type caller, @function +caller: + bl callee1 + nop + bl callee2 + nop + .size caller, .-caller + + .section .text.other +caller_other: + bl callee1 + nop + bl callee2 + nop + .size caller_other, .-caller_other + +# Verify that use of .localentry implies ABI version 2 +# CHECK: ElfHeader { +# CHECK: Flags [ (0x2) + +# Verify that fixups to local function symbols are performed only +# if the target symbol does not use .localentry +# CHECK: Relocations [ +# CHECK: Section ({{[0-9]*}}) .rela.text { +# CHECK-NEXT: R_PPC64_REL24 callee1 +# CHECK-NEXT: } +# CHECK-NOT: R_PPC64_REL24 callee2 +# CHECK: Section ({{[0-9]*}}) .rela.text.other { +# CHECK-NEXT: R_PPC64_REL24 callee1 +# CHECK-NEXT: R_PPC64_REL24 .text +# CHECK-NEXT: } + +# Verify that .localentry is encoded in the Other field. +# CHECK: Symbols [ +# CHECK: Name: callee1 +# CHECK-NEXT: Value: +# CHECK-NEXT: Size: 16 +# CHECK-NEXT: Binding: Local +# CHECK-NEXT: Type: Function +# CHECK-NEXT: Other: 96 +# CHECK-NEXT: Section: .text +# CHECK: Name: callee2 +# CHECK-NEXT: Value: +# CHECK-NEXT: Size: 8 +# CHECK-NEXT: Binding: Local +# CHECK-NEXT: Type: Function +# CHECK-NEXT: Other: 0 +# CHECK-NEXT: Section: .text + diff --git a/test/MC/PowerPC/vsx.s b/test/MC/PowerPC/vsx.s index d292dda..b355ba3 100644 --- a/test/MC/PowerPC/vsx.s +++ b/test/MC/PowerPC/vsx.s @@ -1,27 +1,27 @@ # RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s # RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s -# CHECK-BE: lxsdx 7, 5, 31 # encoding: [0x7c,0xe5,0xfc,0x98] -# CHECK-LE: lxsdx 7, 5, 31 # encoding: [0x98,0xfc,0xe5,0x7c] - lxsdx 7, 5, 31 -# CHECK-BE: lxvd2x 7, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x98] -# CHECK-LE: lxvd2x 7, 5, 31 # encoding: [0x98,0xfe,0xe5,0x7c] - lxvd2x 7, 5, 31 -# CHECK-BE: lxvdsx 7, 5, 31 # encoding: [0x7c,0xe5,0xfa,0x98] -# CHECK-LE: lxvdsx 7, 5, 31 # encoding: [0x98,0xfa,0xe5,0x7c] - lxvdsx 7, 5, 31 -# CHECK-BE: lxvw4x 7, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x18] -# CHECK-LE: lxvw4x 7, 5, 31 # encoding: [0x18,0xfe,0xe5,0x7c] - lxvw4x 7, 5, 31 -# CHECK-BE: stxsdx 8, 5, 31 # encoding: [0x7d,0x05,0xfd,0x98] -# CHECK-LE: stxsdx 8, 5, 31 # encoding: [0x98,0xfd,0x05,0x7d] - stxsdx 8, 5, 31 -# CHECK-BE: stxvd2x 8, 5, 31 # encoding: [0x7d,0x05,0xff,0x98] -# CHECK-LE: stxvd2x 8, 5, 31 # encoding: [0x98,0xff,0x05,0x7d] - stxvd2x 8, 5, 31 -# CHECK-BE: stxvw4x 8, 5, 31 # encoding: [0x7d,0x05,0xff,0x18] -# CHECK-LE: stxvw4x 8, 5, 31 # encoding: [0x18,0xff,0x05,0x7d] - stxvw4x 8, 5, 31 +# CHECK-BE: lxsdx 39, 5, 31 # encoding: [0x7c,0xe5,0xfc,0x99] +# CHECK-LE: lxsdx 39, 5, 31 # encoding: [0x99,0xfc,0xe5,0x7c] + lxsdx 39, 5, 31 +# CHECK-BE: lxvd2x 39, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x99] +# CHECK-LE: lxvd2x 39, 5, 31 # encoding: [0x99,0xfe,0xe5,0x7c] + lxvd2x 39, 5, 31 +# CHECK-BE: lxvdsx 39, 5, 31 # encoding: [0x7c,0xe5,0xfa,0x99] +# CHECK-LE: lxvdsx 39, 5, 31 # encoding: [0x99,0xfa,0xe5,0x7c] + lxvdsx 39, 5, 31 +# CHECK-BE: lxvw4x 39, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x19] +# CHECK-LE: lxvw4x 39, 5, 31 # encoding: [0x19,0xfe,0xe5,0x7c] + lxvw4x 39, 5, 31 +# CHECK-BE: stxsdx 40, 5, 31 # encoding: [0x7d,0x05,0xfd,0x99] +# CHECK-LE: stxsdx 40, 5, 31 # encoding: [0x99,0xfd,0x05,0x7d] + stxsdx 40, 5, 31 +# CHECK-BE: stxvd2x 40, 5, 31 # encoding: [0x7d,0x05,0xff,0x99] +# CHECK-LE: stxvd2x 40, 5, 31 # encoding: [0x99,0xff,0x05,0x7d] + stxvd2x 40, 5, 31 +# CHECK-BE: stxvw4x 40, 5, 31 # encoding: [0x7d,0x05,0xff,0x19] +# CHECK-LE: stxvw4x 40, 5, 31 # encoding: [0x19,0xff,0x05,0x7d] + stxvw4x 40, 5, 31 # CHECK-BE: xsabsdp 7, 27 # encoding: [0xf0,0xe0,0xdd,0x64] # CHECK-LE: xsabsdp 7, 27 # encoding: [0x64,0xdd,0xe0,0xf0] xsabsdp 7, 27 diff --git a/test/MC/R600/lit.local.cfg b/test/MC/R600/lit.local.cfg new file mode 100644 index 0000000..ad9ce25 --- /dev/null +++ b/test/MC/R600/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'R600' in config.root.targets: + config.unsupported = True diff --git a/test/MC/R600/sopp.s b/test/MC/R600/sopp.s new file mode 100644 index 0000000..65fc97b --- /dev/null +++ b/test/MC/R600/sopp.s @@ -0,0 +1,52 @@ +// RUN: llvm-mc -arch=r600 -mcpu=SI -show-encoding %s | FileCheck %s + + s_nop 1 // CHECK: s_nop 1 ; encoding: [0x01,0x00,0x80,0xbf] + s_endpgm // CHECK: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] + s_branch 2 // CHECK: s_branch 2 ; encoding: [0x02,0x00,0x82,0xbf] + s_cbranch_scc0 3 // CHECK: s_cbranch_scc0 3 ; encoding: [0x03,0x00,0x84,0xbf] + s_cbranch_scc1 4 // CHECK: s_cbranch_scc1 4 ; encoding: [0x04,0x00,0x85,0xbf] + s_cbranch_vccz 5 // CHECK: s_cbranch_vccz 5 ; encoding: [0x05,0x00,0x86,0xbf] + s_cbranch_vccnz 6 // CHECK: s_cbranch_vccnz 6 ; encoding: [0x06,0x00,0x87,0xbf] + s_cbranch_execz 7 // CHECK: s_cbranch_execz 7 ; encoding: [0x07,0x00,0x88,0xbf] + s_cbranch_execnz 8 // CHECK: s_cbranch_execnz 8 ; encoding: [0x08,0x00,0x89,0xbf] + s_barrier // CHECK: s_barrier ; encoding: [0x00,0x00,0x8a,0xbf] + +//===----------------------------------------------------------------------===// +// s_waitcnt +//===----------------------------------------------------------------------===// + + s_waitcnt 0 + // CHECK: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf] + + s_waitcnt vmcnt(0) & expcnt(0) & lgkmcnt(0) + // CHECK: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf] + + s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) + // CHECK: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf] + + s_waitcnt vmcnt(0), expcnt(0), lgkmcnt(0) + // CHECK: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf] + + s_waitcnt vmcnt(1) + // CHECK: s_waitcnt vmcnt(1) ; encoding: [0x71,0x07,0x8c,0xbf] + + s_waitcnt expcnt(2) + // CHECK: s_waitcnt expcnt(2) ; encoding: [0x2f,0x07,0x8c,0xbf] + + s_waitcnt lgkmcnt(3) + // CHECK: s_waitcnt lgkmcnt(3) ; encoding: [0x7f,0x03,0x8c,0xbf] + + s_waitcnt vmcnt(0), expcnt(0) + // CHECK: s_waitcnt vmcnt(0) expcnt(0) ; encoding: [0x00,0x07,0x8c,0xbf] + + + s_sethalt 9 // CHECK: s_sethalt 9 ; encoding: [0x09,0x00,0x8d,0xbf] + s_sleep 10 // CHECK: s_sleep 10 ; encoding: [0x0a,0x00,0x8e,0xbf] + s_setprio 1 // CHECK: s_setprio 1 ; encoding: [0x01,0x00,0x8f,0xbf] + s_sendmsg 2 // CHECK: s_sendmsg Gs(nop), [m0] ; encoding: [0x02,0x00,0x90,0xbf] + s_sendmsghalt 3 // CHECK: s_sendmsghalt 3 ; encoding: [0x03,0x00,0x91,0xbf] + s_trap 4 // CHECK: s_trap 4 ; encoding: [0x04,0x00,0x92,0xbf] + s_icache_inv // CHECK: s_icache_inv ; encoding: [0x00,0x00,0x93,0xbf] + s_incperflevel 5 // CHECK: s_incperflevel 5 ; encoding: [0x05,0x00,0x94,0xbf] + s_decperflevel 6 // CHECK: s_decperflevel 6 ; encoding: [0x06,0x00,0x95,0xbf] + s_ttracedata // CHECK: s_ttracedata ; encoding: [0x00,0x00,0x96,0xbf] diff --git a/test/MC/SystemZ/lit.local.cfg b/test/MC/SystemZ/lit.local.cfg index 5c02dd3..78c5738 100644 --- a/test/MC/SystemZ/lit.local.cfg +++ b/test/MC/SystemZ/lit.local.cfg @@ -1,3 +1,6 @@ if not 'SystemZ' in config.root.targets: config.unsupported = True +# http://llvm.org/bugs/show_bug.cgi?id=20980 +if 'ubsan' in config.available_features: + config.unsupported = True diff --git a/test/MC/X86/AlignedBundling/labeloffset.s b/test/MC/X86/AlignedBundling/labeloffset.s new file mode 100644 index 0000000..65a0086 --- /dev/null +++ b/test/MC/X86/AlignedBundling/labeloffset.s @@ -0,0 +1,83 @@ +# RUN: llvm-mc -triple=i686-linux -filetype=obj %s -o - | \ +# RUN: llvm-objdump -disassemble -no-show-raw-insn -r - | FileCheck %s +# RUN: llvm-mc -triple=i686-nacl -filetype=obj %s -o - | \ +# RUN: llvm-objdump -disassemble -no-show-raw-insn -r - | FileCheck %s + + .bundle_align_mode 5 + .text + .globl main + .align 32, 0x90 + .type main,@function +main: # @main +# CHECK-LABEL: main: +# Call + pop sequence for determining the PIC base. + .bundle_lock align_to_end + calll .L0$pb + .bundle_unlock +.L0$pb: + popl %eax +# CHECK: 20: popl +# 26 bytes of instructions between the pop and the use of the pic base symbol. + movl $3, 2(%ebx, %ebx) + movl $3, 2(%ebx, %ebx) + movl $3, 2(%ebx, %ebx) + hlt + hlt +# CHECK: nop +.Ltmp0: + addl (.Ltmp0-.L0$pb), %eax +# The addl has bundle padding to push it from 0x3b to 0x40. +# The difference between the labels should be 0x20 (0x40-0x20) not 0x1b +# (0x3b-0x20) +# CHECK: 40: addl 32, %eax + popl %ecx + jmp *%ecx + + +# Also make sure it works with a non-relaxable instruction (cmp vs add) +# and for 2 adjacent labels that both point to the correct instruction + .section .text.bar, "ax" + .globl bar + .align 32, 0x90 + .type bar,@function +bar: +# CHECK-LABEL: bar: + .bundle_lock align_to_end + calll .L1$pb + .bundle_unlock +.L1$pb: + popl %eax +# CHECK: 20: popl +# 26 bytes of instructions between the pop and the use of the pic base symbol. + movl $3, 2(%ebx, %ebx) + movl $3, 2(%ebx, %ebx) + movl $3, 2(%ebx, %ebx) + hlt + hlt +# CHECK: nop +.Ltmp1: +.Ltmp2: + cmpl %eax, .Ltmp1 +# CHECK: 40: cmpl %eax, 64 + cmpl %eax, (.Ltmp2-.L1$pb) +# CHECK: 46: cmpl %eax, 32 + popl %ecx + jmp *%ecx + + +# Switch sections in the middle of a function + .section .text.foo, "ax" + .globl foo + .align 32, 0x90 + .type foo,@function +# CHECK-LABEL: foo: +foo: + inc %eax +tmp3: + .rodata + .type obj,@object + .comm obj,4,4 + .section .text.foo + inc %eax +# CHECK: tmp3: +# CHECK-NEXT: 1: incl diff --git a/test/MC/X86/AlignedBundling/long-nop-pad.s b/test/MC/X86/AlignedBundling/long-nop-pad.s index ea33e28..9b1ec11 100644 --- a/test/MC/X86/AlignedBundling/long-nop-pad.s +++ b/test/MC/X86/AlignedBundling/long-nop-pad.s @@ -14,7 +14,7 @@ foo: # To align this group to a bundle end, we need a 15-byte NOP and a 12-byte NOP. # CHECK: 0: nop # CHECK-NEXT: f: nop -# CHECK-NEXT: 1b: callq +# CHECK: 1b: callq # This push instruction is 1 byte long .bundle_lock align_to_end diff --git a/test/MC/X86/AlignedBundling/nesting.s b/test/MC/X86/AlignedBundling/nesting.s new file mode 100644 index 0000000..8996170 --- /dev/null +++ b/test/MC/X86/AlignedBundling/nesting.s @@ -0,0 +1,67 @@ +# RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - \ +# RUN: | llvm-objdump -disassemble -no-show-raw-insn - | FileCheck %s + +# Will be bundle-aligning to 16 byte boundaries + .bundle_align_mode 4 + .text +# CHECK-LABEL: foo +foo: +# Test that bundle alignment mode can be set more than once. + .bundle_align_mode 4 +# Each of these callq instructions is 5 bytes long + callq bar + callq bar + .bundle_lock + .bundle_lock + callq bar + callq bar + .bundle_unlock + .bundle_unlock +# CHECK: 10: callq +# CHECK-NEXT: 15: callq + + .p2align 4 +# CHECK-LABEL: bar +bar: + callq foo + callq foo +# Check that the callqs get bundled together, and that the whole group is +# align_to_end + .bundle_lock + callq bar + .bundle_lock align_to_end + callq bar + .bundle_unlock + .bundle_unlock +# CHECK: 36: callq +# CHECK-NEXT: 3b: callq + +# CHECK-LABEL: baz +baz: + callq foo + callq foo +# Check that the callqs get bundled together, and that the whole group is +# align_to_end (with the outer directive marked align_to_end) + .bundle_lock align_to_end + callq bar + .bundle_lock + callq bar + .bundle_unlock + .bundle_unlock +# CHECK: 56: callq +# CHECK-NEXT: 5b: callq + +# CHECK-LABEL: quux +quux: + callq bar + callq bar + .bundle_lock + .bundle_lock + callq bar + .bundle_unlock + callq bar + .bundle_unlock +# Check that the calls are bundled together when the second one is after the +# inner nest is closed. +# CHECK: 70: callq +# CHECK-NEXT: 75: callq diff --git a/test/MC/X86/avx512-encodings.s b/test/MC/X86/avx512-encodings.s index 187b512..c734da8 100644 --- a/test/MC/X86/avx512-encodings.s +++ b/test/MC/X86/avx512-encodings.s @@ -113,6 +113,94 @@ // CHECK: encoding: [0x62,0xe1,0x14,0x58,0x58,0x92,0xfc,0xfd,0xff,0xff] vaddps -516(%rdx){1to16}, %zmm13, %zmm18 +// CHECK: vbroadcastsd (%rcx), %zmm30 +// CHECK: encoding: [0x62,0x62,0xfd,0x48,0x19,0x31] + vbroadcastsd (%rcx), %zmm30 + +// CHECK: vbroadcastsd (%rcx), %zmm30 {%k4} +// CHECK: encoding: [0x62,0x62,0xfd,0x4c,0x19,0x31] + vbroadcastsd (%rcx), %zmm30 {%k4} + +// CHECK: vbroadcastsd (%rcx), %zmm30 {%k4} {z} +// CHECK: encoding: [0x62,0x62,0xfd,0xcc,0x19,0x31] + vbroadcastsd (%rcx), %zmm30 {%k4} {z} + +// CHECK: vbroadcastsd 291(%rax,%r14,8), %zmm30 +// CHECK: encoding: [0x62,0x22,0xfd,0x48,0x19,0xb4,0xf0,0x23,0x01,0x00,0x00] + vbroadcastsd 291(%rax,%r14,8), %zmm30 + +// CHECK: vbroadcastsd 1016(%rdx), %zmm30 +// CHECK: encoding: [0x62,0x62,0xfd,0x48,0x19,0x72,0x7f] + vbroadcastsd 1016(%rdx), %zmm30 + +// CHECK: vbroadcastsd 1024(%rdx), %zmm30 +// CHECK: encoding: [0x62,0x62,0xfd,0x48,0x19,0xb2,0x00,0x04,0x00,0x00] + vbroadcastsd 1024(%rdx), %zmm30 + +// CHECK: vbroadcastsd -1024(%rdx), %zmm30 +// CHECK: encoding: [0x62,0x62,0xfd,0x48,0x19,0x72,0x80] + vbroadcastsd -1024(%rdx), %zmm30 + +// CHECK: vbroadcastsd -1032(%rdx), %zmm30 +// CHECK: encoding: [0x62,0x62,0xfd,0x48,0x19,0xb2,0xf8,0xfb,0xff,0xff] + vbroadcastsd -1032(%rdx), %zmm30 + +// CHECK: vbroadcastsd %xmm22, %zmm21 +// CHECK: encoding: [0x62,0xa2,0xfd,0x48,0x19,0xee] + vbroadcastsd %xmm22, %zmm21 + +// CHECK: vbroadcastsd %xmm22, %zmm21 {%k7} +// CHECK: encoding: [0x62,0xa2,0xfd,0x4f,0x19,0xee] + vbroadcastsd %xmm22, %zmm21 {%k7} + +// CHECK: vbroadcastsd %xmm22, %zmm21 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0xfd,0xcf,0x19,0xee] + vbroadcastsd %xmm22, %zmm21 {%k7} {z} + +// CHECK: vbroadcastss (%rcx), %zmm3 +// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x18,0x19] + vbroadcastss (%rcx), %zmm3 + +// CHECK: vbroadcastss (%rcx), %zmm3 {%k4} +// CHECK: encoding: [0x62,0xf2,0x7d,0x4c,0x18,0x19] + vbroadcastss (%rcx), %zmm3 {%k4} + +// CHECK: vbroadcastss (%rcx), %zmm3 {%k4} {z} +// CHECK: encoding: [0x62,0xf2,0x7d,0xcc,0x18,0x19] + vbroadcastss (%rcx), %zmm3 {%k4} {z} + +// CHECK: vbroadcastss 291(%rax,%r14,8), %zmm3 +// CHECK: encoding: [0x62,0xb2,0x7d,0x48,0x18,0x9c,0xf0,0x23,0x01,0x00,0x00] + vbroadcastss 291(%rax,%r14,8), %zmm3 + +// CHECK: vbroadcastss 508(%rdx), %zmm3 +// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x18,0x5a,0x7f] + vbroadcastss 508(%rdx), %zmm3 + +// CHECK: vbroadcastss 512(%rdx), %zmm3 +// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x18,0x9a,0x00,0x02,0x00,0x00] + vbroadcastss 512(%rdx), %zmm3 + +// CHECK: vbroadcastss -512(%rdx), %zmm3 +// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x18,0x5a,0x80] + vbroadcastss -512(%rdx), %zmm3 + +// CHECK: vbroadcastss -516(%rdx), %zmm3 +// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x18,0x9a,0xfc,0xfd,0xff,0xff] + vbroadcastss -516(%rdx), %zmm3 + +// CHECK: vbroadcastss %xmm18, %zmm18 +// CHECK: encoding: [0x62,0xa2,0x7d,0x48,0x18,0xd2] + vbroadcastss %xmm18, %zmm18 + +// CHECK: vbroadcastss %xmm18, %zmm18 {%k2} +// CHECK: encoding: [0x62,0xa2,0x7d,0x4a,0x18,0xd2] + vbroadcastss %xmm18, %zmm18 {%k2} + +// CHECK: vbroadcastss %xmm18, %zmm18 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0x7d,0xca,0x18,0xd2] + vbroadcastss %xmm18, %zmm18 {%k2} {z} + // CHECK: vdivpd %zmm11, %zmm6, %zmm18 // CHECK: encoding: [0x62,0xc1,0xcd,0x48,0x5e,0xd3] vdivpd %zmm11, %zmm6, %zmm18 @@ -449,6 +537,390 @@ // CHECK: encoding: [0x62,0xf1,0x64,0x58,0x5d,0x9a,0xfc,0xfd,0xff,0xff] vminps -516(%rdx){1to16}, %zmm3, %zmm3 +// CHECK: vmovapd %zmm14, %zmm7 +// CHECK: encoding: [0x62,0xd1,0xfd,0x48,0x28,0xfe] + vmovapd %zmm14, %zmm7 + +// CHECK: vmovapd %zmm14, %zmm7 {%k5} +// CHECK: encoding: [0x62,0xd1,0xfd,0x4d,0x28,0xfe] + vmovapd %zmm14, %zmm7 {%k5} + +// CHECK: vmovapd %zmm14, %zmm7 {%k5} {z} +// CHECK: encoding: [0x62,0xd1,0xfd,0xcd,0x28,0xfe] + vmovapd %zmm14, %zmm7 {%k5} {z} + +// CHECK: vmovapd (%rcx), %zmm7 +// CHECK: encoding: [0x62,0xf1,0xfd,0x48,0x28,0x39] + vmovapd (%rcx), %zmm7 + +// CHECK: vmovapd 291(%rax,%r14,8), %zmm7 +// CHECK: encoding: [0x62,0xb1,0xfd,0x48,0x28,0xbc,0xf0,0x23,0x01,0x00,0x00] + vmovapd 291(%rax,%r14,8), %zmm7 + +// CHECK: vmovapd 8128(%rdx), %zmm7 +// CHECK: encoding: [0x62,0xf1,0xfd,0x48,0x28,0x7a,0x7f] + vmovapd 8128(%rdx), %zmm7 + +// CHECK: vmovapd 8192(%rdx), %zmm7 +// CHECK: encoding: [0x62,0xf1,0xfd,0x48,0x28,0xba,0x00,0x20,0x00,0x00] + vmovapd 8192(%rdx), %zmm7 + +// CHECK: vmovapd -8192(%rdx), %zmm7 +// CHECK: encoding: [0x62,0xf1,0xfd,0x48,0x28,0x7a,0x80] + vmovapd -8192(%rdx), %zmm7 + +// CHECK: vmovapd -8256(%rdx), %zmm7 +// CHECK: encoding: [0x62,0xf1,0xfd,0x48,0x28,0xba,0xc0,0xdf,0xff,0xff] + vmovapd -8256(%rdx), %zmm7 + +// CHECK: vmovaps %zmm9, %zmm5 +// CHECK: encoding: [0x62,0xd1,0x7c,0x48,0x28,0xe9] + vmovaps %zmm9, %zmm5 + +// CHECK: vmovaps %zmm9, %zmm5 {%k1} +// CHECK: encoding: [0x62,0xd1,0x7c,0x49,0x28,0xe9] + vmovaps %zmm9, %zmm5 {%k1} + +// CHECK: vmovaps %zmm9, %zmm5 {%k1} {z} +// CHECK: encoding: [0x62,0xd1,0x7c,0xc9,0x28,0xe9] + vmovaps %zmm9, %zmm5 {%k1} {z} + +// CHECK: vmovaps (%rcx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x28,0x29] + vmovaps (%rcx), %zmm5 + +// CHECK: vmovaps 291(%rax,%r14,8), %zmm5 +// CHECK: encoding: [0x62,0xb1,0x7c,0x48,0x28,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovaps 291(%rax,%r14,8), %zmm5 + +// CHECK: vmovaps 8128(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x28,0x6a,0x7f] + vmovaps 8128(%rdx), %zmm5 + +// CHECK: vmovaps 8192(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x28,0xaa,0x00,0x20,0x00,0x00] + vmovaps 8192(%rdx), %zmm5 + +// CHECK: vmovaps -8192(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x28,0x6a,0x80] + vmovaps -8192(%rdx), %zmm5 + +// CHECK: vmovaps -8256(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x28,0xaa,0xc0,0xdf,0xff,0xff] + vmovaps -8256(%rdx), %zmm5 + +// CHECK: vmovdqa32 %zmm18, %zmm22 +// CHECK: encoding: [0x62,0xa1,0x7d,0x48,0x6f,0xf2] + vmovdqa32 %zmm18, %zmm22 + +// CHECK: vmovdqa32 %zmm18, %zmm22 {%k6} +// CHECK: encoding: [0x62,0xa1,0x7d,0x4e,0x6f,0xf2] + vmovdqa32 %zmm18, %zmm22 {%k6} + +// CHECK: vmovdqa32 %zmm18, %zmm22 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0x7d,0xce,0x6f,0xf2] + vmovdqa32 %zmm18, %zmm22 {%k6} {z} + +// CHECK: vmovdqa32 (%rcx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x6f,0x31] + vmovdqa32 (%rcx), %zmm22 + +// CHECK: vmovdqa32 291(%rax,%r14,8), %zmm22 +// CHECK: encoding: [0x62,0xa1,0x7d,0x48,0x6f,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovdqa32 291(%rax,%r14,8), %zmm22 + +// CHECK: vmovdqa32 8128(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x6f,0x72,0x7f] + vmovdqa32 8128(%rdx), %zmm22 + +// CHECK: vmovdqa32 8192(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x6f,0xb2,0x00,0x20,0x00,0x00] + vmovdqa32 8192(%rdx), %zmm22 + +// CHECK: vmovdqa32 -8192(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x6f,0x72,0x80] + vmovdqa32 -8192(%rdx), %zmm22 + +// CHECK: vmovdqa32 -8256(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x6f,0xb2,0xc0,0xdf,0xff,0xff] + vmovdqa32 -8256(%rdx), %zmm22 + +// CHECK: vmovdqa64 %zmm12, %zmm22 +// CHECK: encoding: [0x62,0xc1,0xfd,0x48,0x6f,0xf4] + vmovdqa64 %zmm12, %zmm22 + +// CHECK: vmovdqa64 %zmm12, %zmm22 {%k5} +// CHECK: encoding: [0x62,0xc1,0xfd,0x4d,0x6f,0xf4] + vmovdqa64 %zmm12, %zmm22 {%k5} + +// CHECK: vmovdqa64 %zmm12, %zmm22 {%k5} {z} +// CHECK: encoding: [0x62,0xc1,0xfd,0xcd,0x6f,0xf4] + vmovdqa64 %zmm12, %zmm22 {%k5} {z} + +// CHECK: vmovdqa64 (%rcx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x6f,0x31] + vmovdqa64 (%rcx), %zmm22 + +// CHECK: vmovdqa64 291(%rax,%r14,8), %zmm22 +// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x6f,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovdqa64 291(%rax,%r14,8), %zmm22 + +// CHECK: vmovdqa64 8128(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x6f,0x72,0x7f] + vmovdqa64 8128(%rdx), %zmm22 + +// CHECK: vmovdqa64 8192(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x6f,0xb2,0x00,0x20,0x00,0x00] + vmovdqa64 8192(%rdx), %zmm22 + +// CHECK: vmovdqa64 -8192(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x6f,0x72,0x80] + vmovdqa64 -8192(%rdx), %zmm22 + +// CHECK: vmovdqa64 -8256(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x6f,0xb2,0xc0,0xdf,0xff,0xff] + vmovdqa64 -8256(%rdx), %zmm22 + +// CHECK: vmovdqu32 %zmm24, %zmm5 +// CHECK: encoding: [0x62,0x91,0x7e,0x48,0x6f,0xe8] + vmovdqu32 %zmm24, %zmm5 + +// CHECK: vmovdqu32 %zmm24, %zmm5 {%k5} +// CHECK: encoding: [0x62,0x91,0x7e,0x4d,0x6f,0xe8] + vmovdqu32 %zmm24, %zmm5 {%k5} + +// CHECK: vmovdqu32 %zmm24, %zmm5 {%k5} {z} +// CHECK: encoding: [0x62,0x91,0x7e,0xcd,0x6f,0xe8] + vmovdqu32 %zmm24, %zmm5 {%k5} {z} + +// CHECK: vmovdqu32 (%rcx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7e,0x48,0x6f,0x29] + vmovdqu32 (%rcx), %zmm5 + +// CHECK: vmovdqu32 291(%rax,%r14,8), %zmm5 +// CHECK: encoding: [0x62,0xb1,0x7e,0x48,0x6f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu32 291(%rax,%r14,8), %zmm5 + +// CHECK: vmovdqu32 8128(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7e,0x48,0x6f,0x6a,0x7f] + vmovdqu32 8128(%rdx), %zmm5 + +// CHECK: vmovdqu32 8192(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7e,0x48,0x6f,0xaa,0x00,0x20,0x00,0x00] + vmovdqu32 8192(%rdx), %zmm5 + +// CHECK: vmovdqu32 -8192(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7e,0x48,0x6f,0x6a,0x80] + vmovdqu32 -8192(%rdx), %zmm5 + +// CHECK: vmovdqu32 -8256(%rdx), %zmm5 +// CHECK: encoding: [0x62,0xf1,0x7e,0x48,0x6f,0xaa,0xc0,0xdf,0xff,0xff] + vmovdqu32 -8256(%rdx), %zmm5 + +// CHECK: vmovdqu64 %zmm15, %zmm6 +// CHECK: encoding: [0x62,0xd1,0xfe,0x48,0x6f,0xf7] + vmovdqu64 %zmm15, %zmm6 + +// CHECK: vmovdqu64 %zmm15, %zmm6 {%k3} +// CHECK: encoding: [0x62,0xd1,0xfe,0x4b,0x6f,0xf7] + vmovdqu64 %zmm15, %zmm6 {%k3} + +// CHECK: vmovdqu64 %zmm15, %zmm6 {%k3} {z} +// CHECK: encoding: [0x62,0xd1,0xfe,0xcb,0x6f,0xf7] + vmovdqu64 %zmm15, %zmm6 {%k3} {z} + +// CHECK: vmovdqu64 (%rcx), %zmm6 +// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x31] + vmovdqu64 (%rcx), %zmm6 + +// CHECK: vmovdqu64 291(%rax,%r14,8), %zmm6 +// CHECK: encoding: [0x62,0xb1,0xfe,0x48,0x6f,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovdqu64 291(%rax,%r14,8), %zmm6 + +// CHECK: vmovdqu64 8128(%rdx), %zmm6 +// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x72,0x7f] + vmovdqu64 8128(%rdx), %zmm6 + +// CHECK: vmovdqu64 8192(%rdx), %zmm6 +// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0xb2,0x00,0x20,0x00,0x00] + vmovdqu64 8192(%rdx), %zmm6 + +// CHECK: vmovdqu64 -8192(%rdx), %zmm6 +// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x72,0x80] + vmovdqu64 -8192(%rdx), %zmm6 + +// CHECK: vmovdqu64 -8256(%rdx), %zmm6 +// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0xb2,0xc0,0xdf,0xff,0xff] + vmovdqu64 -8256(%rdx), %zmm6 + +// CHECK: vmovntdq %zmm24, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x01] + vmovntdq %zmm24, (%rcx) + +// CHECK: vmovntdq %zmm24, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7d,0x48,0xe7,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovntdq %zmm24, 291(%rax,%r14,8) + +// CHECK: vmovntdq %zmm24, 8128(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x42,0x7f] + vmovntdq %zmm24, 8128(%rdx) + +// CHECK: vmovntdq %zmm24, 8192(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x82,0x00,0x20,0x00,0x00] + vmovntdq %zmm24, 8192(%rdx) + +// CHECK: vmovntdq %zmm24, -8192(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x42,0x80] + vmovntdq %zmm24, -8192(%rdx) + +// CHECK: vmovntdq %zmm24, -8256(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x82,0xc0,0xdf,0xff,0xff] + vmovntdq %zmm24, -8256(%rdx) + +// CHECK: vmovntdqa (%rcx), %zmm17 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x09] + vmovntdqa (%rcx), %zmm17 + +// CHECK: vmovntdqa 291(%rax,%r14,8), %zmm17 +// CHECK: encoding: [0x62,0xa2,0x7d,0x48,0x2a,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovntdqa 291(%rax,%r14,8), %zmm17 + +// CHECK: vmovntdqa 8128(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x4a,0x7f] + vmovntdqa 8128(%rdx), %zmm17 + +// CHECK: vmovntdqa 8192(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x8a,0x00,0x20,0x00,0x00] + vmovntdqa 8192(%rdx), %zmm17 + +// CHECK: vmovntdqa -8192(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x4a,0x80] + vmovntdqa -8192(%rdx), %zmm17 + +// CHECK: vmovntdqa -8256(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x8a,0xc0,0xdf,0xff,0xff] + vmovntdqa -8256(%rdx), %zmm17 + +// CHECK: vmovntpd %zmm17, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x09] + vmovntpd %zmm17, (%rcx) + +// CHECK: vmovntpd %zmm17, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x2b,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovntpd %zmm17, 291(%rax,%r14,8) + +// CHECK: vmovntpd %zmm17, 8128(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x4a,0x7f] + vmovntpd %zmm17, 8128(%rdx) + +// CHECK: vmovntpd %zmm17, 8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x8a,0x00,0x20,0x00,0x00] + vmovntpd %zmm17, 8192(%rdx) + +// CHECK: vmovntpd %zmm17, -8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x4a,0x80] + vmovntpd %zmm17, -8192(%rdx) + +// CHECK: vmovntpd %zmm17, -8256(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x8a,0xc0,0xdf,0xff,0xff] + vmovntpd %zmm17, -8256(%rdx) + +// CHECK: vmovntps %zmm5, (%rcx) +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x29] + vmovntps %zmm5, (%rcx) + +// CHECK: vmovntps %zmm5, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xb1,0x7c,0x48,0x2b,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovntps %zmm5, 291(%rax,%r14,8) + +// CHECK: vmovntps %zmm5, 8128(%rdx) +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x6a,0x7f] + vmovntps %zmm5, 8128(%rdx) + +// CHECK: vmovntps %zmm5, 8192(%rdx) +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0xaa,0x00,0x20,0x00,0x00] + vmovntps %zmm5, 8192(%rdx) + +// CHECK: vmovntps %zmm5, -8192(%rdx) +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x6a,0x80] + vmovntps %zmm5, -8192(%rdx) + +// CHECK: vmovntps %zmm5, -8256(%rdx) +// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0xaa,0xc0,0xdf,0xff,0xff] + vmovntps %zmm5, -8256(%rdx) + +// CHECK: vmovupd %zmm9, %zmm27 +// CHECK: encoding: [0x62,0x41,0xfd,0x48,0x10,0xd9] + vmovupd %zmm9, %zmm27 + +// CHECK: vmovupd %zmm9, %zmm27 {%k2} +// CHECK: encoding: [0x62,0x41,0xfd,0x4a,0x10,0xd9] + vmovupd %zmm9, %zmm27 {%k2} + +// CHECK: vmovupd %zmm9, %zmm27 {%k2} {z} +// CHECK: encoding: [0x62,0x41,0xfd,0xca,0x10,0xd9] + vmovupd %zmm9, %zmm27 {%k2} {z} + +// CHECK: vmovupd (%rcx), %zmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x48,0x10,0x19] + vmovupd (%rcx), %zmm27 + +// CHECK: vmovupd 291(%rax,%r14,8), %zmm27 +// CHECK: encoding: [0x62,0x21,0xfd,0x48,0x10,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmovupd 291(%rax,%r14,8), %zmm27 + +// CHECK: vmovupd 8128(%rdx), %zmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x48,0x10,0x5a,0x7f] + vmovupd 8128(%rdx), %zmm27 + +// CHECK: vmovupd 8192(%rdx), %zmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x48,0x10,0x9a,0x00,0x20,0x00,0x00] + vmovupd 8192(%rdx), %zmm27 + +// CHECK: vmovupd -8192(%rdx), %zmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x48,0x10,0x5a,0x80] + vmovupd -8192(%rdx), %zmm27 + +// CHECK: vmovupd -8256(%rdx), %zmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x48,0x10,0x9a,0xc0,0xdf,0xff,0xff] + vmovupd -8256(%rdx), %zmm27 + +// CHECK: vmovups %zmm22, %zmm22 +// CHECK: encoding: [0x62,0xa1,0x7c,0x48,0x10,0xf6] + vmovups %zmm22, %zmm22 + +// CHECK: vmovups %zmm22, %zmm22 {%k3} +// CHECK: encoding: [0x62,0xa1,0x7c,0x4b,0x10,0xf6] + vmovups %zmm22, %zmm22 {%k3} + +// CHECK: vmovups %zmm22, %zmm22 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0x7c,0xcb,0x10,0xf6] + vmovups %zmm22, %zmm22 {%k3} {z} + +// CHECK: vmovups (%rcx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x48,0x10,0x31] + vmovups (%rcx), %zmm22 + +// CHECK: vmovups 291(%rax,%r14,8), %zmm22 +// CHECK: encoding: [0x62,0xa1,0x7c,0x48,0x10,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovups 291(%rax,%r14,8), %zmm22 + +// CHECK: vmovups 8128(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x48,0x10,0x72,0x7f] + vmovups 8128(%rdx), %zmm22 + +// CHECK: vmovups 8192(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x48,0x10,0xb2,0x00,0x20,0x00,0x00] + vmovups 8192(%rdx), %zmm22 + +// CHECK: vmovups -8192(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x48,0x10,0x72,0x80] + vmovups -8192(%rdx), %zmm22 + +// CHECK: vmovups -8256(%rdx), %zmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x48,0x10,0xb2,0xc0,0xdf,0xff,0xff] + vmovups -8256(%rdx), %zmm22 + // CHECK: vmulpd %zmm23, %zmm4, %zmm24 // CHECK: encoding: [0x62,0x21,0xdd,0x48,0x59,0xc7] vmulpd %zmm23, %zmm4, %zmm24 @@ -1041,6 +1513,438 @@ // CHECK: encoding: [0x62,0xe1,0xdd,0x58,0xdb,0x8a,0xf8,0xfb,0xff,0xff] vpandq -1032(%rdx){1to8}, %zmm4, %zmm17 +// CHECK: vpcmpd $171, %zmm10, %zmm25, %k5 +// CHECK: encoding: [0x62,0xd3,0x35,0x40,0x1f,0xea,0xab] + vpcmpd $171, %zmm10, %zmm25, %k5 + +// CHECK: vpcmpd $171, %zmm10, %zmm25, %k5 {%k3} +// CHECK: encoding: [0x62,0xd3,0x35,0x43,0x1f,0xea,0xab] + vpcmpd $171, %zmm10, %zmm25, %k5 {%k3} + +// CHECK: vpcmpd $123, %zmm10, %zmm25, %k5 +// CHECK: encoding: [0x62,0xd3,0x35,0x40,0x1f,0xea,0x7b] + vpcmpd $123, %zmm10, %zmm25, %k5 + +// CHECK: vpcmpd $123, (%rcx), %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1f,0x29,0x7b] + vpcmpd $123, (%rcx), %zmm25, %k5 + +// CHECK: vpcmpd $123, 291(%rax,%r14,8), %zmm25, %k5 +// CHECK: encoding: [0x62,0xb3,0x35,0x40,0x1f,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpd $123, 291(%rax,%r14,8), %zmm25, %k5 + +// CHECK: vpcmpd $123, (%rcx){1to16}, %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1f,0x29,0x7b] + vpcmpd $123, (%rcx){1to16}, %zmm25, %k5 + +// CHECK: vpcmpd $123, 8128(%rdx), %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1f,0x6a,0x7f,0x7b] + vpcmpd $123, 8128(%rdx), %zmm25, %k5 + +// CHECK: vpcmpd $123, 8192(%rdx), %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1f,0xaa,0x00,0x20,0x00,0x00,0x7b] + vpcmpd $123, 8192(%rdx), %zmm25, %k5 + +// CHECK: vpcmpd $123, -8192(%rdx), %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1f,0x6a,0x80,0x7b] + vpcmpd $123, -8192(%rdx), %zmm25, %k5 + +// CHECK: vpcmpd $123, -8256(%rdx), %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1f,0xaa,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpd $123, -8256(%rdx), %zmm25, %k5 + +// CHECK: vpcmpd $123, 508(%rdx){1to16}, %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1f,0x6a,0x7f,0x7b] + vpcmpd $123, 508(%rdx){1to16}, %zmm25, %k5 + +// CHECK: vpcmpd $123, 512(%rdx){1to16}, %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1f,0xaa,0x00,0x02,0x00,0x00,0x7b] + vpcmpd $123, 512(%rdx){1to16}, %zmm25, %k5 + +// CHECK: vpcmpd $123, -512(%rdx){1to16}, %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1f,0x6a,0x80,0x7b] + vpcmpd $123, -512(%rdx){1to16}, %zmm25, %k5 + +// CHECK: vpcmpd $123, -516(%rdx){1to16}, %zmm25, %k5 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1f,0xaa,0xfc,0xfd,0xff,0xff,0x7b] + vpcmpd $123, -516(%rdx){1to16}, %zmm25, %k5 + +// CHECK: vpcmpeqd %zmm10, %zmm2, %k5 +// CHECK: encoding: [0x62,0xd1,0x6d,0x48,0x76,0xea] + vpcmpeqd %zmm10, %zmm2, %k5 + +// CHECK: vpcmpeqd %zmm10, %zmm2, %k5 {%k7} +// CHECK: encoding: [0x62,0xd1,0x6d,0x4f,0x76,0xea] + vpcmpeqd %zmm10, %zmm2, %k5 {%k7} + +// CHECK: vpcmpeqd (%rcx), %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x48,0x76,0x29] + vpcmpeqd (%rcx), %zmm2, %k5 + +// CHECK: vpcmpeqd 291(%rax,%r14,8), %zmm2, %k5 +// CHECK: encoding: [0x62,0xb1,0x6d,0x48,0x76,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqd 291(%rax,%r14,8), %zmm2, %k5 + +// CHECK: vpcmpeqd (%rcx){1to16}, %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x58,0x76,0x29] + vpcmpeqd (%rcx){1to16}, %zmm2, %k5 + +// CHECK: vpcmpeqd 8128(%rdx), %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x48,0x76,0x6a,0x7f] + vpcmpeqd 8128(%rdx), %zmm2, %k5 + +// CHECK: vpcmpeqd 8192(%rdx), %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x48,0x76,0xaa,0x00,0x20,0x00,0x00] + vpcmpeqd 8192(%rdx), %zmm2, %k5 + +// CHECK: vpcmpeqd -8192(%rdx), %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x48,0x76,0x6a,0x80] + vpcmpeqd -8192(%rdx), %zmm2, %k5 + +// CHECK: vpcmpeqd -8256(%rdx), %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x48,0x76,0xaa,0xc0,0xdf,0xff,0xff] + vpcmpeqd -8256(%rdx), %zmm2, %k5 + +// CHECK: vpcmpeqd 508(%rdx){1to16}, %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x58,0x76,0x6a,0x7f] + vpcmpeqd 508(%rdx){1to16}, %zmm2, %k5 + +// CHECK: vpcmpeqd 512(%rdx){1to16}, %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x58,0x76,0xaa,0x00,0x02,0x00,0x00] + vpcmpeqd 512(%rdx){1to16}, %zmm2, %k5 + +// CHECK: vpcmpeqd -512(%rdx){1to16}, %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x58,0x76,0x6a,0x80] + vpcmpeqd -512(%rdx){1to16}, %zmm2, %k5 + +// CHECK: vpcmpeqd -516(%rdx){1to16}, %zmm2, %k5 +// CHECK: encoding: [0x62,0xf1,0x6d,0x58,0x76,0xaa,0xfc,0xfd,0xff,0xff] + vpcmpeqd -516(%rdx){1to16}, %zmm2, %k5 + +// CHECK: vpcmpeqq %zmm2, %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x40,0x29,0xda] + vpcmpeqq %zmm2, %zmm22, %k3 + +// CHECK: vpcmpeqq %zmm2, %zmm22, %k3 {%k6} +// CHECK: encoding: [0x62,0xf2,0xcd,0x46,0x29,0xda] + vpcmpeqq %zmm2, %zmm22, %k3 {%k6} + +// CHECK: vpcmpeqq (%rcx), %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x40,0x29,0x19] + vpcmpeqq (%rcx), %zmm22, %k3 + +// CHECK: vpcmpeqq 291(%rax,%r14,8), %zmm22, %k3 +// CHECK: encoding: [0x62,0xb2,0xcd,0x40,0x29,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqq 291(%rax,%r14,8), %zmm22, %k3 + +// CHECK: vpcmpeqq (%rcx){1to8}, %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x50,0x29,0x19] + vpcmpeqq (%rcx){1to8}, %zmm22, %k3 + +// CHECK: vpcmpeqq 8128(%rdx), %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x40,0x29,0x5a,0x7f] + vpcmpeqq 8128(%rdx), %zmm22, %k3 + +// CHECK: vpcmpeqq 8192(%rdx), %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x40,0x29,0x9a,0x00,0x20,0x00,0x00] + vpcmpeqq 8192(%rdx), %zmm22, %k3 + +// CHECK: vpcmpeqq -8192(%rdx), %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x40,0x29,0x5a,0x80] + vpcmpeqq -8192(%rdx), %zmm22, %k3 + +// CHECK: vpcmpeqq -8256(%rdx), %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x40,0x29,0x9a,0xc0,0xdf,0xff,0xff] + vpcmpeqq -8256(%rdx), %zmm22, %k3 + +// CHECK: vpcmpeqq 1016(%rdx){1to8}, %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x50,0x29,0x5a,0x7f] + vpcmpeqq 1016(%rdx){1to8}, %zmm22, %k3 + +// CHECK: vpcmpeqq 1024(%rdx){1to8}, %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x50,0x29,0x9a,0x00,0x04,0x00,0x00] + vpcmpeqq 1024(%rdx){1to8}, %zmm22, %k3 + +// CHECK: vpcmpeqq -1024(%rdx){1to8}, %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x50,0x29,0x5a,0x80] + vpcmpeqq -1024(%rdx){1to8}, %zmm22, %k3 + +// CHECK: vpcmpeqq -1032(%rdx){1to8}, %zmm22, %k3 +// CHECK: encoding: [0x62,0xf2,0xcd,0x50,0x29,0x9a,0xf8,0xfb,0xff,0xff] + vpcmpeqq -1032(%rdx){1to8}, %zmm22, %k3 + +// CHECK: vpcmpgtd %zmm8, %zmm21, %k5 +// CHECK: encoding: [0x62,0xd1,0x55,0x40,0x66,0xe8] + vpcmpgtd %zmm8, %zmm21, %k5 + +// CHECK: vpcmpgtd %zmm8, %zmm21, %k5 {%k5} +// CHECK: encoding: [0x62,0xd1,0x55,0x45,0x66,0xe8] + vpcmpgtd %zmm8, %zmm21, %k5 {%k5} + +// CHECK: vpcmpgtd (%rcx), %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x40,0x66,0x29] + vpcmpgtd (%rcx), %zmm21, %k5 + +// CHECK: vpcmpgtd 291(%rax,%r14,8), %zmm21, %k5 +// CHECK: encoding: [0x62,0xb1,0x55,0x40,0x66,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtd 291(%rax,%r14,8), %zmm21, %k5 + +// CHECK: vpcmpgtd (%rcx){1to16}, %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x50,0x66,0x29] + vpcmpgtd (%rcx){1to16}, %zmm21, %k5 + +// CHECK: vpcmpgtd 8128(%rdx), %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x40,0x66,0x6a,0x7f] + vpcmpgtd 8128(%rdx), %zmm21, %k5 + +// CHECK: vpcmpgtd 8192(%rdx), %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x40,0x66,0xaa,0x00,0x20,0x00,0x00] + vpcmpgtd 8192(%rdx), %zmm21, %k5 + +// CHECK: vpcmpgtd -8192(%rdx), %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x40,0x66,0x6a,0x80] + vpcmpgtd -8192(%rdx), %zmm21, %k5 + +// CHECK: vpcmpgtd -8256(%rdx), %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x40,0x66,0xaa,0xc0,0xdf,0xff,0xff] + vpcmpgtd -8256(%rdx), %zmm21, %k5 + +// CHECK: vpcmpgtd 508(%rdx){1to16}, %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x50,0x66,0x6a,0x7f] + vpcmpgtd 508(%rdx){1to16}, %zmm21, %k5 + +// CHECK: vpcmpgtd 512(%rdx){1to16}, %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x50,0x66,0xaa,0x00,0x02,0x00,0x00] + vpcmpgtd 512(%rdx){1to16}, %zmm21, %k5 + +// CHECK: vpcmpgtd -512(%rdx){1to16}, %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x50,0x66,0x6a,0x80] + vpcmpgtd -512(%rdx){1to16}, %zmm21, %k5 + +// CHECK: vpcmpgtd -516(%rdx){1to16}, %zmm21, %k5 +// CHECK: encoding: [0x62,0xf1,0x55,0x50,0x66,0xaa,0xfc,0xfd,0xff,0xff] + vpcmpgtd -516(%rdx){1to16}, %zmm21, %k5 + +// CHECK: vpcmpgtq %zmm17, %zmm20, %k2 +// CHECK: encoding: [0x62,0xb2,0xdd,0x40,0x37,0xd1] + vpcmpgtq %zmm17, %zmm20, %k2 + +// CHECK: vpcmpgtq %zmm17, %zmm20, %k2 {%k3} +// CHECK: encoding: [0x62,0xb2,0xdd,0x43,0x37,0xd1] + vpcmpgtq %zmm17, %zmm20, %k2 {%k3} + +// CHECK: vpcmpgtq (%rcx), %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x40,0x37,0x11] + vpcmpgtq (%rcx), %zmm20, %k2 + +// CHECK: vpcmpgtq 291(%rax,%r14,8), %zmm20, %k2 +// CHECK: encoding: [0x62,0xb2,0xdd,0x40,0x37,0x94,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtq 291(%rax,%r14,8), %zmm20, %k2 + +// CHECK: vpcmpgtq (%rcx){1to8}, %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x50,0x37,0x11] + vpcmpgtq (%rcx){1to8}, %zmm20, %k2 + +// CHECK: vpcmpgtq 8128(%rdx), %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x40,0x37,0x52,0x7f] + vpcmpgtq 8128(%rdx), %zmm20, %k2 + +// CHECK: vpcmpgtq 8192(%rdx), %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x40,0x37,0x92,0x00,0x20,0x00,0x00] + vpcmpgtq 8192(%rdx), %zmm20, %k2 + +// CHECK: vpcmpgtq -8192(%rdx), %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x40,0x37,0x52,0x80] + vpcmpgtq -8192(%rdx), %zmm20, %k2 + +// CHECK: vpcmpgtq -8256(%rdx), %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x40,0x37,0x92,0xc0,0xdf,0xff,0xff] + vpcmpgtq -8256(%rdx), %zmm20, %k2 + +// CHECK: vpcmpgtq 1016(%rdx){1to8}, %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x50,0x37,0x52,0x7f] + vpcmpgtq 1016(%rdx){1to8}, %zmm20, %k2 + +// CHECK: vpcmpgtq 1024(%rdx){1to8}, %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x50,0x37,0x92,0x00,0x04,0x00,0x00] + vpcmpgtq 1024(%rdx){1to8}, %zmm20, %k2 + +// CHECK: vpcmpgtq -1024(%rdx){1to8}, %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x50,0x37,0x52,0x80] + vpcmpgtq -1024(%rdx){1to8}, %zmm20, %k2 + +// CHECK: vpcmpgtq -1032(%rdx){1to8}, %zmm20, %k2 +// CHECK: encoding: [0x62,0xf2,0xdd,0x50,0x37,0x92,0xf8,0xfb,0xff,0xff] + vpcmpgtq -1032(%rdx){1to8}, %zmm20, %k2 + +// CHECK: vpcmpq $171, %zmm28, %zmm28, %k5 +// CHECK: encoding: [0x62,0x93,0x9d,0x40,0x1f,0xec,0xab] + vpcmpq $171, %zmm28, %zmm28, %k5 + +// CHECK: vpcmpq $171, %zmm28, %zmm28, %k5 {%k3} +// CHECK: encoding: [0x62,0x93,0x9d,0x43,0x1f,0xec,0xab] + vpcmpq $171, %zmm28, %zmm28, %k5 {%k3} + +// CHECK: vpcmpq $123, %zmm28, %zmm28, %k5 +// CHECK: encoding: [0x62,0x93,0x9d,0x40,0x1f,0xec,0x7b] + vpcmpq $123, %zmm28, %zmm28, %k5 + +// CHECK: vpcmpq $123, (%rcx), %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x40,0x1f,0x29,0x7b] + vpcmpq $123, (%rcx), %zmm28, %k5 + +// CHECK: vpcmpq $123, 291(%rax,%r14,8), %zmm28, %k5 +// CHECK: encoding: [0x62,0xb3,0x9d,0x40,0x1f,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpq $123, 291(%rax,%r14,8), %zmm28, %k5 + +// CHECK: vpcmpq $123, (%rcx){1to8}, %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x50,0x1f,0x29,0x7b] + vpcmpq $123, (%rcx){1to8}, %zmm28, %k5 + +// CHECK: vpcmpq $123, 8128(%rdx), %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x40,0x1f,0x6a,0x7f,0x7b] + vpcmpq $123, 8128(%rdx), %zmm28, %k5 + +// CHECK: vpcmpq $123, 8192(%rdx), %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x40,0x1f,0xaa,0x00,0x20,0x00,0x00,0x7b] + vpcmpq $123, 8192(%rdx), %zmm28, %k5 + +// CHECK: vpcmpq $123, -8192(%rdx), %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x40,0x1f,0x6a,0x80,0x7b] + vpcmpq $123, -8192(%rdx), %zmm28, %k5 + +// CHECK: vpcmpq $123, -8256(%rdx), %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x40,0x1f,0xaa,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpq $123, -8256(%rdx), %zmm28, %k5 + +// CHECK: vpcmpq $123, 1016(%rdx){1to8}, %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x50,0x1f,0x6a,0x7f,0x7b] + vpcmpq $123, 1016(%rdx){1to8}, %zmm28, %k5 + +// CHECK: vpcmpq $123, 1024(%rdx){1to8}, %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x50,0x1f,0xaa,0x00,0x04,0x00,0x00,0x7b] + vpcmpq $123, 1024(%rdx){1to8}, %zmm28, %k5 + +// CHECK: vpcmpq $123, -1024(%rdx){1to8}, %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x50,0x1f,0x6a,0x80,0x7b] + vpcmpq $123, -1024(%rdx){1to8}, %zmm28, %k5 + +// CHECK: vpcmpq $123, -1032(%rdx){1to8}, %zmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x50,0x1f,0xaa,0xf8,0xfb,0xff,0xff,0x7b] + vpcmpq $123, -1032(%rdx){1to8}, %zmm28, %k5 + +// CHECK: vpcmpud $171, %zmm7, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0xd7,0xab] + vpcmpud $171, %zmm7, %zmm25, %k2 + +// CHECK: vpcmpud $171, %zmm7, %zmm25, %k2 {%k1} +// CHECK: encoding: [0x62,0xf3,0x35,0x41,0x1e,0xd7,0xab] + vpcmpud $171, %zmm7, %zmm25, %k2 {%k1} + +// CHECK: vpcmpud $123, %zmm7, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0xd7,0x7b] + vpcmpud $123, %zmm7, %zmm25, %k2 + +// CHECK: vpcmpud $123, (%rcx), %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0x11,0x7b] + vpcmpud $123, (%rcx), %zmm25, %k2 + +// CHECK: vpcmpud $123, 291(%rax,%r14,8), %zmm25, %k2 +// CHECK: encoding: [0x62,0xb3,0x35,0x40,0x1e,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpud $123, 291(%rax,%r14,8), %zmm25, %k2 + +// CHECK: vpcmpud $123, (%rcx){1to16}, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1e,0x11,0x7b] + vpcmpud $123, (%rcx){1to16}, %zmm25, %k2 + +// CHECK: vpcmpud $123, 8128(%rdx), %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0x52,0x7f,0x7b] + vpcmpud $123, 8128(%rdx), %zmm25, %k2 + +// CHECK: vpcmpud $123, 8192(%rdx), %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0x92,0x00,0x20,0x00,0x00,0x7b] + vpcmpud $123, 8192(%rdx), %zmm25, %k2 + +// CHECK: vpcmpud $123, -8192(%rdx), %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0x52,0x80,0x7b] + vpcmpud $123, -8192(%rdx), %zmm25, %k2 + +// CHECK: vpcmpud $123, -8256(%rdx), %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x40,0x1e,0x92,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpud $123, -8256(%rdx), %zmm25, %k2 + +// CHECK: vpcmpud $123, 508(%rdx){1to16}, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1e,0x52,0x7f,0x7b] + vpcmpud $123, 508(%rdx){1to16}, %zmm25, %k2 + +// CHECK: vpcmpud $123, 512(%rdx){1to16}, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1e,0x92,0x00,0x02,0x00,0x00,0x7b] + vpcmpud $123, 512(%rdx){1to16}, %zmm25, %k2 + +// CHECK: vpcmpud $123, -512(%rdx){1to16}, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1e,0x52,0x80,0x7b] + vpcmpud $123, -512(%rdx){1to16}, %zmm25, %k2 + +// CHECK: vpcmpud $123, -516(%rdx){1to16}, %zmm25, %k2 +// CHECK: encoding: [0x62,0xf3,0x35,0x50,0x1e,0x92,0xfc,0xfd,0xff,0xff,0x7b] + vpcmpud $123, -516(%rdx){1to16}, %zmm25, %k2 + +// CHECK: vpcmpuq $171, %zmm8, %zmm14, %k3 +// CHECK: encoding: [0x62,0xd3,0x8d,0x48,0x1e,0xd8,0xab] + vpcmpuq $171, %zmm8, %zmm14, %k3 + +// CHECK: vpcmpuq $171, %zmm8, %zmm14, %k3 {%k2} +// CHECK: encoding: [0x62,0xd3,0x8d,0x4a,0x1e,0xd8,0xab] + vpcmpuq $171, %zmm8, %zmm14, %k3 {%k2} + +// CHECK: vpcmpuq $123, %zmm8, %zmm14, %k3 +// CHECK: encoding: [0x62,0xd3,0x8d,0x48,0x1e,0xd8,0x7b] + vpcmpuq $123, %zmm8, %zmm14, %k3 + +// CHECK: vpcmpuq $123, (%rcx), %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x48,0x1e,0x19,0x7b] + vpcmpuq $123, (%rcx), %zmm14, %k3 + +// CHECK: vpcmpuq $123, 291(%rax,%r14,8), %zmm14, %k3 +// CHECK: encoding: [0x62,0xb3,0x8d,0x48,0x1e,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpuq $123, 291(%rax,%r14,8), %zmm14, %k3 + +// CHECK: vpcmpuq $123, (%rcx){1to8}, %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x58,0x1e,0x19,0x7b] + vpcmpuq $123, (%rcx){1to8}, %zmm14, %k3 + +// CHECK: vpcmpuq $123, 8128(%rdx), %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x48,0x1e,0x5a,0x7f,0x7b] + vpcmpuq $123, 8128(%rdx), %zmm14, %k3 + +// CHECK: vpcmpuq $123, 8192(%rdx), %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x48,0x1e,0x9a,0x00,0x20,0x00,0x00,0x7b] + vpcmpuq $123, 8192(%rdx), %zmm14, %k3 + +// CHECK: vpcmpuq $123, -8192(%rdx), %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x48,0x1e,0x5a,0x80,0x7b] + vpcmpuq $123, -8192(%rdx), %zmm14, %k3 + +// CHECK: vpcmpuq $123, -8256(%rdx), %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x48,0x1e,0x9a,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpuq $123, -8256(%rdx), %zmm14, %k3 + +// CHECK: vpcmpuq $123, 1016(%rdx){1to8}, %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x58,0x1e,0x5a,0x7f,0x7b] + vpcmpuq $123, 1016(%rdx){1to8}, %zmm14, %k3 + +// CHECK: vpcmpuq $123, 1024(%rdx){1to8}, %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x58,0x1e,0x9a,0x00,0x04,0x00,0x00,0x7b] + vpcmpuq $123, 1024(%rdx){1to8}, %zmm14, %k3 + +// CHECK: vpcmpuq $123, -1024(%rdx){1to8}, %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x58,0x1e,0x5a,0x80,0x7b] + vpcmpuq $123, -1024(%rdx){1to8}, %zmm14, %k3 + +// CHECK: vpcmpuq $123, -1032(%rdx){1to8}, %zmm14, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x58,0x1e,0x9a,0xf8,0xfb,0xff,0xff,0x7b] + vpcmpuq $123, -1032(%rdx){1to8}, %zmm14, %k3 + // CHECK: vpmaxsd %zmm16, %zmm8, %zmm6 // CHECK: encoding: [0x62,0xb2,0x3d,0x48,0x3d,0xf0] vpmaxsd %zmm16, %zmm8, %zmm6 @@ -2377,6 +3281,342 @@ // CHECK: encoding: [0x62,0xf1,0xcd,0x50,0xef,0xba,0xf8,0xfb,0xff,0xff] vpxorq -1032(%rdx){1to8}, %zmm22, %zmm7 +// CHECK: vrcp14pd %zmm4, %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x4c,0xec] + vrcp14pd %zmm4, %zmm13 + +// CHECK: vrcp14pd %zmm4, %zmm13 {%k5} +// CHECK: encoding: [0x62,0x72,0xfd,0x4d,0x4c,0xec] + vrcp14pd %zmm4, %zmm13 {%k5} + +// CHECK: vrcp14pd %zmm4, %zmm13 {%k5} {z} +// CHECK: encoding: [0x62,0x72,0xfd,0xcd,0x4c,0xec] + vrcp14pd %zmm4, %zmm13 {%k5} {z} + +// CHECK: vrcp14pd (%rcx), %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x4c,0x29] + vrcp14pd (%rcx), %zmm13 + +// CHECK: vrcp14pd 291(%rax,%r14,8), %zmm13 +// CHECK: encoding: [0x62,0x32,0xfd,0x48,0x4c,0xac,0xf0,0x23,0x01,0x00,0x00] + vrcp14pd 291(%rax,%r14,8), %zmm13 + +// CHECK: vrcp14pd (%rcx){1to8}, %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x4c,0x29] + vrcp14pd (%rcx){1to8}, %zmm13 + +// CHECK: vrcp14pd 8128(%rdx), %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x4c,0x6a,0x7f] + vrcp14pd 8128(%rdx), %zmm13 + +// CHECK: vrcp14pd 8192(%rdx), %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x4c,0xaa,0x00,0x20,0x00,0x00] + vrcp14pd 8192(%rdx), %zmm13 + +// CHECK: vrcp14pd -8192(%rdx), %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x4c,0x6a,0x80] + vrcp14pd -8192(%rdx), %zmm13 + +// CHECK: vrcp14pd -8256(%rdx), %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x4c,0xaa,0xc0,0xdf,0xff,0xff] + vrcp14pd -8256(%rdx), %zmm13 + +// CHECK: vrcp14pd 1016(%rdx){1to8}, %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x4c,0x6a,0x7f] + vrcp14pd 1016(%rdx){1to8}, %zmm13 + +// CHECK: vrcp14pd 1024(%rdx){1to8}, %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x4c,0xaa,0x00,0x04,0x00,0x00] + vrcp14pd 1024(%rdx){1to8}, %zmm13 + +// CHECK: vrcp14pd -1024(%rdx){1to8}, %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x4c,0x6a,0x80] + vrcp14pd -1024(%rdx){1to8}, %zmm13 + +// CHECK: vrcp14pd -1032(%rdx){1to8}, %zmm13 +// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x4c,0xaa,0xf8,0xfb,0xff,0xff] + vrcp14pd -1032(%rdx){1to8}, %zmm13 + +// CHECK: vrcp14ps %zmm25, %zmm10 +// CHECK: encoding: [0x62,0x12,0x7d,0x48,0x4c,0xd1] + vrcp14ps %zmm25, %zmm10 + +// CHECK: vrcp14ps %zmm25, %zmm10 {%k1} +// CHECK: encoding: [0x62,0x12,0x7d,0x49,0x4c,0xd1] + vrcp14ps %zmm25, %zmm10 {%k1} + +// CHECK: vrcp14ps %zmm25, %zmm10 {%k1} {z} +// CHECK: encoding: [0x62,0x12,0x7d,0xc9,0x4c,0xd1] + vrcp14ps %zmm25, %zmm10 {%k1} {z} + +// CHECK: vrcp14ps (%rcx), %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x48,0x4c,0x11] + vrcp14ps (%rcx), %zmm10 + +// CHECK: vrcp14ps 291(%rax,%r14,8), %zmm10 +// CHECK: encoding: [0x62,0x32,0x7d,0x48,0x4c,0x94,0xf0,0x23,0x01,0x00,0x00] + vrcp14ps 291(%rax,%r14,8), %zmm10 + +// CHECK: vrcp14ps (%rcx){1to16}, %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x58,0x4c,0x11] + vrcp14ps (%rcx){1to16}, %zmm10 + +// CHECK: vrcp14ps 8128(%rdx), %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x48,0x4c,0x52,0x7f] + vrcp14ps 8128(%rdx), %zmm10 + +// CHECK: vrcp14ps 8192(%rdx), %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x48,0x4c,0x92,0x00,0x20,0x00,0x00] + vrcp14ps 8192(%rdx), %zmm10 + +// CHECK: vrcp14ps -8192(%rdx), %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x48,0x4c,0x52,0x80] + vrcp14ps -8192(%rdx), %zmm10 + +// CHECK: vrcp14ps -8256(%rdx), %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x48,0x4c,0x92,0xc0,0xdf,0xff,0xff] + vrcp14ps -8256(%rdx), %zmm10 + +// CHECK: vrcp14ps 508(%rdx){1to16}, %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x58,0x4c,0x52,0x7f] + vrcp14ps 508(%rdx){1to16}, %zmm10 + +// CHECK: vrcp14ps 512(%rdx){1to16}, %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x58,0x4c,0x92,0x00,0x02,0x00,0x00] + vrcp14ps 512(%rdx){1to16}, %zmm10 + +// CHECK: vrcp14ps -512(%rdx){1to16}, %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x58,0x4c,0x52,0x80] + vrcp14ps -512(%rdx){1to16}, %zmm10 + +// CHECK: vrcp14ps -516(%rdx){1to16}, %zmm10 +// CHECK: encoding: [0x62,0x72,0x7d,0x58,0x4c,0x92,0xfc,0xfd,0xff,0xff] + vrcp14ps -516(%rdx){1to16}, %zmm10 + +// CHECK: vrsqrt14pd %zmm14, %zmm19 +// CHECK: encoding: [0x62,0xc2,0xfd,0x48,0x4e,0xde] + vrsqrt14pd %zmm14, %zmm19 + +// CHECK: vrsqrt14pd %zmm14, %zmm19 {%k1} +// CHECK: encoding: [0x62,0xc2,0xfd,0x49,0x4e,0xde] + vrsqrt14pd %zmm14, %zmm19 {%k1} + +// CHECK: vrsqrt14pd %zmm14, %zmm19 {%k1} {z} +// CHECK: encoding: [0x62,0xc2,0xfd,0xc9,0x4e,0xde] + vrsqrt14pd %zmm14, %zmm19 {%k1} {z} + +// CHECK: vrsqrt14pd (%rcx), %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x48,0x4e,0x19] + vrsqrt14pd (%rcx), %zmm19 + +// CHECK: vrsqrt14pd 291(%rax,%r14,8), %zmm19 +// CHECK: encoding: [0x62,0xa2,0xfd,0x48,0x4e,0x9c,0xf0,0x23,0x01,0x00,0x00] + vrsqrt14pd 291(%rax,%r14,8), %zmm19 + +// CHECK: vrsqrt14pd (%rcx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x58,0x4e,0x19] + vrsqrt14pd (%rcx){1to8}, %zmm19 + +// CHECK: vrsqrt14pd 8128(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x48,0x4e,0x5a,0x7f] + vrsqrt14pd 8128(%rdx), %zmm19 + +// CHECK: vrsqrt14pd 8192(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x48,0x4e,0x9a,0x00,0x20,0x00,0x00] + vrsqrt14pd 8192(%rdx), %zmm19 + +// CHECK: vrsqrt14pd -8192(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x48,0x4e,0x5a,0x80] + vrsqrt14pd -8192(%rdx), %zmm19 + +// CHECK: vrsqrt14pd -8256(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x48,0x4e,0x9a,0xc0,0xdf,0xff,0xff] + vrsqrt14pd -8256(%rdx), %zmm19 + +// CHECK: vrsqrt14pd 1016(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x58,0x4e,0x5a,0x7f] + vrsqrt14pd 1016(%rdx){1to8}, %zmm19 + +// CHECK: vrsqrt14pd 1024(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x58,0x4e,0x9a,0x00,0x04,0x00,0x00] + vrsqrt14pd 1024(%rdx){1to8}, %zmm19 + +// CHECK: vrsqrt14pd -1024(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x58,0x4e,0x5a,0x80] + vrsqrt14pd -1024(%rdx){1to8}, %zmm19 + +// CHECK: vrsqrt14pd -1032(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe2,0xfd,0x58,0x4e,0x9a,0xf8,0xfb,0xff,0xff] + vrsqrt14pd -1032(%rdx){1to8}, %zmm19 + +// CHECK: vrsqrt14ps %zmm9, %zmm16 +// CHECK: encoding: [0x62,0xc2,0x7d,0x48,0x4e,0xc1] + vrsqrt14ps %zmm9, %zmm16 + +// CHECK: vrsqrt14ps %zmm9, %zmm16 {%k5} +// CHECK: encoding: [0x62,0xc2,0x7d,0x4d,0x4e,0xc1] + vrsqrt14ps %zmm9, %zmm16 {%k5} + +// CHECK: vrsqrt14ps %zmm9, %zmm16 {%k5} {z} +// CHECK: encoding: [0x62,0xc2,0x7d,0xcd,0x4e,0xc1] + vrsqrt14ps %zmm9, %zmm16 {%k5} {z} + +// CHECK: vrsqrt14ps (%rcx), %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x4e,0x01] + vrsqrt14ps (%rcx), %zmm16 + +// CHECK: vrsqrt14ps 291(%rax,%r14,8), %zmm16 +// CHECK: encoding: [0x62,0xa2,0x7d,0x48,0x4e,0x84,0xf0,0x23,0x01,0x00,0x00] + vrsqrt14ps 291(%rax,%r14,8), %zmm16 + +// CHECK: vrsqrt14ps (%rcx){1to16}, %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x58,0x4e,0x01] + vrsqrt14ps (%rcx){1to16}, %zmm16 + +// CHECK: vrsqrt14ps 8128(%rdx), %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x4e,0x42,0x7f] + vrsqrt14ps 8128(%rdx), %zmm16 + +// CHECK: vrsqrt14ps 8192(%rdx), %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x4e,0x82,0x00,0x20,0x00,0x00] + vrsqrt14ps 8192(%rdx), %zmm16 + +// CHECK: vrsqrt14ps -8192(%rdx), %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x4e,0x42,0x80] + vrsqrt14ps -8192(%rdx), %zmm16 + +// CHECK: vrsqrt14ps -8256(%rdx), %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x4e,0x82,0xc0,0xdf,0xff,0xff] + vrsqrt14ps -8256(%rdx), %zmm16 + +// CHECK: vrsqrt14ps 508(%rdx){1to16}, %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x58,0x4e,0x42,0x7f] + vrsqrt14ps 508(%rdx){1to16}, %zmm16 + +// CHECK: vrsqrt14ps 512(%rdx){1to16}, %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x58,0x4e,0x82,0x00,0x02,0x00,0x00] + vrsqrt14ps 512(%rdx){1to16}, %zmm16 + +// CHECK: vrsqrt14ps -512(%rdx){1to16}, %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x58,0x4e,0x42,0x80] + vrsqrt14ps -512(%rdx){1to16}, %zmm16 + +// CHECK: vrsqrt14ps -516(%rdx){1to16}, %zmm16 +// CHECK: encoding: [0x62,0xe2,0x7d,0x58,0x4e,0x82,0xfc,0xfd,0xff,0xff] + vrsqrt14ps -516(%rdx){1to16}, %zmm16 + +// CHECK: vsqrtpd %zmm19, %zmm19 +// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x51,0xdb] + vsqrtpd %zmm19, %zmm19 + +// CHECK: vsqrtpd %zmm19, %zmm19 {%k5} +// CHECK: encoding: [0x62,0xa1,0xfd,0x4d,0x51,0xdb] + vsqrtpd %zmm19, %zmm19 {%k5} + +// CHECK: vsqrtpd %zmm19, %zmm19 {%k5} {z} +// CHECK: encoding: [0x62,0xa1,0xfd,0xcd,0x51,0xdb] + vsqrtpd %zmm19, %zmm19 {%k5} {z} + +// CHECK: vsqrtpd (%rcx), %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x19] + vsqrtpd (%rcx), %zmm19 + +// CHECK: vsqrtpd 291(%rax,%r14,8), %zmm19 +// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x51,0x9c,0xf0,0x23,0x01,0x00,0x00] + vsqrtpd 291(%rax,%r14,8), %zmm19 + +// CHECK: vsqrtpd (%rcx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x19] + vsqrtpd (%rcx){1to8}, %zmm19 + +// CHECK: vsqrtpd 8128(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x5a,0x7f] + vsqrtpd 8128(%rdx), %zmm19 + +// CHECK: vsqrtpd 8192(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x9a,0x00,0x20,0x00,0x00] + vsqrtpd 8192(%rdx), %zmm19 + +// CHECK: vsqrtpd -8192(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x5a,0x80] + vsqrtpd -8192(%rdx), %zmm19 + +// CHECK: vsqrtpd -8256(%rdx), %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x51,0x9a,0xc0,0xdf,0xff,0xff] + vsqrtpd -8256(%rdx), %zmm19 + +// CHECK: vsqrtpd 1016(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x5a,0x7f] + vsqrtpd 1016(%rdx){1to8}, %zmm19 + +// CHECK: vsqrtpd 1024(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x9a,0x00,0x04,0x00,0x00] + vsqrtpd 1024(%rdx){1to8}, %zmm19 + +// CHECK: vsqrtpd -1024(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x5a,0x80] + vsqrtpd -1024(%rdx){1to8}, %zmm19 + +// CHECK: vsqrtpd -1032(%rdx){1to8}, %zmm19 +// CHECK: encoding: [0x62,0xe1,0xfd,0x58,0x51,0x9a,0xf8,0xfb,0xff,0xff] + vsqrtpd -1032(%rdx){1to8}, %zmm19 + +// CHECK: vsqrtps %zmm29, %zmm28 +// CHECK: encoding: [0x62,0x01,0x7c,0x48,0x51,0xe5] + vsqrtps %zmm29, %zmm28 + +// CHECK: vsqrtps %zmm29, %zmm28 {%k3} +// CHECK: encoding: [0x62,0x01,0x7c,0x4b,0x51,0xe5] + vsqrtps %zmm29, %zmm28 {%k3} + +// CHECK: vsqrtps %zmm29, %zmm28 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x7c,0xcb,0x51,0xe5] + vsqrtps %zmm29, %zmm28 {%k3} {z} + +// CHECK: vsqrtps (%rcx), %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0x21] + vsqrtps (%rcx), %zmm28 + +// CHECK: vsqrtps 291(%rax,%r14,8), %zmm28 +// CHECK: encoding: [0x62,0x21,0x7c,0x48,0x51,0xa4,0xf0,0x23,0x01,0x00,0x00] + vsqrtps 291(%rax,%r14,8), %zmm28 + +// CHECK: vsqrtps (%rcx){1to16}, %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0x21] + vsqrtps (%rcx){1to16}, %zmm28 + +// CHECK: vsqrtps 8128(%rdx), %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0x62,0x7f] + vsqrtps 8128(%rdx), %zmm28 + +// CHECK: vsqrtps 8192(%rdx), %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0xa2,0x00,0x20,0x00,0x00] + vsqrtps 8192(%rdx), %zmm28 + +// CHECK: vsqrtps -8192(%rdx), %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0x62,0x80] + vsqrtps -8192(%rdx), %zmm28 + +// CHECK: vsqrtps -8256(%rdx), %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x51,0xa2,0xc0,0xdf,0xff,0xff] + vsqrtps -8256(%rdx), %zmm28 + +// CHECK: vsqrtps 508(%rdx){1to16}, %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0x62,0x7f] + vsqrtps 508(%rdx){1to16}, %zmm28 + +// CHECK: vsqrtps 512(%rdx){1to16}, %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0xa2,0x00,0x02,0x00,0x00] + vsqrtps 512(%rdx){1to16}, %zmm28 + +// CHECK: vsqrtps -512(%rdx){1to16}, %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0x62,0x80] + vsqrtps -512(%rdx){1to16}, %zmm28 + +// CHECK: vsqrtps -516(%rdx){1to16}, %zmm28 +// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0xa2,0xfc,0xfd,0xff,0xff] + vsqrtps -516(%rdx){1to16}, %zmm28 + // CHECK: vsubpd %zmm9, %zmm12, %zmm9 // CHECK: encoding: [0x62,0x51,0x9d,0x48,0x5c,0xc9] vsubpd %zmm9, %zmm12, %zmm9 @@ -2489,6 +3729,298 @@ // CHECK: encoding: [0x62,0x71,0x24,0x50,0x5c,0xb2,0xfc,0xfd,0xff,0xff] vsubps -516(%rdx){1to16}, %zmm27, %zmm14 +// CHECK: kandw %k6, %k5, %k2 +// CHECK: encoding: [0xc5,0xd4,0x41,0xd6] + kandw %k6, %k5, %k2 + +// CHECK: kandnw %k7, %k6, %k4 +// CHECK: encoding: [0xc5,0xcc,0x42,0xe7] + kandnw %k7, %k6, %k4 + +// CHECK: korw %k7, %k6, %k4 +// CHECK: encoding: [0xc5,0xcc,0x45,0xe7] + korw %k7, %k6, %k4 + +// CHECK: kxnorw %k5, %k5, %k3 +// CHECK: encoding: [0xc5,0xd4,0x46,0xdd] + kxnorw %k5, %k5, %k3 + +// CHECK: kxorw %k7, %k6, %k2 +// CHECK: encoding: [0xc5,0xcc,0x47,0xd7] + kxorw %k7, %k6, %k2 + +// CHECK: knotw %k6, %k3 +// CHECK: encoding: [0xc5,0xf8,0x44,0xde] + knotw %k6, %k3 + +// CHECK: kmovw %k5, %k4 +// CHECK: encoding: [0xc5,0xf8,0x90,0xe5] + kmovw %k5, %k4 + +// CHECK: kmovw (%rcx), %k4 +// CHECK: encoding: [0xc5,0xf8,0x90,0x21] + kmovw (%rcx), %k4 + +// CHECK: kmovw 291(%rax,%r14,8), %k4 +// CHECK: encoding: [0xc4,0xa1,0x78,0x90,0xa4,0xf0,0x23,0x01,0x00,0x00] + kmovw 291(%rax,%r14,8), %k4 + +// CHECK: kmovw %k4, (%rcx) +// CHECK: encoding: [0xc5,0xf8,0x91,0x21] + kmovw %k4, (%rcx) + +// CHECK: kmovw %k4, 291(%rax,%r14,8) +// CHECK: encoding: [0xc4,0xa1,0x78,0x91,0xa4,0xf0,0x23,0x01,0x00,0x00] + kmovw %k4, 291(%rax,%r14,8) + +// CHECK: kmovw %eax, %k3 +// CHECK: encoding: [0xc5,0xf8,0x92,0xd8] + kmovw %eax, %k3 + +// CHECK: kmovw %ebp, %k3 +// CHECK: encoding: [0xc5,0xf8,0x92,0xdd] + kmovw %ebp, %k3 + +// CHECK: kmovw %r13d, %k3 +// CHECK: encoding: [0xc4,0xc1,0x78,0x92,0xdd] + kmovw %r13d, %k3 + +// CHECK: kmovw %k2, %eax +// CHECK: encoding: [0xc5,0xf8,0x93,0xc2] + kmovw %k2, %eax + +// CHECK: kmovw %k2, %ebp +// CHECK: encoding: [0xc5,0xf8,0x93,0xea] + kmovw %k2, %ebp + +// CHECK: kmovw %k2, %r13d +// CHECK: encoding: [0xc5,0x78,0x93,0xea] + kmovw %k2, %r13d + +// CHECK: vmovapd %zmm18, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x29,0x11] + vmovapd %zmm18, (%rcx) + +// CHECK: vmovapd %zmm18, (%rcx) {%k6} +// CHECK: encoding: [0x62,0xe1,0xfd,0x4e,0x29,0x11] + vmovapd %zmm18, (%rcx) {%k6} + +// CHECK: vmovapd %zmm18, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x29,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovapd %zmm18, 291(%rax,%r14,8) + +// CHECK: vmovapd %zmm18, 8128(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x29,0x52,0x7f] + vmovapd %zmm18, 8128(%rdx) + +// CHECK: vmovapd %zmm18, 8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x29,0x92,0x00,0x20,0x00,0x00] + vmovapd %zmm18, 8192(%rdx) + +// CHECK: vmovapd %zmm18, -8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x29,0x52,0x80] + vmovapd %zmm18, -8192(%rdx) + +// CHECK: vmovapd %zmm18, -8256(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x29,0x92,0xc0,0xdf,0xff,0xff] + vmovapd %zmm18, -8256(%rdx) + +// CHECK: vmovaps %zmm9, (%rcx) +// CHECK: encoding: [0x62,0x71,0x7c,0x48,0x29,0x09] + vmovaps %zmm9, (%rcx) + +// CHECK: vmovaps %zmm9, (%rcx) {%k3} +// CHECK: encoding: [0x62,0x71,0x7c,0x4b,0x29,0x09] + vmovaps %zmm9, (%rcx) {%k3} + +// CHECK: vmovaps %zmm9, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x31,0x7c,0x48,0x29,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovaps %zmm9, 291(%rax,%r14,8) + +// CHECK: vmovaps %zmm9, 8128(%rdx) +// CHECK: encoding: [0x62,0x71,0x7c,0x48,0x29,0x4a,0x7f] + vmovaps %zmm9, 8128(%rdx) + +// CHECK: vmovaps %zmm9, 8192(%rdx) +// CHECK: encoding: [0x62,0x71,0x7c,0x48,0x29,0x8a,0x00,0x20,0x00,0x00] + vmovaps %zmm9, 8192(%rdx) + +// CHECK: vmovaps %zmm9, -8192(%rdx) +// CHECK: encoding: [0x62,0x71,0x7c,0x48,0x29,0x4a,0x80] + vmovaps %zmm9, -8192(%rdx) + +// CHECK: vmovaps %zmm9, -8256(%rdx) +// CHECK: encoding: [0x62,0x71,0x7c,0x48,0x29,0x8a,0xc0,0xdf,0xff,0xff] + vmovaps %zmm9, -8256(%rdx) + +// CHECK: vmovdqa32 %zmm18, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x7f,0x11] + vmovdqa32 %zmm18, (%rcx) + +// CHECK: vmovdqa32 %zmm18, (%rcx) {%k4} +// CHECK: encoding: [0x62,0xe1,0x7d,0x4c,0x7f,0x11] + vmovdqa32 %zmm18, (%rcx) {%k4} + +// CHECK: vmovdqa32 %zmm18, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7d,0x48,0x7f,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovdqa32 %zmm18, 291(%rax,%r14,8) + +// CHECK: vmovdqa32 %zmm18, 8128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x7f,0x52,0x7f] + vmovdqa32 %zmm18, 8128(%rdx) + +// CHECK: vmovdqa32 %zmm18, 8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x7f,0x92,0x00,0x20,0x00,0x00] + vmovdqa32 %zmm18, 8192(%rdx) + +// CHECK: vmovdqa32 %zmm18, -8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x7f,0x52,0x80] + vmovdqa32 %zmm18, -8192(%rdx) + +// CHECK: vmovdqa32 %zmm18, -8256(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x48,0x7f,0x92,0xc0,0xdf,0xff,0xff] + vmovdqa32 %zmm18, -8256(%rdx) + +// CHECK: vmovdqa64 %zmm19, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x7f,0x19] + vmovdqa64 %zmm19, (%rcx) + +// CHECK: vmovdqa64 %zmm19, (%rcx) {%k5} +// CHECK: encoding: [0x62,0xe1,0xfd,0x4d,0x7f,0x19] + vmovdqa64 %zmm19, (%rcx) {%k5} + +// CHECK: vmovdqa64 %zmm19, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x7f,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmovdqa64 %zmm19, 291(%rax,%r14,8) + +// CHECK: vmovdqa64 %zmm19, 8128(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x7f,0x5a,0x7f] + vmovdqa64 %zmm19, 8128(%rdx) + +// CHECK: vmovdqa64 %zmm19, 8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x7f,0x9a,0x00,0x20,0x00,0x00] + vmovdqa64 %zmm19, 8192(%rdx) + +// CHECK: vmovdqa64 %zmm19, -8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x7f,0x5a,0x80] + vmovdqa64 %zmm19, -8192(%rdx) + +// CHECK: vmovdqa64 %zmm19, -8256(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x7f,0x9a,0xc0,0xdf,0xff,0xff] + vmovdqa64 %zmm19, -8256(%rdx) + +// CHECK: vmovdqu32 %zmm22, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x48,0x7f,0x31] + vmovdqu32 %zmm22, (%rcx) + +// CHECK: vmovdqu32 %zmm22, (%rcx) {%k1} +// CHECK: encoding: [0x62,0xe1,0x7e,0x49,0x7f,0x31] + vmovdqu32 %zmm22, (%rcx) {%k1} + +// CHECK: vmovdqu32 %zmm22, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7e,0x48,0x7f,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovdqu32 %zmm22, 291(%rax,%r14,8) + +// CHECK: vmovdqu32 %zmm22, 8128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x48,0x7f,0x72,0x7f] + vmovdqu32 %zmm22, 8128(%rdx) + +// CHECK: vmovdqu32 %zmm22, 8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x48,0x7f,0xb2,0x00,0x20,0x00,0x00] + vmovdqu32 %zmm22, 8192(%rdx) + +// CHECK: vmovdqu32 %zmm22, -8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x48,0x7f,0x72,0x80] + vmovdqu32 %zmm22, -8192(%rdx) + +// CHECK: vmovdqu32 %zmm22, -8256(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x48,0x7f,0xb2,0xc0,0xdf,0xff,0xff] + vmovdqu32 %zmm22, -8256(%rdx) + +// CHECK: vmovdqu64 %zmm24, (%rcx) +// CHECK: encoding: [0x62,0x61,0xfe,0x48,0x7f,0x01] + vmovdqu64 %zmm24, (%rcx) + +// CHECK: vmovdqu64 %zmm24, (%rcx) {%k5} +// CHECK: encoding: [0x62,0x61,0xfe,0x4d,0x7f,0x01] + vmovdqu64 %zmm24, (%rcx) {%k5} + +// CHECK: vmovdqu64 %zmm24, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0xfe,0x48,0x7f,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovdqu64 %zmm24, 291(%rax,%r14,8) + +// CHECK: vmovdqu64 %zmm24, 8128(%rdx) +// CHECK: encoding: [0x62,0x61,0xfe,0x48,0x7f,0x42,0x7f] + vmovdqu64 %zmm24, 8128(%rdx) + +// CHECK: vmovdqu64 %zmm24, 8192(%rdx) +// CHECK: encoding: [0x62,0x61,0xfe,0x48,0x7f,0x82,0x00,0x20,0x00,0x00] + vmovdqu64 %zmm24, 8192(%rdx) + +// CHECK: vmovdqu64 %zmm24, -8192(%rdx) +// CHECK: encoding: [0x62,0x61,0xfe,0x48,0x7f,0x42,0x80] + vmovdqu64 %zmm24, -8192(%rdx) + +// CHECK: vmovdqu64 %zmm24, -8256(%rdx) +// CHECK: encoding: [0x62,0x61,0xfe,0x48,0x7f,0x82,0xc0,0xdf,0xff,0xff] + vmovdqu64 %zmm24, -8256(%rdx) + +// CHECK: vmovupd %zmm10, (%rcx) +// CHECK: encoding: [0x62,0x71,0xfd,0x48,0x11,0x11] + vmovupd %zmm10, (%rcx) + +// CHECK: vmovupd %zmm10, (%rcx) {%k7} +// CHECK: encoding: [0x62,0x71,0xfd,0x4f,0x11,0x11] + vmovupd %zmm10, (%rcx) {%k7} + +// CHECK: vmovupd %zmm10, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x31,0xfd,0x48,0x11,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovupd %zmm10, 291(%rax,%r14,8) + +// CHECK: vmovupd %zmm10, 8128(%rdx) +// CHECK: encoding: [0x62,0x71,0xfd,0x48,0x11,0x52,0x7f] + vmovupd %zmm10, 8128(%rdx) + +// CHECK: vmovupd %zmm10, 8192(%rdx) +// CHECK: encoding: [0x62,0x71,0xfd,0x48,0x11,0x92,0x00,0x20,0x00,0x00] + vmovupd %zmm10, 8192(%rdx) + +// CHECK: vmovupd %zmm10, -8192(%rdx) +// CHECK: encoding: [0x62,0x71,0xfd,0x48,0x11,0x52,0x80] + vmovupd %zmm10, -8192(%rdx) + +// CHECK: vmovupd %zmm10, -8256(%rdx) +// CHECK: encoding: [0x62,0x71,0xfd,0x48,0x11,0x92,0xc0,0xdf,0xff,0xff] + vmovupd %zmm10, -8256(%rdx) + +// CHECK: vmovups %zmm24, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0x01] + vmovups %zmm24, (%rcx) + +// CHECK: vmovups %zmm24, (%rcx) {%k7} +// CHECK: encoding: [0x62,0x61,0x7c,0x4f,0x11,0x01] + vmovups %zmm24, (%rcx) {%k7} + +// CHECK: vmovups %zmm24, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7c,0x48,0x11,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovups %zmm24, 291(%rax,%r14,8) + +// CHECK: vmovups %zmm24, 8128(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0x42,0x7f] + vmovups %zmm24, 8128(%rdx) + +// CHECK: vmovups %zmm24, 8192(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0x82,0x00,0x20,0x00,0x00] + vmovups %zmm24, 8192(%rdx) + +// CHECK: vmovups %zmm24, -8192(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0x42,0x80] + vmovups %zmm24, -8192(%rdx) + +// CHECK: vmovups %zmm24, -8256(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0x82,0xc0,0xdf,0xff,0xff] + vmovups %zmm24, -8256(%rdx) + // CHECK: vpmovqb %zmm2, %xmm3 // CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x32,0xd3] vpmovqb %zmm2, %xmm3 @@ -3097,6 +4629,14 @@ vinserti32x4 $1, %xmm21, %zmm5, %zmm17 // CHECK: encoding: [0x62,0xe3,0x1d,0x40,0x38,0x4f,0x10,0x01] vinserti32x4 $1, 256(%rdi), %zmm28, %zmm17 +// CHECK: vinserti32x8 +// CHECK: encoding: [0x62,0xd3,0x4d,0x40,0x3a,0xdb,0x01] +vinserti32x8 $1, %ymm11, %zmm22, %zmm3 + +// CHECK: vinsertf64x2 +// CHECK: encoding: [0x62,0xf3,0xed,0x48,0x18,0x4f,0x10,0x01] +vinsertf64x2 $1, 256(%rdi), %zmm2, %zmm1 + // CHECK: vextracti32x4 // CHECK: encoding: [0x62,0x33,0x7d,0x48,0x39,0xc9,0x01] vextracti32x4 $1, %zmm9, %xmm17 @@ -3219,3 +4759,59 @@ vpermi2q 0x80(%rax,%rbx,2), %zmm2, %zmm26 {%k3} // CHECK: vpermt2d // CHECK: encoding: [0x62,0x32,0x4d,0xc2,0x7e,0x24,0xad,0x05,0x00,0x00,0x00] vpermt2d 5(,%r13,4), %zmm22, %zmm12 {%k2} {z} + +// CHECK: valignq $2 +// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x03,0x4c,0x24,0x04,0x02] +valignq $2, 0x100(%rsp), %zmm0, %zmm1 + +// CHECK: valignq $3 +// CHECK: encoding: [0x62,0xf3,0xfd,0x49,0x03,0xcb,0x03] +valignq $3, %zmm3, %zmm0, %zmm1 {%k1} + +// CHECK: vextractf32x4 $3 +// CHECK: encoding: [0x62,0xf3,0x7d,0x49,0x19,0xd9,0x03] +vextractf32x4 $3, %zmm3, %xmm1 {%k1} + +// CHECK: vextracti64x4 $1 +// CHECK: encoding: [0x62,0x53,0xfd,0xcb,0x3b,0xf4,0x01] +vextracti64x4 $1, %zmm14, %ymm12 {%k3} {z} + +// CHECK: vfmadd231ps +// CHECK: encoding: [0x62,0xb2,0x1d,0x48,0xb8,0xe7] +vfmadd231ps %zmm23, %zmm12, %zmm4 + +// CHECK: vfmsub231pd +// CHECK: encoding: [0x62,0xe2,0xed,0x48,0xba,0x73,0x08] +vfmsub231pd 0x200(%rbx), %zmm2, %zmm22 + +// CHECK: vfmaddsub231ps +// CHECK: encoding: [0x62,0xd2,0x65,0x4b,0xb6,0xec] +vfmaddsub231ps %zmm12, %zmm3, %zmm5 {%k3} + +// CHECK: vfmsubadd231pd +// CHECK: encoding: [0x62,0x72,0x85,0xc5,0xb7,0xdd] +vfmsubadd231pd %zmm5, %zmm31, %zmm11 {%k5}{z} + +// CHECK: vfnmadd231ps +// CHECK: encoding: [0x62,0xf2,0x4d,0x48,0xbc,0xfd] +vfnmadd231ps %zmm5, %zmm6, %zmm7 + +// CHECK: vfnmsub231pd +// CHECK: encoding: [0x62,0xf2,0xcd,0x48,0xbe,0xfd] +vfnmsub231pd %zmm5, %zmm6, %zmm7 + +// CHECK: vpermilps +// CHECK: encoding: [0x62,0xf2,0x6d,0x48,0x0c,0xd9] +vpermilps %zmm1, %zmm2, %zmm3 + +// CHECK: vpermilpd +// CHECK: encoding: [0x62,0xf2,0xed,0x48,0x0d,0x5b,0x10] +vpermilpd 0x400(%rbx), %zmm2, %zmm3 + +// CHECK: vpermilps +// CHECK: encoding: [0x62,0xf2,0x6d,0x48,0x0c,0x5b,0x10] +vpermilps 0x400(%rbx), %zmm2, %zmm3 + +// CHECK: vpermilpd +// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x05,0x53,0x10,0x23] +vpermilpd $0x23, 0x400(%rbx), %zmm2 diff --git a/test/MC/X86/intel-syntax-2.s b/test/MC/X86/intel-syntax-2.s index d6dbe15..f7bdaf9 100644 --- a/test/MC/X86/intel-syntax-2.s +++ b/test/MC/X86/intel-syntax-2.s @@ -7,3 +7,11 @@ _test: .att_syntax // CHECK: movl $257, -4(%rsp) movl $257, -4(%rsp) + +_test2: +.intel_syntax noprefix + mov DWORD PTR [RSP - 4], 255 +// CHECK: movl $255, -4(%rsp) +.att_syntax prefix + movl $255, -4(%rsp) +// CHECK: movl $255, -4(%rsp) diff --git a/test/MC/X86/intel-syntax-ambiguous.s b/test/MC/X86/intel-syntax-ambiguous.s new file mode 100644 index 0000000..fe1fe50 --- /dev/null +++ b/test/MC/X86/intel-syntax-ambiguous.s @@ -0,0 +1,47 @@ +// RUN: not llvm-mc -triple i686-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s + +.intel_syntax + +// Basic case of ambiguity for inc. + +inc [eax] +// CHECK: error: ambiguous operand size for instruction 'inc' +inc dword ptr [eax] +inc word ptr [eax] +inc byte ptr [eax] +// CHECK-NOT: error: + +// Other ambiguous instructions. Anything that doesn't take a register, +// basically. + +dec [eax] +// CHECK: error: ambiguous operand size for instruction 'dec' +mov [eax], 1 +// CHECK: error: ambiguous operand size for instruction 'mov' +and [eax], 0 +// CHECK: error: ambiguous operand size for instruction 'and' +or [eax], 1 +// CHECK: error: ambiguous operand size for instruction 'or' +add [eax], 1 +// CHECK: error: ambiguous operand size for instruction 'add' +sub [eax], 1 +// CHECK: error: ambiguous operand size for instruction 'sub' + +// gas assumes these instructions are pointer-sized by default, and we follow +// suit. +push [eax] +call [eax] +jmp [eax] +// CHECK-NOT: error: + +add byte ptr [eax], eax +// CHECK: error: invalid operand for instruction + +add byte ptr [eax], eax +// CHECK: error: invalid operand for instruction + +add rax, 3 +// CHECK: error: register %rax is only available in 64-bit mode + +fadd "?half@?0??bar@@YAXXZ@4NA" +// CHECK: error: ambiguous operand size for instruction 'fadd' diff --git a/test/MC/X86/intel-syntax-error.s b/test/MC/X86/intel-syntax-error.s new file mode 100644 index 0000000..7207c95 --- /dev/null +++ b/test/MC/X86/intel-syntax-error.s @@ -0,0 +1,13 @@ +// RUN: not llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=att %s -o /dev/null 2>&1 | FileCheck %s + +// This tests weird forms of Intel and AT&T syntax that gas accepts that we +// don't. The [no]prefix operand of the syntax directive indicates whether +// registers need a '%' prefix. + +.intel_syntax prefix +// CHECK: error: '.intel_syntax prefix' is not supported: registers must not have a '%' prefix in .intel_syntax +_test2: + mov DWORD PTR [%esp - 4], 257 +.att_syntax noprefix +// CHECK: error: '.att_syntax noprefix' is not supported: registers must have a '%' prefix in .att_syntax + movl $257, -4(esp) diff --git a/test/MC/X86/intel-syntax-ptr-sized.s b/test/MC/X86/intel-syntax-ptr-sized.s new file mode 100644 index 0000000..c052c32 --- /dev/null +++ b/test/MC/X86/intel-syntax-ptr-sized.s @@ -0,0 +1,20 @@ +// RUN: llvm-mc %s -triple=i686-pc-windows | FileCheck %s + +.intel_syntax + +push [eax] +// CHECK: pushl (%eax) +call [eax] +// CHECK: calll *(%eax) +jmp [eax] +// CHECK: jmpl *(%eax) + +// mode switch +.code16 + +push [eax] +// CHECK: pushw (%eax) +call [eax] +// CHECK: callw *(%eax) +jmp [eax] +// CHECK: jmpw *(%eax) diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 7968918..c027aa4 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -603,7 +603,62 @@ mov rcx, qword ptr [_g0 + 8] "?half@?0??bar@@YAXXZ@4NA": .quad 4602678819172646912 -fadd "?half@?0??bar@@YAXXZ@4NA" -fadd "?half@?0??bar@@YAXXZ@4NA"@IMGREL +fadd dword ptr "?half@?0??bar@@YAXXZ@4NA" +fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"@IMGREL // CHECK: fadds "?half@?0??bar@@YAXXZ@4NA" -// CHECK: fadds "?half@?0??bar@@YAXXZ@4NA"@IMGREL32 +// CHECK: fadds "?half@?0??bar@@YAXXZ@4NA"@IMGREL + +inc qword ptr [rax] +inc dword ptr [rax] +inc word ptr [rax] +inc byte ptr [rax] +// CHECK: incq (%rax) +// CHECK: incl (%rax) +// CHECK: incw (%rax) +// CHECK: incb (%rax) + +dec qword ptr [rax] +dec dword ptr [rax] +dec word ptr [rax] +dec byte ptr [rax] +// CHECK: decq (%rax) +// CHECK: decl (%rax) +// CHECK: decw (%rax) +// CHECK: decb (%rax) + +add qword ptr [rax], 1 +add dword ptr [rax], 1 +add word ptr [rax], 1 +add byte ptr [rax], 1 +// CHECK: addq $1, (%rax) +// CHECK: addl $1, (%rax) +// CHECK: addw $1, (%rax) +// CHECK: addb $1, (%rax) + +fstp xword ptr [rax] +fstp qword ptr [rax] +fstp dword ptr [rax] +// CHECK: fstpt (%rax) +// CHECK: fstpl (%rax) +// CHECK: fstps (%rax) + +fxsave [eax] +fsave [eax] +fxrstor [eax] +frstor [eax] +// CHECK: fxsave (%eax) +// CHECK: wait +// CHECK: fnsave (%eax) +// CHECK: fxrstor (%eax) +// CHECK: frstor (%eax) + +// FIXME: Should we accept this? Masm accepts it, but gas does not. +fxsave dword ptr [eax] +fsave dword ptr [eax] +fxrstor dword ptr [eax] +frstor dword ptr [eax] +// CHECK: fxsave (%eax) +// CHECK: wait +// CHECK: fnsave (%eax) +// CHECK: fxrstor (%eax) +// CHECK: frstor (%eax) diff --git a/test/MC/X86/macho-uleb.s b/test/MC/X86/macho-uleb.s new file mode 100644 index 0000000..46d858b --- /dev/null +++ b/test/MC/X86/macho-uleb.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple=x86_64-apple-darwin %s | FileCheck %s + +a: +b: + .uleb128 a-b + +// CHECK: .uleb128 a-b diff --git a/test/MC/X86/reloc-macho.s b/test/MC/X86/reloc-macho.s new file mode 100644 index 0000000..9297b1b --- /dev/null +++ b/test/MC/X86/reloc-macho.s @@ -0,0 +1,9 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin %s -o - | llvm-readobj -r | FileCheck %s + +// CHECK: Relocations [ +// CHECK-NEXT: ] + + .section foo,bar +La: +Lb: + .long La-Lb diff --git a/test/MC/X86/sgx-encoding.s b/test/MC/X86/sgx-encoding.s new file mode 100644 index 0000000..e6ae8c9 --- /dev/null +++ b/test/MC/X86/sgx-encoding.s @@ -0,0 +1,9 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s + +// CHECK: encls +// CHECK: encoding: [0x0f,0x01,0xcf] + encls + +// CHECK: enclu +// CHECK: encoding: [0x0f,0x01,0xd7] + enclu diff --git a/test/MC/X86/stackmap-nops.ll b/test/MC/X86/stackmap-nops.ll index 98d17ea..a0d4418 100644 --- a/test/MC/X86/stackmap-nops.ll +++ b/test/MC/X86/stackmap-nops.ll @@ -41,6 +41,10 @@ entry: tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 13, i32 13) tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 14, i32 14) tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 15, i32 15) +; Add an extra stackmap with a zero-length shadow to thwart the shadow +; optimization. This will force all 15 bytes of the previous shadow to be +; padded with nops. + tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 16, i32 0) ret void } diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s index 732874b..80c34ec 100644 --- a/test/MC/X86/x86-32-coverage.s +++ b/test/MC/X86/x86-32-coverage.s @@ -19618,22 +19618,36 @@ // CHECK: blendvps %xmm2, %xmm1 # encoding: [0x66,0x0f,0x38,0x14,0xca] blendvps %xmm2, %xmm1 -// rdar://9795008 -// These instructions take a mask not an 8-bit sign extended value. +// These instructions can take an unsigned 8-bit mask as well as a signed 8-bit +// immediate. Check both forms here. // CHECK: blendps $129, %xmm2, %xmm1 blendps $0x81, %xmm2, %xmm1 +// CHECK: blendps $-64, %xmm2, %xmm1 + blendps $-64, %xmm2, %xmm1 // CHECK: blendpd $129, %xmm2, %xmm1 blendpd $0x81, %xmm2, %xmm1 +// CHECK: blendpd $-64, %xmm2, %xmm1 + blendpd $-64, %xmm2, %xmm1 // CHECK: pblendw $129, %xmm2, %xmm1 pblendw $0x81, %xmm2, %xmm1 +// CHECK: pblendw $-64, %xmm2, %xmm1 + pblendw $-64, %xmm2, %xmm1 // CHECK: mpsadbw $129, %xmm2, %xmm1 mpsadbw $0x81, %xmm2, %xmm1 +// CHECK: mpsadbw $-64, %xmm2, %xmm1 + mpsadbw $-64, %xmm2, %xmm1 // CHECK: dpps $129, %xmm2, %xmm1 dpps $0x81, %xmm2, %xmm1 +// CHECK: dpps $-64, %xmm2, %xmm1 + dpps $-64, %xmm2, %xmm1 // CHECK: dppd $129, %xmm2, %xmm1 dppd $0x81, %xmm2, %xmm1 +// CHECK: dppd $-64, %xmm2, %xmm1 + dppd $-64, %xmm2, %xmm1 // CHECK: insertps $129, %xmm2, %xmm1 insertps $0x81, %xmm2, %xmm1 +// CHECK: insertps $-64, %xmm2, %xmm1 + insertps $-64, %xmm2, %xmm1 // PR13253 handle implicit optional third argument that must always be xmm0 // CHECK: pblendvb %xmm2, %xmm1 diff --git a/test/MC/X86/x86-32-ms-inline-asm.s b/test/MC/X86/x86-32-ms-inline-asm.s index d912915..3169033 100644 --- a/test/MC/X86/x86-32-ms-inline-asm.s +++ b/test/MC/X86/x86-32-ms-inline-asm.s @@ -90,4 +90,8 @@ _t21: ## @t21 // CHECK: popal // CHECK: # encoding: [0x61] + fwait +// CHECK: wait +// CHECK: # encoding: [0x9b] + ret diff --git a/test/MC/X86/x86-64-avx512bw.s b/test/MC/X86/x86-64-avx512bw.s new file mode 100644 index 0000000..5155504 --- /dev/null +++ b/test/MC/X86/x86-64-avx512bw.s @@ -0,0 +1,997 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512bw --show-encoding %s | FileCheck %s + +// CHECK: vpaddb %zmm23, %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xa1,0x3d,0x40,0xfc,0xdf] + vpaddb %zmm23, %zmm24, %zmm19 + +// CHECK: vpaddb %zmm23, %zmm24, %zmm19 {%k3} +// CHECK: encoding: [0x62,0xa1,0x3d,0x43,0xfc,0xdf] + vpaddb %zmm23, %zmm24, %zmm19 {%k3} + +// CHECK: vpaddb %zmm23, %zmm24, %zmm19 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0x3d,0xc3,0xfc,0xdf] + vpaddb %zmm23, %zmm24, %zmm19 {%k3} {z} + +// CHECK: vpaddb (%rcx), %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfc,0x19] + vpaddb (%rcx), %zmm24, %zmm19 + +// CHECK: vpaddb 291(%rax,%r14,8), %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xa1,0x3d,0x40,0xfc,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpaddb 291(%rax,%r14,8), %zmm24, %zmm19 + +// CHECK: vpaddb 8128(%rdx), %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfc,0x5a,0x7f] + vpaddb 8128(%rdx), %zmm24, %zmm19 + +// CHECK: vpaddb 8192(%rdx), %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfc,0x9a,0x00,0x20,0x00,0x00] + vpaddb 8192(%rdx), %zmm24, %zmm19 + +// CHECK: vpaddb -8192(%rdx), %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfc,0x5a,0x80] + vpaddb -8192(%rdx), %zmm24, %zmm19 + +// CHECK: vpaddb -8256(%rdx), %zmm24, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfc,0x9a,0xc0,0xdf,0xff,0xff] + vpaddb -8256(%rdx), %zmm24, %zmm19 + +// CHECK: vpaddw %zmm19, %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xa1,0x3d,0x40,0xfd,0xcb] + vpaddw %zmm19, %zmm24, %zmm17 + +// CHECK: vpaddw %zmm19, %zmm24, %zmm17 {%k3} +// CHECK: encoding: [0x62,0xa1,0x3d,0x43,0xfd,0xcb] + vpaddw %zmm19, %zmm24, %zmm17 {%k3} + +// CHECK: vpaddw %zmm19, %zmm24, %zmm17 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0x3d,0xc3,0xfd,0xcb] + vpaddw %zmm19, %zmm24, %zmm17 {%k3} {z} + +// CHECK: vpaddw (%rcx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfd,0x09] + vpaddw (%rcx), %zmm24, %zmm17 + +// CHECK: vpaddw 291(%rax,%r14,8), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xa1,0x3d,0x40,0xfd,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpaddw 291(%rax,%r14,8), %zmm24, %zmm17 + +// CHECK: vpaddw 8128(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfd,0x4a,0x7f] + vpaddw 8128(%rdx), %zmm24, %zmm17 + +// CHECK: vpaddw 8192(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfd,0x8a,0x00,0x20,0x00,0x00] + vpaddw 8192(%rdx), %zmm24, %zmm17 + +// CHECK: vpaddw -8192(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfd,0x4a,0x80] + vpaddw -8192(%rdx), %zmm24, %zmm17 + +// CHECK: vpaddw -8256(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xfd,0x8a,0xc0,0xdf,0xff,0xff] + vpaddw -8256(%rdx), %zmm24, %zmm17 + +// CHECK: vpcmpeqb %zmm26, %zmm26, %k4 +// CHECK: encoding: [0x62,0x91,0x2d,0x40,0x74,0xe2] + vpcmpeqb %zmm26, %zmm26, %k4 + +// CHECK: vpcmpeqb %zmm26, %zmm26, %k4 {%k6} +// CHECK: encoding: [0x62,0x91,0x2d,0x46,0x74,0xe2] + vpcmpeqb %zmm26, %zmm26, %k4 {%k6} + +// CHECK: vpcmpeqb (%rcx), %zmm26, %k4 +// CHECK: encoding: [0x62,0xf1,0x2d,0x40,0x74,0x21] + vpcmpeqb (%rcx), %zmm26, %k4 + +// CHECK: vpcmpeqb 291(%rax,%r14,8), %zmm26, %k4 +// CHECK: encoding: [0x62,0xb1,0x2d,0x40,0x74,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqb 291(%rax,%r14,8), %zmm26, %k4 + +// CHECK: vpcmpeqb 8128(%rdx), %zmm26, %k4 +// CHECK: encoding: [0x62,0xf1,0x2d,0x40,0x74,0x62,0x7f] + vpcmpeqb 8128(%rdx), %zmm26, %k4 + +// CHECK: vpcmpeqb 8192(%rdx), %zmm26, %k4 +// CHECK: encoding: [0x62,0xf1,0x2d,0x40,0x74,0xa2,0x00,0x20,0x00,0x00] + vpcmpeqb 8192(%rdx), %zmm26, %k4 + +// CHECK: vpcmpeqb -8192(%rdx), %zmm26, %k4 +// CHECK: encoding: [0x62,0xf1,0x2d,0x40,0x74,0x62,0x80] + vpcmpeqb -8192(%rdx), %zmm26, %k4 + +// CHECK: vpcmpeqb -8256(%rdx), %zmm26, %k4 +// CHECK: encoding: [0x62,0xf1,0x2d,0x40,0x74,0xa2,0xc0,0xdf,0xff,0xff] + vpcmpeqb -8256(%rdx), %zmm26, %k4 + +// CHECK: vpcmpeqw %zmm19, %zmm23, %k5 +// CHECK: encoding: [0x62,0xb1,0x45,0x40,0x75,0xeb] + vpcmpeqw %zmm19, %zmm23, %k5 + +// CHECK: vpcmpeqw %zmm19, %zmm23, %k5 {%k7} +// CHECK: encoding: [0x62,0xb1,0x45,0x47,0x75,0xeb] + vpcmpeqw %zmm19, %zmm23, %k5 {%k7} + +// CHECK: vpcmpeqw (%rcx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x75,0x29] + vpcmpeqw (%rcx), %zmm23, %k5 + +// CHECK: vpcmpeqw 291(%rax,%r14,8), %zmm23, %k5 +// CHECK: encoding: [0x62,0xb1,0x45,0x40,0x75,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqw 291(%rax,%r14,8), %zmm23, %k5 + +// CHECK: vpcmpeqw 8128(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x75,0x6a,0x7f] + vpcmpeqw 8128(%rdx), %zmm23, %k5 + +// CHECK: vpcmpeqw 8192(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x75,0xaa,0x00,0x20,0x00,0x00] + vpcmpeqw 8192(%rdx), %zmm23, %k5 + +// CHECK: vpcmpeqw -8192(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x75,0x6a,0x80] + vpcmpeqw -8192(%rdx), %zmm23, %k5 + +// CHECK: vpcmpeqw -8256(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x75,0xaa,0xc0,0xdf,0xff,0xff] + vpcmpeqw -8256(%rdx), %zmm23, %k5 + +// CHECK: vpcmpgtb %zmm20, %zmm30, %k4 +// CHECK: encoding: [0x62,0xb1,0x0d,0x40,0x64,0xe4] + vpcmpgtb %zmm20, %zmm30, %k4 + +// CHECK: vpcmpgtb %zmm20, %zmm30, %k4 {%k1} +// CHECK: encoding: [0x62,0xb1,0x0d,0x41,0x64,0xe4] + vpcmpgtb %zmm20, %zmm30, %k4 {%k1} + +// CHECK: vpcmpgtb (%rcx), %zmm30, %k4 +// CHECK: encoding: [0x62,0xf1,0x0d,0x40,0x64,0x21] + vpcmpgtb (%rcx), %zmm30, %k4 + +// CHECK: vpcmpgtb 291(%rax,%r14,8), %zmm30, %k4 +// CHECK: encoding: [0x62,0xb1,0x0d,0x40,0x64,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtb 291(%rax,%r14,8), %zmm30, %k4 + +// CHECK: vpcmpgtb 8128(%rdx), %zmm30, %k4 +// CHECK: encoding: [0x62,0xf1,0x0d,0x40,0x64,0x62,0x7f] + vpcmpgtb 8128(%rdx), %zmm30, %k4 + +// CHECK: vpcmpgtb 8192(%rdx), %zmm30, %k4 +// CHECK: encoding: [0x62,0xf1,0x0d,0x40,0x64,0xa2,0x00,0x20,0x00,0x00] + vpcmpgtb 8192(%rdx), %zmm30, %k4 + +// CHECK: vpcmpgtb -8192(%rdx), %zmm30, %k4 +// CHECK: encoding: [0x62,0xf1,0x0d,0x40,0x64,0x62,0x80] + vpcmpgtb -8192(%rdx), %zmm30, %k4 + +// CHECK: vpcmpgtb -8256(%rdx), %zmm30, %k4 +// CHECK: encoding: [0x62,0xf1,0x0d,0x40,0x64,0xa2,0xc0,0xdf,0xff,0xff] + vpcmpgtb -8256(%rdx), %zmm30, %k4 + +// CHECK: vpcmpgtw %zmm21, %zmm23, %k5 +// CHECK: encoding: [0x62,0xb1,0x45,0x40,0x65,0xed] + vpcmpgtw %zmm21, %zmm23, %k5 + +// CHECK: vpcmpgtw %zmm21, %zmm23, %k5 {%k7} +// CHECK: encoding: [0x62,0xb1,0x45,0x47,0x65,0xed] + vpcmpgtw %zmm21, %zmm23, %k5 {%k7} + +// CHECK: vpcmpgtw (%rcx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x65,0x29] + vpcmpgtw (%rcx), %zmm23, %k5 + +// CHECK: vpcmpgtw 291(%rax,%r14,8), %zmm23, %k5 +// CHECK: encoding: [0x62,0xb1,0x45,0x40,0x65,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtw 291(%rax,%r14,8), %zmm23, %k5 + +// CHECK: vpcmpgtw 8128(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x65,0x6a,0x7f] + vpcmpgtw 8128(%rdx), %zmm23, %k5 + +// CHECK: vpcmpgtw 8192(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x65,0xaa,0x00,0x20,0x00,0x00] + vpcmpgtw 8192(%rdx), %zmm23, %k5 + +// CHECK: vpcmpgtw -8192(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x65,0x6a,0x80] + vpcmpgtw -8192(%rdx), %zmm23, %k5 + +// CHECK: vpcmpgtw -8256(%rdx), %zmm23, %k5 +// CHECK: encoding: [0x62,0xf1,0x45,0x40,0x65,0xaa,0xc0,0xdf,0xff,0xff] + vpcmpgtw -8256(%rdx), %zmm23, %k5 + +// CHECK: vpmaxsb %zmm26, %zmm29, %zmm23 +// CHECK: encoding: [0x62,0x82,0x15,0x40,0x3c,0xfa] + vpmaxsb %zmm26, %zmm29, %zmm23 + +// CHECK: vpmaxsb %zmm26, %zmm29, %zmm23 {%k4} +// CHECK: encoding: [0x62,0x82,0x15,0x44,0x3c,0xfa] + vpmaxsb %zmm26, %zmm29, %zmm23 {%k4} + +// CHECK: vpmaxsb %zmm26, %zmm29, %zmm23 {%k4} {z} +// CHECK: encoding: [0x62,0x82,0x15,0xc4,0x3c,0xfa] + vpmaxsb %zmm26, %zmm29, %zmm23 {%k4} {z} + +// CHECK: vpmaxsb (%rcx), %zmm29, %zmm23 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3c,0x39] + vpmaxsb (%rcx), %zmm29, %zmm23 + +// CHECK: vpmaxsb 291(%rax,%r14,8), %zmm29, %zmm23 +// CHECK: encoding: [0x62,0xa2,0x15,0x40,0x3c,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpmaxsb 291(%rax,%r14,8), %zmm29, %zmm23 + +// CHECK: vpmaxsb 8128(%rdx), %zmm29, %zmm23 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3c,0x7a,0x7f] + vpmaxsb 8128(%rdx), %zmm29, %zmm23 + +// CHECK: vpmaxsb 8192(%rdx), %zmm29, %zmm23 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3c,0xba,0x00,0x20,0x00,0x00] + vpmaxsb 8192(%rdx), %zmm29, %zmm23 + +// CHECK: vpmaxsb -8192(%rdx), %zmm29, %zmm23 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3c,0x7a,0x80] + vpmaxsb -8192(%rdx), %zmm29, %zmm23 + +// CHECK: vpmaxsb -8256(%rdx), %zmm29, %zmm23 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3c,0xba,0xc0,0xdf,0xff,0xff] + vpmaxsb -8256(%rdx), %zmm29, %zmm23 + +// CHECK: vpmaxsw %zmm25, %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x01,0x1d,0x40,0xee,0xc9] + vpmaxsw %zmm25, %zmm28, %zmm25 + +// CHECK: vpmaxsw %zmm25, %zmm28, %zmm25 {%k3} +// CHECK: encoding: [0x62,0x01,0x1d,0x43,0xee,0xc9] + vpmaxsw %zmm25, %zmm28, %zmm25 {%k3} + +// CHECK: vpmaxsw %zmm25, %zmm28, %zmm25 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x1d,0xc3,0xee,0xc9] + vpmaxsw %zmm25, %zmm28, %zmm25 {%k3} {z} + +// CHECK: vpmaxsw (%rcx), %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x61,0x1d,0x40,0xee,0x09] + vpmaxsw (%rcx), %zmm28, %zmm25 + +// CHECK: vpmaxsw 291(%rax,%r14,8), %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x21,0x1d,0x40,0xee,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpmaxsw 291(%rax,%r14,8), %zmm28, %zmm25 + +// CHECK: vpmaxsw 8128(%rdx), %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x61,0x1d,0x40,0xee,0x4a,0x7f] + vpmaxsw 8128(%rdx), %zmm28, %zmm25 + +// CHECK: vpmaxsw 8192(%rdx), %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x61,0x1d,0x40,0xee,0x8a,0x00,0x20,0x00,0x00] + vpmaxsw 8192(%rdx), %zmm28, %zmm25 + +// CHECK: vpmaxsw -8192(%rdx), %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x61,0x1d,0x40,0xee,0x4a,0x80] + vpmaxsw -8192(%rdx), %zmm28, %zmm25 + +// CHECK: vpmaxsw -8256(%rdx), %zmm28, %zmm25 +// CHECK: encoding: [0x62,0x61,0x1d,0x40,0xee,0x8a,0xc0,0xdf,0xff,0xff] + vpmaxsw -8256(%rdx), %zmm28, %zmm25 + +// CHECK: vpmaxub %zmm25, %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x01,0x6d,0x40,0xde,0xe9] + vpmaxub %zmm25, %zmm18, %zmm29 + +// CHECK: vpmaxub %zmm25, %zmm18, %zmm29 {%k7} +// CHECK: encoding: [0x62,0x01,0x6d,0x47,0xde,0xe9] + vpmaxub %zmm25, %zmm18, %zmm29 {%k7} + +// CHECK: vpmaxub %zmm25, %zmm18, %zmm29 {%k7} {z} +// CHECK: encoding: [0x62,0x01,0x6d,0xc7,0xde,0xe9] + vpmaxub %zmm25, %zmm18, %zmm29 {%k7} {z} + +// CHECK: vpmaxub (%rcx), %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xde,0x29] + vpmaxub (%rcx), %zmm18, %zmm29 + +// CHECK: vpmaxub 291(%rax,%r14,8), %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x21,0x6d,0x40,0xde,0xac,0xf0,0x23,0x01,0x00,0x00] + vpmaxub 291(%rax,%r14,8), %zmm18, %zmm29 + +// CHECK: vpmaxub 8128(%rdx), %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xde,0x6a,0x7f] + vpmaxub 8128(%rdx), %zmm18, %zmm29 + +// CHECK: vpmaxub 8192(%rdx), %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xde,0xaa,0x00,0x20,0x00,0x00] + vpmaxub 8192(%rdx), %zmm18, %zmm29 + +// CHECK: vpmaxub -8192(%rdx), %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xde,0x6a,0x80] + vpmaxub -8192(%rdx), %zmm18, %zmm29 + +// CHECK: vpmaxub -8256(%rdx), %zmm18, %zmm29 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xde,0xaa,0xc0,0xdf,0xff,0xff] + vpmaxub -8256(%rdx), %zmm18, %zmm29 + +// CHECK: vpmaxuw %zmm23, %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xa2,0x25,0x40,0x3e,0xef] + vpmaxuw %zmm23, %zmm27, %zmm21 + +// CHECK: vpmaxuw %zmm23, %zmm27, %zmm21 {%k3} +// CHECK: encoding: [0x62,0xa2,0x25,0x43,0x3e,0xef] + vpmaxuw %zmm23, %zmm27, %zmm21 {%k3} + +// CHECK: vpmaxuw %zmm23, %zmm27, %zmm21 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0x25,0xc3,0x3e,0xef] + vpmaxuw %zmm23, %zmm27, %zmm21 {%k3} {z} + +// CHECK: vpmaxuw (%rcx), %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xe2,0x25,0x40,0x3e,0x29] + vpmaxuw (%rcx), %zmm27, %zmm21 + +// CHECK: vpmaxuw 291(%rax,%r14,8), %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xa2,0x25,0x40,0x3e,0xac,0xf0,0x23,0x01,0x00,0x00] + vpmaxuw 291(%rax,%r14,8), %zmm27, %zmm21 + +// CHECK: vpmaxuw 8128(%rdx), %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xe2,0x25,0x40,0x3e,0x6a,0x7f] + vpmaxuw 8128(%rdx), %zmm27, %zmm21 + +// CHECK: vpmaxuw 8192(%rdx), %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xe2,0x25,0x40,0x3e,0xaa,0x00,0x20,0x00,0x00] + vpmaxuw 8192(%rdx), %zmm27, %zmm21 + +// CHECK: vpmaxuw -8192(%rdx), %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xe2,0x25,0x40,0x3e,0x6a,0x80] + vpmaxuw -8192(%rdx), %zmm27, %zmm21 + +// CHECK: vpmaxuw -8256(%rdx), %zmm27, %zmm21 +// CHECK: encoding: [0x62,0xe2,0x25,0x40,0x3e,0xaa,0xc0,0xdf,0xff,0xff] + vpmaxuw -8256(%rdx), %zmm27, %zmm21 + +// CHECK: vpminsb %zmm25, %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x02,0x4d,0x40,0x38,0xe1] + vpminsb %zmm25, %zmm22, %zmm28 + +// CHECK: vpminsb %zmm25, %zmm22, %zmm28 {%k6} +// CHECK: encoding: [0x62,0x02,0x4d,0x46,0x38,0xe1] + vpminsb %zmm25, %zmm22, %zmm28 {%k6} + +// CHECK: vpminsb %zmm25, %zmm22, %zmm28 {%k6} {z} +// CHECK: encoding: [0x62,0x02,0x4d,0xc6,0x38,0xe1] + vpminsb %zmm25, %zmm22, %zmm28 {%k6} {z} + +// CHECK: vpminsb (%rcx), %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x62,0x4d,0x40,0x38,0x21] + vpminsb (%rcx), %zmm22, %zmm28 + +// CHECK: vpminsb 291(%rax,%r14,8), %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x22,0x4d,0x40,0x38,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpminsb 291(%rax,%r14,8), %zmm22, %zmm28 + +// CHECK: vpminsb 8128(%rdx), %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x62,0x4d,0x40,0x38,0x62,0x7f] + vpminsb 8128(%rdx), %zmm22, %zmm28 + +// CHECK: vpminsb 8192(%rdx), %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x62,0x4d,0x40,0x38,0xa2,0x00,0x20,0x00,0x00] + vpminsb 8192(%rdx), %zmm22, %zmm28 + +// CHECK: vpminsb -8192(%rdx), %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x62,0x4d,0x40,0x38,0x62,0x80] + vpminsb -8192(%rdx), %zmm22, %zmm28 + +// CHECK: vpminsb -8256(%rdx), %zmm22, %zmm28 +// CHECK: encoding: [0x62,0x62,0x4d,0x40,0x38,0xa2,0xc0,0xdf,0xff,0xff] + vpminsb -8256(%rdx), %zmm22, %zmm28 + +// CHECK: vpminsw %zmm25, %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x01,0x4d,0x40,0xea,0xd9] + vpminsw %zmm25, %zmm22, %zmm27 + +// CHECK: vpminsw %zmm25, %zmm22, %zmm27 {%k6} +// CHECK: encoding: [0x62,0x01,0x4d,0x46,0xea,0xd9] + vpminsw %zmm25, %zmm22, %zmm27 {%k6} + +// CHECK: vpminsw %zmm25, %zmm22, %zmm27 {%k6} {z} +// CHECK: encoding: [0x62,0x01,0x4d,0xc6,0xea,0xd9] + vpminsw %zmm25, %zmm22, %zmm27 {%k6} {z} + +// CHECK: vpminsw (%rcx), %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x61,0x4d,0x40,0xea,0x19] + vpminsw (%rcx), %zmm22, %zmm27 + +// CHECK: vpminsw 291(%rax,%r14,8), %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x21,0x4d,0x40,0xea,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminsw 291(%rax,%r14,8), %zmm22, %zmm27 + +// CHECK: vpminsw 8128(%rdx), %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x61,0x4d,0x40,0xea,0x5a,0x7f] + vpminsw 8128(%rdx), %zmm22, %zmm27 + +// CHECK: vpminsw 8192(%rdx), %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x61,0x4d,0x40,0xea,0x9a,0x00,0x20,0x00,0x00] + vpminsw 8192(%rdx), %zmm22, %zmm27 + +// CHECK: vpminsw -8192(%rdx), %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x61,0x4d,0x40,0xea,0x5a,0x80] + vpminsw -8192(%rdx), %zmm22, %zmm27 + +// CHECK: vpminsw -8256(%rdx), %zmm22, %zmm27 +// CHECK: encoding: [0x62,0x61,0x4d,0x40,0xea,0x9a,0xc0,0xdf,0xff,0xff] + vpminsw -8256(%rdx), %zmm22, %zmm27 + +// CHECK: vpminub %zmm26, %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x01,0x35,0x40,0xda,0xca] + vpminub %zmm26, %zmm25, %zmm25 + +// CHECK: vpminub %zmm26, %zmm25, %zmm25 {%k6} +// CHECK: encoding: [0x62,0x01,0x35,0x46,0xda,0xca] + vpminub %zmm26, %zmm25, %zmm25 {%k6} + +// CHECK: vpminub %zmm26, %zmm25, %zmm25 {%k6} {z} +// CHECK: encoding: [0x62,0x01,0x35,0xc6,0xda,0xca] + vpminub %zmm26, %zmm25, %zmm25 {%k6} {z} + +// CHECK: vpminub (%rcx), %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x61,0x35,0x40,0xda,0x09] + vpminub (%rcx), %zmm25, %zmm25 + +// CHECK: vpminub 291(%rax,%r14,8), %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x21,0x35,0x40,0xda,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpminub 291(%rax,%r14,8), %zmm25, %zmm25 + +// CHECK: vpminub 8128(%rdx), %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x61,0x35,0x40,0xda,0x4a,0x7f] + vpminub 8128(%rdx), %zmm25, %zmm25 + +// CHECK: vpminub 8192(%rdx), %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x61,0x35,0x40,0xda,0x8a,0x00,0x20,0x00,0x00] + vpminub 8192(%rdx), %zmm25, %zmm25 + +// CHECK: vpminub -8192(%rdx), %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x61,0x35,0x40,0xda,0x4a,0x80] + vpminub -8192(%rdx), %zmm25, %zmm25 + +// CHECK: vpminub -8256(%rdx), %zmm25, %zmm25 +// CHECK: encoding: [0x62,0x61,0x35,0x40,0xda,0x8a,0xc0,0xdf,0xff,0xff] + vpminub -8256(%rdx), %zmm25, %zmm25 + +// CHECK: vpminuw %zmm20, %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xa2,0x15,0x40,0x3a,0xdc] + vpminuw %zmm20, %zmm29, %zmm19 + +// CHECK: vpminuw %zmm20, %zmm29, %zmm19 {%k7} +// CHECK: encoding: [0x62,0xa2,0x15,0x47,0x3a,0xdc] + vpminuw %zmm20, %zmm29, %zmm19 {%k7} + +// CHECK: vpminuw %zmm20, %zmm29, %zmm19 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x15,0xc7,0x3a,0xdc] + vpminuw %zmm20, %zmm29, %zmm19 {%k7} {z} + +// CHECK: vpminuw (%rcx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3a,0x19] + vpminuw (%rcx), %zmm29, %zmm19 + +// CHECK: vpminuw 291(%rax,%r14,8), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xa2,0x15,0x40,0x3a,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminuw 291(%rax,%r14,8), %zmm29, %zmm19 + +// CHECK: vpminuw 8128(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3a,0x5a,0x7f] + vpminuw 8128(%rdx), %zmm29, %zmm19 + +// CHECK: vpminuw 8192(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3a,0x9a,0x00,0x20,0x00,0x00] + vpminuw 8192(%rdx), %zmm29, %zmm19 + +// CHECK: vpminuw -8192(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3a,0x5a,0x80] + vpminuw -8192(%rdx), %zmm29, %zmm19 + +// CHECK: vpminuw -8256(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x15,0x40,0x3a,0x9a,0xc0,0xdf,0xff,0xff] + vpminuw -8256(%rdx), %zmm29, %zmm19 + +// CHECK: vpmullw %zmm19, %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xa1,0x1d,0x40,0xd5,0xdb] + vpmullw %zmm19, %zmm28, %zmm19 + +// CHECK: vpmullw %zmm19, %zmm28, %zmm19 {%k5} +// CHECK: encoding: [0x62,0xa1,0x1d,0x45,0xd5,0xdb] + vpmullw %zmm19, %zmm28, %zmm19 {%k5} + +// CHECK: vpmullw %zmm19, %zmm28, %zmm19 {%k5} {z} +// CHECK: encoding: [0x62,0xa1,0x1d,0xc5,0xd5,0xdb] + vpmullw %zmm19, %zmm28, %zmm19 {%k5} {z} + +// CHECK: vpmullw (%rcx), %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x1d,0x40,0xd5,0x19] + vpmullw (%rcx), %zmm28, %zmm19 + +// CHECK: vpmullw 291(%rax,%r14,8), %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xa1,0x1d,0x40,0xd5,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpmullw 291(%rax,%r14,8), %zmm28, %zmm19 + +// CHECK: vpmullw 8128(%rdx), %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x1d,0x40,0xd5,0x5a,0x7f] + vpmullw 8128(%rdx), %zmm28, %zmm19 + +// CHECK: vpmullw 8192(%rdx), %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x1d,0x40,0xd5,0x9a,0x00,0x20,0x00,0x00] + vpmullw 8192(%rdx), %zmm28, %zmm19 + +// CHECK: vpmullw -8192(%rdx), %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x1d,0x40,0xd5,0x5a,0x80] + vpmullw -8192(%rdx), %zmm28, %zmm19 + +// CHECK: vpmullw -8256(%rdx), %zmm28, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x1d,0x40,0xd5,0x9a,0xc0,0xdf,0xff,0xff] + vpmullw -8256(%rdx), %zmm28, %zmm19 + +// CHECK: vpsubb %zmm26, %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x01,0x6d,0x40,0xf8,0xca] + vpsubb %zmm26, %zmm18, %zmm25 + +// CHECK: vpsubb %zmm26, %zmm18, %zmm25 {%k4} +// CHECK: encoding: [0x62,0x01,0x6d,0x44,0xf8,0xca] + vpsubb %zmm26, %zmm18, %zmm25 {%k4} + +// CHECK: vpsubb %zmm26, %zmm18, %zmm25 {%k4} {z} +// CHECK: encoding: [0x62,0x01,0x6d,0xc4,0xf8,0xca] + vpsubb %zmm26, %zmm18, %zmm25 {%k4} {z} + +// CHECK: vpsubb (%rcx), %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xf8,0x09] + vpsubb (%rcx), %zmm18, %zmm25 + +// CHECK: vpsubb 291(%rax,%r14,8), %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x21,0x6d,0x40,0xf8,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsubb 291(%rax,%r14,8), %zmm18, %zmm25 + +// CHECK: vpsubb 8128(%rdx), %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xf8,0x4a,0x7f] + vpsubb 8128(%rdx), %zmm18, %zmm25 + +// CHECK: vpsubb 8192(%rdx), %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xf8,0x8a,0x00,0x20,0x00,0x00] + vpsubb 8192(%rdx), %zmm18, %zmm25 + +// CHECK: vpsubb -8192(%rdx), %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xf8,0x4a,0x80] + vpsubb -8192(%rdx), %zmm18, %zmm25 + +// CHECK: vpsubb -8256(%rdx), %zmm18, %zmm25 +// CHECK: encoding: [0x62,0x61,0x6d,0x40,0xf8,0x8a,0xc0,0xdf,0xff,0xff] + vpsubb -8256(%rdx), %zmm18, %zmm25 + +// CHECK: vpsubw %zmm24, %zmm24, %zmm17 +// CHECK: encoding: [0x62,0x81,0x3d,0x40,0xf9,0xc8] + vpsubw %zmm24, %zmm24, %zmm17 + +// CHECK: vpsubw %zmm24, %zmm24, %zmm17 {%k4} +// CHECK: encoding: [0x62,0x81,0x3d,0x44,0xf9,0xc8] + vpsubw %zmm24, %zmm24, %zmm17 {%k4} + +// CHECK: vpsubw %zmm24, %zmm24, %zmm17 {%k4} {z} +// CHECK: encoding: [0x62,0x81,0x3d,0xc4,0xf9,0xc8] + vpsubw %zmm24, %zmm24, %zmm17 {%k4} {z} + +// CHECK: vpsubw (%rcx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xf9,0x09] + vpsubw (%rcx), %zmm24, %zmm17 + +// CHECK: vpsubw 291(%rax,%r14,8), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xa1,0x3d,0x40,0xf9,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsubw 291(%rax,%r14,8), %zmm24, %zmm17 + +// CHECK: vpsubw 8128(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xf9,0x4a,0x7f] + vpsubw 8128(%rdx), %zmm24, %zmm17 + +// CHECK: vpsubw 8192(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xf9,0x8a,0x00,0x20,0x00,0x00] + vpsubw 8192(%rdx), %zmm24, %zmm17 + +// CHECK: vpsubw -8192(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xf9,0x4a,0x80] + vpsubw -8192(%rdx), %zmm24, %zmm17 + +// CHECK: vpsubw -8256(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x40,0xf9,0x8a,0xc0,0xdf,0xff,0xff] + vpsubw -8256(%rdx), %zmm24, %zmm17 + +// CHECK: vmovdqu8 %zmm19, %zmm29 +// CHECK: encoding: [0x62,0x21,0x7f,0x48,0x6f,0xeb] + vmovdqu8 %zmm19, %zmm29 + +// CHECK: vmovdqu8 %zmm19, %zmm29 {%k7} +// CHECK: encoding: [0x62,0x21,0x7f,0x4f,0x6f,0xeb] + vmovdqu8 %zmm19, %zmm29 {%k7} + +// CHECK: vmovdqu8 %zmm19, %zmm29 {%k7} {z} +// CHECK: encoding: [0x62,0x21,0x7f,0xcf,0x6f,0xeb] + vmovdqu8 %zmm19, %zmm29 {%k7} {z} + +// CHECK: vmovdqu8 (%rcx), %zmm29 +// CHECK: encoding: [0x62,0x61,0x7f,0x48,0x6f,0x29] + vmovdqu8 (%rcx), %zmm29 + +// CHECK: vmovdqu8 291(%rax,%r14,8), %zmm29 +// CHECK: encoding: [0x62,0x21,0x7f,0x48,0x6f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu8 291(%rax,%r14,8), %zmm29 + +// CHECK: vmovdqu8 8128(%rdx), %zmm29 +// CHECK: encoding: [0x62,0x61,0x7f,0x48,0x6f,0x6a,0x7f] + vmovdqu8 8128(%rdx), %zmm29 + +// CHECK: vmovdqu8 8192(%rdx), %zmm29 +// CHECK: encoding: [0x62,0x61,0x7f,0x48,0x6f,0xaa,0x00,0x20,0x00,0x00] + vmovdqu8 8192(%rdx), %zmm29 + +// CHECK: vmovdqu8 -8192(%rdx), %zmm29 +// CHECK: encoding: [0x62,0x61,0x7f,0x48,0x6f,0x6a,0x80] + vmovdqu8 -8192(%rdx), %zmm29 + +// CHECK: vmovdqu8 -8256(%rdx), %zmm29 +// CHECK: encoding: [0x62,0x61,0x7f,0x48,0x6f,0xaa,0xc0,0xdf,0xff,0xff] + vmovdqu8 -8256(%rdx), %zmm29 + +// CHECK: vmovdqu16 %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xa1,0xff,0x48,0x6f,0xca] + vmovdqu16 %zmm18, %zmm17 + +// CHECK: vmovdqu16 %zmm18, %zmm17 {%k3} +// CHECK: encoding: [0x62,0xa1,0xff,0x4b,0x6f,0xca] + vmovdqu16 %zmm18, %zmm17 {%k3} + +// CHECK: vmovdqu16 %zmm18, %zmm17 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0xff,0xcb,0x6f,0xca] + vmovdqu16 %zmm18, %zmm17 {%k3} {z} + +// CHECK: vmovdqu16 (%rcx), %zmm17 +// CHECK: encoding: [0x62,0xe1,0xff,0x48,0x6f,0x09] + vmovdqu16 (%rcx), %zmm17 + +// CHECK: vmovdqu16 291(%rax,%r14,8), %zmm17 +// CHECK: encoding: [0x62,0xa1,0xff,0x48,0x6f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovdqu16 291(%rax,%r14,8), %zmm17 + +// CHECK: vmovdqu16 8128(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe1,0xff,0x48,0x6f,0x4a,0x7f] + vmovdqu16 8128(%rdx), %zmm17 + +// CHECK: vmovdqu16 8192(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe1,0xff,0x48,0x6f,0x8a,0x00,0x20,0x00,0x00] + vmovdqu16 8192(%rdx), %zmm17 + +// CHECK: vmovdqu16 -8192(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe1,0xff,0x48,0x6f,0x4a,0x80] + vmovdqu16 -8192(%rdx), %zmm17 + +// CHECK: vmovdqu16 -8256(%rdx), %zmm17 +// CHECK: encoding: [0x62,0xe1,0xff,0x48,0x6f,0x8a,0xc0,0xdf,0xff,0xff] + vmovdqu16 -8256(%rdx), %zmm17 + +// CHECK: kandq %k7, %k5, %k5 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x41,0xef] + kandq %k7, %k5, %k5 + +// CHECK: kandd %k4, %k5, %k5 +// CHECK: encoding: [0xc4,0xe1,0xd5,0x41,0xec] + kandd %k4, %k5, %k5 + +// CHECK: kandnq %k4, %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x42,0xd4] + kandnq %k4, %k5, %k2 + +// CHECK: kandnd %k6, %k6, %k3 +// CHECK: encoding: [0xc4,0xe1,0xcd,0x42,0xde] + kandnd %k6, %k6, %k3 + +// CHECK: korq %k4, %k5, %k4 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x45,0xe4] + korq %k4, %k5, %k4 + +// CHECK: kord %k6, %k6, %k5 +// CHECK: encoding: [0xc4,0xe1,0xcd,0x45,0xee] + kord %k6, %k6, %k5 + +// CHECK: kxnorq %k6, %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xd4,0x46,0xd6] + kxnorq %k6, %k5, %k2 + +// CHECK: kxnord %k5, %k3, %k5 +// CHECK: encoding: [0xc4,0xe1,0xe5,0x46,0xed] + kxnord %k5, %k3, %k5 + +// CHECK: kxorq %k4, %k3, %k2 +// CHECK: encoding: [0xc4,0xe1,0xe4,0x47,0xd4] + kxorq %k4, %k3, %k2 + +// CHECK: kxord %k6, %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xd5,0x47,0xd6] + kxord %k6, %k5, %k2 + +// CHECK: knotq %k6, %k3 +// CHECK: encoding: [0xc4,0xe1,0xf8,0x44,0xde] + knotq %k6, %k3 + +// CHECK: knotd %k4, %k3 +// CHECK: encoding: [0xc4,0xe1,0xf9,0x44,0xdc] + knotd %k4, %k3 + +// CHECK: kmovq %k5, %k2 +// CHECK: encoding: [0xc4,0xe1,0xf8,0x90,0xd5] + kmovq %k5, %k2 + +// CHECK: kmovq (%rcx), %k2 +// CHECK: encoding: [0xc4,0xe1,0xf8,0x90,0x11] + kmovq (%rcx), %k2 + +// CHECK: kmovq 291(%rax,%r14,8), %k2 +// CHECK: encoding: [0xc4,0xa1,0xf8,0x90,0x94,0xf0,0x23,0x01,0x00,0x00] + kmovq 291(%rax,%r14,8), %k2 + +// CHECK: kmovd %k4, %k5 +// CHECK: encoding: [0xc4,0xe1,0xf9,0x90,0xec] + kmovd %k4, %k5 + +// CHECK: kmovd (%rcx), %k5 +// CHECK: encoding: [0xc4,0xe1,0xf9,0x90,0x29] + kmovd (%rcx), %k5 + +// CHECK: kmovd 291(%rax,%r14,8), %k5 +// CHECK: encoding: [0xc4,0xa1,0xf9,0x90,0xac,0xf0,0x23,0x01,0x00,0x00] + kmovd 291(%rax,%r14,8), %k5 + +// CHECK: kmovq %k3, (%rcx) +// CHECK: encoding: [0xc4,0xe1,0xf8,0x91,0x19] + kmovq %k3, (%rcx) + +// CHECK: kmovq %k3, 291(%rax,%r14,8) +// CHECK: encoding: [0xc4,0xa1,0xf8,0x91,0x9c,0xf0,0x23,0x01,0x00,0x00] + kmovq %k3, 291(%rax,%r14,8) + +// CHECK: kmovd %k3, (%rcx) +// CHECK: encoding: [0xc4,0xe1,0xf9,0x91,0x19] + kmovd %k3, (%rcx) + +// CHECK: kmovd %k3, 291(%rax,%r14,8) +// CHECK: encoding: [0xc4,0xa1,0xf9,0x91,0x9c,0xf0,0x23,0x01,0x00,0x00] + kmovd %k3, 291(%rax,%r14,8) + +// CHECK: kmovq %rax, %k2 +// CHECK: encoding: [0xc4,0xe1,0xfb,0x92,0xd0] + kmovq %rax, %k2 + +// CHECK: kmovq %r8, %k2 +// CHECK: encoding: [0xc4,0xc1,0xfb,0x92,0xd0] + kmovq %r8, %k2 + +// CHECK: kmovd %eax, %k4 +// CHECK: encoding: [0xc5,0xfb,0x92,0xe0] + kmovd %eax, %k4 + +// CHECK: kmovd %ebp, %k4 +// CHECK: encoding: [0xc5,0xfb,0x92,0xe5] + kmovd %ebp, %k4 + +// CHECK: kmovd %r13d, %k4 +// CHECK: encoding: [0xc4,0xc1,0x7b,0x92,0xe5] + kmovd %r13d, %k4 + +// CHECK: kmovq %k3, %rax +// CHECK: encoding: [0xc4,0xe1,0xfb,0x93,0xc3] + kmovq %k3, %rax + +// CHECK: kmovq %k3, %r8 +// CHECK: encoding: [0xc4,0x61,0xfb,0x93,0xc3] + kmovq %k3, %r8 + +// CHECK: kmovd %k5, %eax +// CHECK: encoding: [0xc5,0xfb,0x93,0xc5] + kmovd %k5, %eax + +// CHECK: kmovd %k5, %ebp +// CHECK: encoding: [0xc5,0xfb,0x93,0xed] + kmovd %k5, %ebp + +// CHECK: kmovd %k5, %r13d +// CHECK: encoding: [0xc5,0x7b,0x93,0xed] + kmovd %k5, %r13d + +// CHECK: vmovdqu8 %zmm18, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x48,0x7f,0x11] + vmovdqu8 %zmm18, (%rcx) + +// CHECK: vmovdqu8 %zmm18, (%rcx) {%k3} +// CHECK: encoding: [0x62,0xe1,0x7f,0x4b,0x7f,0x11] + vmovdqu8 %zmm18, (%rcx) {%k3} + +// CHECK: vmovdqu8 %zmm18, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7f,0x48,0x7f,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovdqu8 %zmm18, 291(%rax,%r14,8) + +// CHECK: vmovdqu8 %zmm18, 8128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x48,0x7f,0x52,0x7f] + vmovdqu8 %zmm18, 8128(%rdx) + +// CHECK: vmovdqu8 %zmm18, 8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x48,0x7f,0x92,0x00,0x20,0x00,0x00] + vmovdqu8 %zmm18, 8192(%rdx) + +// CHECK: vmovdqu8 %zmm18, -8192(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x48,0x7f,0x52,0x80] + vmovdqu8 %zmm18, -8192(%rdx) + +// CHECK: vmovdqu8 %zmm18, -8256(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x48,0x7f,0x92,0xc0,0xdf,0xff,0xff] + vmovdqu8 %zmm18, -8256(%rdx) + +// CHECK: vmovdqu16 %zmm28, (%rcx) +// CHECK: encoding: [0x62,0x61,0xff,0x48,0x7f,0x21] + vmovdqu16 %zmm28, (%rcx) + +// CHECK: vmovdqu16 %zmm28, (%rcx) {%k6} +// CHECK: encoding: [0x62,0x61,0xff,0x4e,0x7f,0x21] + vmovdqu16 %zmm28, (%rcx) {%k6} + +// CHECK: vmovdqu16 %zmm28, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0xff,0x48,0x7f,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovdqu16 %zmm28, 291(%rax,%r14,8) + +// CHECK: vmovdqu16 %zmm28, 8128(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x48,0x7f,0x62,0x7f] + vmovdqu16 %zmm28, 8128(%rdx) + +// CHECK: vmovdqu16 %zmm28, 8192(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x48,0x7f,0xa2,0x00,0x20,0x00,0x00] + vmovdqu16 %zmm28, 8192(%rdx) + +// CHECK: vmovdqu16 %zmm28, -8192(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x48,0x7f,0x62,0x80] + vmovdqu16 %zmm28, -8192(%rdx) + +// CHECK: vmovdqu16 %zmm28, -8256(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x48,0x7f,0xa2,0xc0,0xdf,0xff,0xff] + vmovdqu16 %zmm28, -8256(%rdx) + +// CHECK: vpcmpb $171, %zmm25, %zmm26, %k3 +// CHECK: encoding: [0x62,0x93,0x2d,0x40,0x3f,0xd9,0xab] + vpcmpb $171, %zmm25, %zmm26, %k3 + +// CHECK: vpcmpb $171, %zmm25, %zmm26, %k3 {%k7} +// CHECK: encoding: [0x62,0x93,0x2d,0x47,0x3f,0xd9,0xab] + vpcmpb $171, %zmm25, %zmm26, %k3 {%k7} + +// CHECK: vpcmpb $123, %zmm25, %zmm26, %k3 +// CHECK: encoding: [0x62,0x93,0x2d,0x40,0x3f,0xd9,0x7b] + vpcmpb $123, %zmm25, %zmm26, %k3 + +// CHECK: vpcmpb $123, (%rcx), %zmm26, %k3 +// CHECK: encoding: [0x62,0xf3,0x2d,0x40,0x3f,0x19,0x7b] + vpcmpb $123, (%rcx), %zmm26, %k3 + +// CHECK: vpcmpb $123, 291(%rax,%r14,8), %zmm26, %k3 +// CHECK: encoding: [0x62,0xb3,0x2d,0x40,0x3f,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpb $123, 291(%rax,%r14,8), %zmm26, %k3 + +// CHECK: vpcmpb $123, 8128(%rdx), %zmm26, %k3 +// CHECK: encoding: [0x62,0xf3,0x2d,0x40,0x3f,0x5a,0x7f,0x7b] + vpcmpb $123, 8128(%rdx), %zmm26, %k3 + +// CHECK: vpcmpb $123, 8192(%rdx), %zmm26, %k3 +// CHECK: encoding: [0x62,0xf3,0x2d,0x40,0x3f,0x9a,0x00,0x20,0x00,0x00,0x7b] + vpcmpb $123, 8192(%rdx), %zmm26, %k3 + +// CHECK: vpcmpb $123, -8192(%rdx), %zmm26, %k3 +// CHECK: encoding: [0x62,0xf3,0x2d,0x40,0x3f,0x5a,0x80,0x7b] + vpcmpb $123, -8192(%rdx), %zmm26, %k3 + +// CHECK: vpcmpb $123, -8256(%rdx), %zmm26, %k3 +// CHECK: encoding: [0x62,0xf3,0x2d,0x40,0x3f,0x9a,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpb $123, -8256(%rdx), %zmm26, %k3 + +// CHECK: vpcmpw $171, %zmm25, %zmm29, %k3 +// CHECK: encoding: [0x62,0x93,0x95,0x40,0x3f,0xd9,0xab] + vpcmpw $171, %zmm25, %zmm29, %k3 + +// CHECK: vpcmpw $171, %zmm25, %zmm29, %k3 {%k6} +// CHECK: encoding: [0x62,0x93,0x95,0x46,0x3f,0xd9,0xab] + vpcmpw $171, %zmm25, %zmm29, %k3 {%k6} + +// CHECK: vpcmpw $123, %zmm25, %zmm29, %k3 +// CHECK: encoding: [0x62,0x93,0x95,0x40,0x3f,0xd9,0x7b] + vpcmpw $123, %zmm25, %zmm29, %k3 + +// CHECK: vpcmpw $123, (%rcx), %zmm29, %k3 +// CHECK: encoding: [0x62,0xf3,0x95,0x40,0x3f,0x19,0x7b] + vpcmpw $123, (%rcx), %zmm29, %k3 + +// CHECK: vpcmpw $123, 291(%rax,%r14,8), %zmm29, %k3 +// CHECK: encoding: [0x62,0xb3,0x95,0x40,0x3f,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpw $123, 291(%rax,%r14,8), %zmm29, %k3 + +// CHECK: vpcmpw $123, 8128(%rdx), %zmm29, %k3 +// CHECK: encoding: [0x62,0xf3,0x95,0x40,0x3f,0x5a,0x7f,0x7b] + vpcmpw $123, 8128(%rdx), %zmm29, %k3 + +// CHECK: vpcmpw $123, 8192(%rdx), %zmm29, %k3 +// CHECK: encoding: [0x62,0xf3,0x95,0x40,0x3f,0x9a,0x00,0x20,0x00,0x00,0x7b] + vpcmpw $123, 8192(%rdx), %zmm29, %k3 + +// CHECK: vpcmpw $123, -8192(%rdx), %zmm29, %k3 +// CHECK: encoding: [0x62,0xf3,0x95,0x40,0x3f,0x5a,0x80,0x7b] + vpcmpw $123, -8192(%rdx), %zmm29, %k3 + +// CHECK: vpcmpw $123, -8256(%rdx), %zmm29, %k3 +// CHECK: encoding: [0x62,0xf3,0x95,0x40,0x3f,0x9a,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpw $123, -8256(%rdx), %zmm29, %k3 + +// CHECK: vpcmpub $171, %zmm22, %zmm29, %k4 +// CHECK: encoding: [0x62,0xb3,0x15,0x40,0x3e,0xe6,0xab] + vpcmpub $171, %zmm22, %zmm29, %k4 + +// CHECK: vpcmpub $171, %zmm22, %zmm29, %k4 {%k7} +// CHECK: encoding: [0x62,0xb3,0x15,0x47,0x3e,0xe6,0xab] + vpcmpub $171, %zmm22, %zmm29, %k4 {%k7} + +// CHECK: vpcmpub $123, %zmm22, %zmm29, %k4 +// CHECK: encoding: [0x62,0xb3,0x15,0x40,0x3e,0xe6,0x7b] + vpcmpub $123, %zmm22, %zmm29, %k4 + +// CHECK: vpcmpub $123, (%rcx), %zmm29, %k4 +// CHECK: encoding: [0x62,0xf3,0x15,0x40,0x3e,0x21,0x7b] + vpcmpub $123, (%rcx), %zmm29, %k4 + +// CHECK: vpcmpub $123, 291(%rax,%r14,8), %zmm29, %k4 +// CHECK: encoding: [0x62,0xb3,0x15,0x40,0x3e,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpub $123, 291(%rax,%r14,8), %zmm29, %k4 + +// CHECK: vpcmpub $123, 8128(%rdx), %zmm29, %k4 +// CHECK: encoding: [0x62,0xf3,0x15,0x40,0x3e,0x62,0x7f,0x7b] + vpcmpub $123, 8128(%rdx), %zmm29, %k4 + +// CHECK: vpcmpub $123, 8192(%rdx), %zmm29, %k4 +// CHECK: encoding: [0x62,0xf3,0x15,0x40,0x3e,0xa2,0x00,0x20,0x00,0x00,0x7b] + vpcmpub $123, 8192(%rdx), %zmm29, %k4 + +// CHECK: vpcmpub $123, -8192(%rdx), %zmm29, %k4 +// CHECK: encoding: [0x62,0xf3,0x15,0x40,0x3e,0x62,0x80,0x7b] + vpcmpub $123, -8192(%rdx), %zmm29, %k4 + +// CHECK: vpcmpub $123, -8256(%rdx), %zmm29, %k4 +// CHECK: encoding: [0x62,0xf3,0x15,0x40,0x3e,0xa2,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpub $123, -8256(%rdx), %zmm29, %k4 + +// CHECK: vpcmpuw $171, %zmm22, %zmm22, %k4 +// CHECK: encoding: [0x62,0xb3,0xcd,0x40,0x3e,0xe6,0xab] + vpcmpuw $171, %zmm22, %zmm22, %k4 + +// CHECK: vpcmpuw $171, %zmm22, %zmm22, %k4 {%k7} +// CHECK: encoding: [0x62,0xb3,0xcd,0x47,0x3e,0xe6,0xab] + vpcmpuw $171, %zmm22, %zmm22, %k4 {%k7} + +// CHECK: vpcmpuw $123, %zmm22, %zmm22, %k4 +// CHECK: encoding: [0x62,0xb3,0xcd,0x40,0x3e,0xe6,0x7b] + vpcmpuw $123, %zmm22, %zmm22, %k4 + +// CHECK: vpcmpuw $123, (%rcx), %zmm22, %k4 +// CHECK: encoding: [0x62,0xf3,0xcd,0x40,0x3e,0x21,0x7b] + vpcmpuw $123, (%rcx), %zmm22, %k4 + +// CHECK: vpcmpuw $123, 291(%rax,%r14,8), %zmm22, %k4 +// CHECK: encoding: [0x62,0xb3,0xcd,0x40,0x3e,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpuw $123, 291(%rax,%r14,8), %zmm22, %k4 + +// CHECK: vpcmpuw $123, 8128(%rdx), %zmm22, %k4 +// CHECK: encoding: [0x62,0xf3,0xcd,0x40,0x3e,0x62,0x7f,0x7b] + vpcmpuw $123, 8128(%rdx), %zmm22, %k4 + +// CHECK: vpcmpuw $123, 8192(%rdx), %zmm22, %k4 +// CHECK: encoding: [0x62,0xf3,0xcd,0x40,0x3e,0xa2,0x00,0x20,0x00,0x00,0x7b] + vpcmpuw $123, 8192(%rdx), %zmm22, %k4 + +// CHECK: vpcmpuw $123, -8192(%rdx), %zmm22, %k4 +// CHECK: encoding: [0x62,0xf3,0xcd,0x40,0x3e,0x62,0x80,0x7b] + vpcmpuw $123, -8192(%rdx), %zmm22, %k4 + +// CHECK: vpcmpuw $123, -8256(%rdx), %zmm22, %k4 +// CHECK: encoding: [0x62,0xf3,0xcd,0x40,0x3e,0xa2,0xc0,0xdf,0xff,0xff,0x7b] + vpcmpuw $123, -8256(%rdx), %zmm22, %k4 diff --git a/test/MC/X86/x86-64-avx512bw_vl.s b/test/MC/X86/x86-64-avx512bw_vl.s new file mode 100644 index 0000000..c3761de --- /dev/null +++ b/test/MC/X86/x86-64-avx512bw_vl.s @@ -0,0 +1,1737 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-encoding %s | FileCheck %s + +// CHECK: vpaddb %xmm22, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x21,0x75,0x00,0xfc,0xd6] + vpaddb %xmm22, %xmm17, %xmm26 + +// CHECK: vpaddb %xmm22, %xmm17, %xmm26 {%k5} +// CHECK: encoding: [0x62,0x21,0x75,0x05,0xfc,0xd6] + vpaddb %xmm22, %xmm17, %xmm26 {%k5} + +// CHECK: vpaddb %xmm22, %xmm17, %xmm26 {%k5} {z} +// CHECK: encoding: [0x62,0x21,0x75,0x85,0xfc,0xd6] + vpaddb %xmm22, %xmm17, %xmm26 {%k5} {z} + +// CHECK: vpaddb (%rcx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xfc,0x11] + vpaddb (%rcx), %xmm17, %xmm26 + +// CHECK: vpaddb 291(%rax,%r14,8), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x21,0x75,0x00,0xfc,0x94,0xf0,0x23,0x01,0x00,0x00] + vpaddb 291(%rax,%r14,8), %xmm17, %xmm26 + +// CHECK: vpaddb 2032(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xfc,0x52,0x7f] + vpaddb 2032(%rdx), %xmm17, %xmm26 + +// CHECK: vpaddb 2048(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xfc,0x92,0x00,0x08,0x00,0x00] + vpaddb 2048(%rdx), %xmm17, %xmm26 + +// CHECK: vpaddb -2048(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xfc,0x52,0x80] + vpaddb -2048(%rdx), %xmm17, %xmm26 + +// CHECK: vpaddb -2064(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xfc,0x92,0xf0,0xf7,0xff,0xff] + vpaddb -2064(%rdx), %xmm17, %xmm26 + +// CHECK: vpaddb %ymm28, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x01,0x25,0x20,0xfc,0xd4] + vpaddb %ymm28, %ymm27, %ymm26 + +// CHECK: vpaddb %ymm28, %ymm27, %ymm26 {%k3} +// CHECK: encoding: [0x62,0x01,0x25,0x23,0xfc,0xd4] + vpaddb %ymm28, %ymm27, %ymm26 {%k3} + +// CHECK: vpaddb %ymm28, %ymm27, %ymm26 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x25,0xa3,0xfc,0xd4] + vpaddb %ymm28, %ymm27, %ymm26 {%k3} {z} + +// CHECK: vpaddb (%rcx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xfc,0x11] + vpaddb (%rcx), %ymm27, %ymm26 + +// CHECK: vpaddb 291(%rax,%r14,8), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x21,0x25,0x20,0xfc,0x94,0xf0,0x23,0x01,0x00,0x00] + vpaddb 291(%rax,%r14,8), %ymm27, %ymm26 + +// CHECK: vpaddb 4064(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xfc,0x52,0x7f] + vpaddb 4064(%rdx), %ymm27, %ymm26 + +// CHECK: vpaddb 4096(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xfc,0x92,0x00,0x10,0x00,0x00] + vpaddb 4096(%rdx), %ymm27, %ymm26 + +// CHECK: vpaddb -4096(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xfc,0x52,0x80] + vpaddb -4096(%rdx), %ymm27, %ymm26 + +// CHECK: vpaddb -4128(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xfc,0x92,0xe0,0xef,0xff,0xff] + vpaddb -4128(%rdx), %ymm27, %ymm26 + +// CHECK: vpaddw %xmm18, %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xa1,0x75,0x00,0xfd,0xd2] + vpaddw %xmm18, %xmm17, %xmm18 + +// CHECK: vpaddw %xmm18, %xmm17, %xmm18 {%k1} +// CHECK: encoding: [0x62,0xa1,0x75,0x01,0xfd,0xd2] + vpaddw %xmm18, %xmm17, %xmm18 {%k1} + +// CHECK: vpaddw %xmm18, %xmm17, %xmm18 {%k1} {z} +// CHECK: encoding: [0x62,0xa1,0x75,0x81,0xfd,0xd2] + vpaddw %xmm18, %xmm17, %xmm18 {%k1} {z} + +// CHECK: vpaddw (%rcx), %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xfd,0x11] + vpaddw (%rcx), %xmm17, %xmm18 + +// CHECK: vpaddw 291(%rax,%r14,8), %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xa1,0x75,0x00,0xfd,0x94,0xf0,0x23,0x01,0x00,0x00] + vpaddw 291(%rax,%r14,8), %xmm17, %xmm18 + +// CHECK: vpaddw 2032(%rdx), %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xfd,0x52,0x7f] + vpaddw 2032(%rdx), %xmm17, %xmm18 + +// CHECK: vpaddw 2048(%rdx), %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xfd,0x92,0x00,0x08,0x00,0x00] + vpaddw 2048(%rdx), %xmm17, %xmm18 + +// CHECK: vpaddw -2048(%rdx), %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xfd,0x52,0x80] + vpaddw -2048(%rdx), %xmm17, %xmm18 + +// CHECK: vpaddw -2064(%rdx), %xmm17, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xfd,0x92,0xf0,0xf7,0xff,0xff] + vpaddw -2064(%rdx), %xmm17, %xmm18 + +// CHECK: vpaddw %ymm26, %ymm21, %ymm23 +// CHECK: encoding: [0x62,0x81,0x55,0x20,0xfd,0xfa] + vpaddw %ymm26, %ymm21, %ymm23 + +// CHECK: vpaddw %ymm26, %ymm21, %ymm23 {%k7} +// CHECK: encoding: [0x62,0x81,0x55,0x27,0xfd,0xfa] + vpaddw %ymm26, %ymm21, %ymm23 {%k7} + +// CHECK: vpaddw %ymm26, %ymm21, %ymm23 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0x55,0xa7,0xfd,0xfa] + vpaddw %ymm26, %ymm21, %ymm23 {%k7} {z} + +// CHECK: vpaddw (%rcx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xfd,0x39] + vpaddw (%rcx), %ymm21, %ymm23 + +// CHECK: vpaddw 291(%rax,%r14,8), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xa1,0x55,0x20,0xfd,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpaddw 291(%rax,%r14,8), %ymm21, %ymm23 + +// CHECK: vpaddw 4064(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xfd,0x7a,0x7f] + vpaddw 4064(%rdx), %ymm21, %ymm23 + +// CHECK: vpaddw 4096(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xfd,0xba,0x00,0x10,0x00,0x00] + vpaddw 4096(%rdx), %ymm21, %ymm23 + +// CHECK: vpaddw -4096(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xfd,0x7a,0x80] + vpaddw -4096(%rdx), %ymm21, %ymm23 + +// CHECK: vpaddw -4128(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xfd,0xba,0xe0,0xef,0xff,0xff] + vpaddw -4128(%rdx), %ymm21, %ymm23 + +// CHECK: vpcmpeqb %xmm21, %xmm21, %k4 +// CHECK: encoding: [0x62,0xb1,0x55,0x00,0x74,0xe5] + vpcmpeqb %xmm21, %xmm21, %k4 + +// CHECK: vpcmpeqb %xmm21, %xmm21, %k4 {%k3} +// CHECK: encoding: [0x62,0xb1,0x55,0x03,0x74,0xe5] + vpcmpeqb %xmm21, %xmm21, %k4 {%k3} + +// CHECK: vpcmpeqb (%rcx), %xmm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x00,0x74,0x21] + vpcmpeqb (%rcx), %xmm21, %k4 + +// CHECK: vpcmpeqb 291(%rax,%r14,8), %xmm21, %k4 +// CHECK: encoding: [0x62,0xb1,0x55,0x00,0x74,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqb 291(%rax,%r14,8), %xmm21, %k4 + +// CHECK: vpcmpeqb 2032(%rdx), %xmm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x00,0x74,0x62,0x7f] + vpcmpeqb 2032(%rdx), %xmm21, %k4 + +// CHECK: vpcmpeqb 2048(%rdx), %xmm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x00,0x74,0xa2,0x00,0x08,0x00,0x00] + vpcmpeqb 2048(%rdx), %xmm21, %k4 + +// CHECK: vpcmpeqb -2048(%rdx), %xmm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x00,0x74,0x62,0x80] + vpcmpeqb -2048(%rdx), %xmm21, %k4 + +// CHECK: vpcmpeqb -2064(%rdx), %xmm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x00,0x74,0xa2,0xf0,0xf7,0xff,0xff] + vpcmpeqb -2064(%rdx), %xmm21, %k4 + +// CHECK: vpcmpeqb %ymm18, %ymm21, %k4 +// CHECK: encoding: [0x62,0xb1,0x55,0x20,0x74,0xe2] + vpcmpeqb %ymm18, %ymm21, %k4 + +// CHECK: vpcmpeqb %ymm18, %ymm21, %k4 {%k1} +// CHECK: encoding: [0x62,0xb1,0x55,0x21,0x74,0xe2] + vpcmpeqb %ymm18, %ymm21, %k4 {%k1} + +// CHECK: vpcmpeqb (%rcx), %ymm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x20,0x74,0x21] + vpcmpeqb (%rcx), %ymm21, %k4 + +// CHECK: vpcmpeqb 291(%rax,%r14,8), %ymm21, %k4 +// CHECK: encoding: [0x62,0xb1,0x55,0x20,0x74,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqb 291(%rax,%r14,8), %ymm21, %k4 + +// CHECK: vpcmpeqb 4064(%rdx), %ymm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x20,0x74,0x62,0x7f] + vpcmpeqb 4064(%rdx), %ymm21, %k4 + +// CHECK: vpcmpeqb 4096(%rdx), %ymm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x20,0x74,0xa2,0x00,0x10,0x00,0x00] + vpcmpeqb 4096(%rdx), %ymm21, %k4 + +// CHECK: vpcmpeqb -4096(%rdx), %ymm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x20,0x74,0x62,0x80] + vpcmpeqb -4096(%rdx), %ymm21, %k4 + +// CHECK: vpcmpeqb -4128(%rdx), %ymm21, %k4 +// CHECK: encoding: [0x62,0xf1,0x55,0x20,0x74,0xa2,0xe0,0xef,0xff,0xff] + vpcmpeqb -4128(%rdx), %ymm21, %k4 + +// CHECK: vpcmpeqw %xmm27, %xmm30, %k3 +// CHECK: encoding: [0x62,0x91,0x0d,0x00,0x75,0xdb] + vpcmpeqw %xmm27, %xmm30, %k3 + +// CHECK: vpcmpeqw %xmm27, %xmm30, %k3 {%k1} +// CHECK: encoding: [0x62,0x91,0x0d,0x01,0x75,0xdb] + vpcmpeqw %xmm27, %xmm30, %k3 {%k1} + +// CHECK: vpcmpeqw (%rcx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x75,0x19] + vpcmpeqw (%rcx), %xmm30, %k3 + +// CHECK: vpcmpeqw 291(%rax,%r14,8), %xmm30, %k3 +// CHECK: encoding: [0x62,0xb1,0x0d,0x00,0x75,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqw 291(%rax,%r14,8), %xmm30, %k3 + +// CHECK: vpcmpeqw 2032(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x75,0x5a,0x7f] + vpcmpeqw 2032(%rdx), %xmm30, %k3 + +// CHECK: vpcmpeqw 2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x75,0x9a,0x00,0x08,0x00,0x00] + vpcmpeqw 2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpeqw -2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x75,0x5a,0x80] + vpcmpeqw -2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpeqw -2064(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x75,0x9a,0xf0,0xf7,0xff,0xff] + vpcmpeqw -2064(%rdx), %xmm30, %k3 + +// CHECK: vpcmpeqw %ymm29, %ymm20, %k2 +// CHECK: encoding: [0x62,0x91,0x5d,0x20,0x75,0xd5] + vpcmpeqw %ymm29, %ymm20, %k2 + +// CHECK: vpcmpeqw %ymm29, %ymm20, %k2 {%k5} +// CHECK: encoding: [0x62,0x91,0x5d,0x25,0x75,0xd5] + vpcmpeqw %ymm29, %ymm20, %k2 {%k5} + +// CHECK: vpcmpeqw (%rcx), %ymm20, %k2 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x75,0x11] + vpcmpeqw (%rcx), %ymm20, %k2 + +// CHECK: vpcmpeqw 291(%rax,%r14,8), %ymm20, %k2 +// CHECK: encoding: [0x62,0xb1,0x5d,0x20,0x75,0x94,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqw 291(%rax,%r14,8), %ymm20, %k2 + +// CHECK: vpcmpeqw 4064(%rdx), %ymm20, %k2 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x75,0x52,0x7f] + vpcmpeqw 4064(%rdx), %ymm20, %k2 + +// CHECK: vpcmpeqw 4096(%rdx), %ymm20, %k2 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x75,0x92,0x00,0x10,0x00,0x00] + vpcmpeqw 4096(%rdx), %ymm20, %k2 + +// CHECK: vpcmpeqw -4096(%rdx), %ymm20, %k2 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x75,0x52,0x80] + vpcmpeqw -4096(%rdx), %ymm20, %k2 + +// CHECK: vpcmpeqw -4128(%rdx), %ymm20, %k2 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x75,0x92,0xe0,0xef,0xff,0xff] + vpcmpeqw -4128(%rdx), %ymm20, %k2 + +// CHECK: vpcmpgtb %xmm17, %xmm30, %k3 +// CHECK: encoding: [0x62,0xb1,0x0d,0x00,0x64,0xd9] + vpcmpgtb %xmm17, %xmm30, %k3 + +// CHECK: vpcmpgtb %xmm17, %xmm30, %k3 {%k7} +// CHECK: encoding: [0x62,0xb1,0x0d,0x07,0x64,0xd9] + vpcmpgtb %xmm17, %xmm30, %k3 {%k7} + +// CHECK: vpcmpgtb (%rcx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x64,0x19] + vpcmpgtb (%rcx), %xmm30, %k3 + +// CHECK: vpcmpgtb 291(%rax,%r14,8), %xmm30, %k3 +// CHECK: encoding: [0x62,0xb1,0x0d,0x00,0x64,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtb 291(%rax,%r14,8), %xmm30, %k3 + +// CHECK: vpcmpgtb 2032(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x64,0x5a,0x7f] + vpcmpgtb 2032(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtb 2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x64,0x9a,0x00,0x08,0x00,0x00] + vpcmpgtb 2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtb -2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x64,0x5a,0x80] + vpcmpgtb -2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtb -2064(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x64,0x9a,0xf0,0xf7,0xff,0xff] + vpcmpgtb -2064(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtb %ymm17, %ymm17, %k2 +// CHECK: encoding: [0x62,0xb1,0x75,0x20,0x64,0xd1] + vpcmpgtb %ymm17, %ymm17, %k2 + +// CHECK: vpcmpgtb %ymm17, %ymm17, %k2 {%k4} +// CHECK: encoding: [0x62,0xb1,0x75,0x24,0x64,0xd1] + vpcmpgtb %ymm17, %ymm17, %k2 {%k4} + +// CHECK: vpcmpgtb (%rcx), %ymm17, %k2 +// CHECK: encoding: [0x62,0xf1,0x75,0x20,0x64,0x11] + vpcmpgtb (%rcx), %ymm17, %k2 + +// CHECK: vpcmpgtb 291(%rax,%r14,8), %ymm17, %k2 +// CHECK: encoding: [0x62,0xb1,0x75,0x20,0x64,0x94,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtb 291(%rax,%r14,8), %ymm17, %k2 + +// CHECK: vpcmpgtb 4064(%rdx), %ymm17, %k2 +// CHECK: encoding: [0x62,0xf1,0x75,0x20,0x64,0x52,0x7f] + vpcmpgtb 4064(%rdx), %ymm17, %k2 + +// CHECK: vpcmpgtb 4096(%rdx), %ymm17, %k2 +// CHECK: encoding: [0x62,0xf1,0x75,0x20,0x64,0x92,0x00,0x10,0x00,0x00] + vpcmpgtb 4096(%rdx), %ymm17, %k2 + +// CHECK: vpcmpgtb -4096(%rdx), %ymm17, %k2 +// CHECK: encoding: [0x62,0xf1,0x75,0x20,0x64,0x52,0x80] + vpcmpgtb -4096(%rdx), %ymm17, %k2 + +// CHECK: vpcmpgtb -4128(%rdx), %ymm17, %k2 +// CHECK: encoding: [0x62,0xf1,0x75,0x20,0x64,0x92,0xe0,0xef,0xff,0xff] + vpcmpgtb -4128(%rdx), %ymm17, %k2 + +// CHECK: vpcmpgtw %xmm22, %xmm28, %k2 +// CHECK: encoding: [0x62,0xb1,0x1d,0x00,0x65,0xd6] + vpcmpgtw %xmm22, %xmm28, %k2 + +// CHECK: vpcmpgtw %xmm22, %xmm28, %k2 {%k7} +// CHECK: encoding: [0x62,0xb1,0x1d,0x07,0x65,0xd6] + vpcmpgtw %xmm22, %xmm28, %k2 {%k7} + +// CHECK: vpcmpgtw (%rcx), %xmm28, %k2 +// CHECK: encoding: [0x62,0xf1,0x1d,0x00,0x65,0x11] + vpcmpgtw (%rcx), %xmm28, %k2 + +// CHECK: vpcmpgtw 291(%rax,%r14,8), %xmm28, %k2 +// CHECK: encoding: [0x62,0xb1,0x1d,0x00,0x65,0x94,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtw 291(%rax,%r14,8), %xmm28, %k2 + +// CHECK: vpcmpgtw 2032(%rdx), %xmm28, %k2 +// CHECK: encoding: [0x62,0xf1,0x1d,0x00,0x65,0x52,0x7f] + vpcmpgtw 2032(%rdx), %xmm28, %k2 + +// CHECK: vpcmpgtw 2048(%rdx), %xmm28, %k2 +// CHECK: encoding: [0x62,0xf1,0x1d,0x00,0x65,0x92,0x00,0x08,0x00,0x00] + vpcmpgtw 2048(%rdx), %xmm28, %k2 + +// CHECK: vpcmpgtw -2048(%rdx), %xmm28, %k2 +// CHECK: encoding: [0x62,0xf1,0x1d,0x00,0x65,0x52,0x80] + vpcmpgtw -2048(%rdx), %xmm28, %k2 + +// CHECK: vpcmpgtw -2064(%rdx), %xmm28, %k2 +// CHECK: encoding: [0x62,0xf1,0x1d,0x00,0x65,0x92,0xf0,0xf7,0xff,0xff] + vpcmpgtw -2064(%rdx), %xmm28, %k2 + +// CHECK: vpcmpgtw %ymm26, %ymm20, %k5 +// CHECK: encoding: [0x62,0x91,0x5d,0x20,0x65,0xea] + vpcmpgtw %ymm26, %ymm20, %k5 + +// CHECK: vpcmpgtw %ymm26, %ymm20, %k5 {%k2} +// CHECK: encoding: [0x62,0x91,0x5d,0x22,0x65,0xea] + vpcmpgtw %ymm26, %ymm20, %k5 {%k2} + +// CHECK: vpcmpgtw (%rcx), %ymm20, %k5 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x65,0x29] + vpcmpgtw (%rcx), %ymm20, %k5 + +// CHECK: vpcmpgtw 291(%rax,%r14,8), %ymm20, %k5 +// CHECK: encoding: [0x62,0xb1,0x5d,0x20,0x65,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtw 291(%rax,%r14,8), %ymm20, %k5 + +// CHECK: vpcmpgtw 4064(%rdx), %ymm20, %k5 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x65,0x6a,0x7f] + vpcmpgtw 4064(%rdx), %ymm20, %k5 + +// CHECK: vpcmpgtw 4096(%rdx), %ymm20, %k5 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x65,0xaa,0x00,0x10,0x00,0x00] + vpcmpgtw 4096(%rdx), %ymm20, %k5 + +// CHECK: vpcmpgtw -4096(%rdx), %ymm20, %k5 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x65,0x6a,0x80] + vpcmpgtw -4096(%rdx), %ymm20, %k5 + +// CHECK: vpcmpgtw -4128(%rdx), %ymm20, %k5 +// CHECK: encoding: [0x62,0xf1,0x5d,0x20,0x65,0xaa,0xe0,0xef,0xff,0xff] + vpcmpgtw -4128(%rdx), %ymm20, %k5 + +// CHECK: vpcmpb $171, %xmm17, %xmm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x0d,0x00,0x3f,0xd9,0xab] + vpcmpb $171, %xmm17, %xmm30, %k3 + +// CHECK: vpcmpb $171, %xmm17, %xmm30, %k3 {%k1} +// CHECK: encoding: [0x62,0xb3,0x0d,0x01,0x3f,0xd9,0xab] + vpcmpb $171, %xmm17, %xmm30, %k3 {%k1} + +// CHECK: vpcmpb $123, %xmm17, %xmm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x0d,0x00,0x3f,0xd9,0x7b] + vpcmpb $123, %xmm17, %xmm30, %k3 + +// CHECK: vpcmpb $123, (%rcx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x00,0x3f,0x19,0x7b] + vpcmpb $123, (%rcx), %xmm30, %k3 + +// CHECK: vpcmpb $123, 291(%rax,%r14,8), %xmm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x0d,0x00,0x3f,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpb $123, 291(%rax,%r14,8), %xmm30, %k3 + +// CHECK: vpcmpb $123, 2032(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x00,0x3f,0x5a,0x7f,0x7b] + vpcmpb $123, 2032(%rdx), %xmm30, %k3 + +// CHECK: vpcmpb $123, 2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x00,0x3f,0x9a,0x00,0x08,0x00,0x00,0x7b] + vpcmpb $123, 2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpb $123, -2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x00,0x3f,0x5a,0x80,0x7b] + vpcmpb $123, -2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpb $123, -2064(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x00,0x3f,0x9a,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpb $123, -2064(%rdx), %xmm30, %k3 + +// CHECK: vpcmpb $171, %ymm19, %ymm19, %k5 +// CHECK: encoding: [0x62,0xb3,0x65,0x20,0x3f,0xeb,0xab] + vpcmpb $171, %ymm19, %ymm19, %k5 + +// CHECK: vpcmpb $171, %ymm19, %ymm19, %k5 {%k4} +// CHECK: encoding: [0x62,0xb3,0x65,0x24,0x3f,0xeb,0xab] + vpcmpb $171, %ymm19, %ymm19, %k5 {%k4} + +// CHECK: vpcmpb $123, %ymm19, %ymm19, %k5 +// CHECK: encoding: [0x62,0xb3,0x65,0x20,0x3f,0xeb,0x7b] + vpcmpb $123, %ymm19, %ymm19, %k5 + +// CHECK: vpcmpb $123, (%rcx), %ymm19, %k5 +// CHECK: encoding: [0x62,0xf3,0x65,0x20,0x3f,0x29,0x7b] + vpcmpb $123, (%rcx), %ymm19, %k5 + +// CHECK: vpcmpb $123, 291(%rax,%r14,8), %ymm19, %k5 +// CHECK: encoding: [0x62,0xb3,0x65,0x20,0x3f,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpb $123, 291(%rax,%r14,8), %ymm19, %k5 + +// CHECK: vpcmpb $123, 4064(%rdx), %ymm19, %k5 +// CHECK: encoding: [0x62,0xf3,0x65,0x20,0x3f,0x6a,0x7f,0x7b] + vpcmpb $123, 4064(%rdx), %ymm19, %k5 + +// CHECK: vpcmpb $123, 4096(%rdx), %ymm19, %k5 +// CHECK: encoding: [0x62,0xf3,0x65,0x20,0x3f,0xaa,0x00,0x10,0x00,0x00,0x7b] + vpcmpb $123, 4096(%rdx), %ymm19, %k5 + +// CHECK: vpcmpb $123, -4096(%rdx), %ymm19, %k5 +// CHECK: encoding: [0x62,0xf3,0x65,0x20,0x3f,0x6a,0x80,0x7b] + vpcmpb $123, -4096(%rdx), %ymm19, %k5 + +// CHECK: vpcmpb $123, -4128(%rdx), %ymm19, %k5 +// CHECK: encoding: [0x62,0xf3,0x65,0x20,0x3f,0xaa,0xe0,0xef,0xff,0xff,0x7b] + vpcmpb $123, -4128(%rdx), %ymm19, %k5 + +// CHECK: vpcmpw $171, %xmm22, %xmm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x8d,0x00,0x3f,0xde,0xab] + vpcmpw $171, %xmm22, %xmm30, %k3 + +// CHECK: vpcmpw $171, %xmm22, %xmm30, %k3 {%k6} +// CHECK: encoding: [0x62,0xb3,0x8d,0x06,0x3f,0xde,0xab] + vpcmpw $171, %xmm22, %xmm30, %k3 {%k6} + +// CHECK: vpcmpw $123, %xmm22, %xmm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x8d,0x00,0x3f,0xde,0x7b] + vpcmpw $123, %xmm22, %xmm30, %k3 + +// CHECK: vpcmpw $123, (%rcx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x00,0x3f,0x19,0x7b] + vpcmpw $123, (%rcx), %xmm30, %k3 + +// CHECK: vpcmpw $123, 291(%rax,%r14,8), %xmm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x8d,0x00,0x3f,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpw $123, 291(%rax,%r14,8), %xmm30, %k3 + +// CHECK: vpcmpw $123, 2032(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x00,0x3f,0x5a,0x7f,0x7b] + vpcmpw $123, 2032(%rdx), %xmm30, %k3 + +// CHECK: vpcmpw $123, 2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x00,0x3f,0x9a,0x00,0x08,0x00,0x00,0x7b] + vpcmpw $123, 2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpw $123, -2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x00,0x3f,0x5a,0x80,0x7b] + vpcmpw $123, -2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpw $123, -2064(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x8d,0x00,0x3f,0x9a,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpw $123, -2064(%rdx), %xmm30, %k3 + +// CHECK: vpcmpw $171, %ymm18, %ymm26, %k3 +// CHECK: encoding: [0x62,0xb3,0xad,0x20,0x3f,0xda,0xab] + vpcmpw $171, %ymm18, %ymm26, %k3 + +// CHECK: vpcmpw $171, %ymm18, %ymm26, %k3 {%k3} +// CHECK: encoding: [0x62,0xb3,0xad,0x23,0x3f,0xda,0xab] + vpcmpw $171, %ymm18, %ymm26, %k3 {%k3} + +// CHECK: vpcmpw $123, %ymm18, %ymm26, %k3 +// CHECK: encoding: [0x62,0xb3,0xad,0x20,0x3f,0xda,0x7b] + vpcmpw $123, %ymm18, %ymm26, %k3 + +// CHECK: vpcmpw $123, (%rcx), %ymm26, %k3 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x3f,0x19,0x7b] + vpcmpw $123, (%rcx), %ymm26, %k3 + +// CHECK: vpcmpw $123, 291(%rax,%r14,8), %ymm26, %k3 +// CHECK: encoding: [0x62,0xb3,0xad,0x20,0x3f,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpw $123, 291(%rax,%r14,8), %ymm26, %k3 + +// CHECK: vpcmpw $123, 4064(%rdx), %ymm26, %k3 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x3f,0x5a,0x7f,0x7b] + vpcmpw $123, 4064(%rdx), %ymm26, %k3 + +// CHECK: vpcmpw $123, 4096(%rdx), %ymm26, %k3 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x3f,0x9a,0x00,0x10,0x00,0x00,0x7b] + vpcmpw $123, 4096(%rdx), %ymm26, %k3 + +// CHECK: vpcmpw $123, -4096(%rdx), %ymm26, %k3 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x3f,0x5a,0x80,0x7b] + vpcmpw $123, -4096(%rdx), %ymm26, %k3 + +// CHECK: vpcmpw $123, -4128(%rdx), %ymm26, %k3 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x3f,0x9a,0xe0,0xef,0xff,0xff,0x7b] + vpcmpw $123, -4128(%rdx), %ymm26, %k3 + +// CHECK: vpcmpub $171, %xmm21, %xmm22, %k5 +// CHECK: encoding: [0x62,0xb3,0x4d,0x00,0x3e,0xed,0xab] + vpcmpub $171, %xmm21, %xmm22, %k5 + +// CHECK: vpcmpub $171, %xmm21, %xmm22, %k5 {%k3} +// CHECK: encoding: [0x62,0xb3,0x4d,0x03,0x3e,0xed,0xab] + vpcmpub $171, %xmm21, %xmm22, %k5 {%k3} + +// CHECK: vpcmpub $123, %xmm21, %xmm22, %k5 +// CHECK: encoding: [0x62,0xb3,0x4d,0x00,0x3e,0xed,0x7b] + vpcmpub $123, %xmm21, %xmm22, %k5 + +// CHECK: vpcmpub $123, (%rcx), %xmm22, %k5 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x3e,0x29,0x7b] + vpcmpub $123, (%rcx), %xmm22, %k5 + +// CHECK: vpcmpub $123, 291(%rax,%r14,8), %xmm22, %k5 +// CHECK: encoding: [0x62,0xb3,0x4d,0x00,0x3e,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpub $123, 291(%rax,%r14,8), %xmm22, %k5 + +// CHECK: vpcmpub $123, 2032(%rdx), %xmm22, %k5 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x3e,0x6a,0x7f,0x7b] + vpcmpub $123, 2032(%rdx), %xmm22, %k5 + +// CHECK: vpcmpub $123, 2048(%rdx), %xmm22, %k5 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x3e,0xaa,0x00,0x08,0x00,0x00,0x7b] + vpcmpub $123, 2048(%rdx), %xmm22, %k5 + +// CHECK: vpcmpub $123, -2048(%rdx), %xmm22, %k5 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x3e,0x6a,0x80,0x7b] + vpcmpub $123, -2048(%rdx), %xmm22, %k5 + +// CHECK: vpcmpub $123, -2064(%rdx), %xmm22, %k5 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x3e,0xaa,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpub $123, -2064(%rdx), %xmm22, %k5 + +// CHECK: vpcmpub $171, %ymm21, %ymm23, %k2 +// CHECK: encoding: [0x62,0xb3,0x45,0x20,0x3e,0xd5,0xab] + vpcmpub $171, %ymm21, %ymm23, %k2 + +// CHECK: vpcmpub $171, %ymm21, %ymm23, %k2 {%k2} +// CHECK: encoding: [0x62,0xb3,0x45,0x22,0x3e,0xd5,0xab] + vpcmpub $171, %ymm21, %ymm23, %k2 {%k2} + +// CHECK: vpcmpub $123, %ymm21, %ymm23, %k2 +// CHECK: encoding: [0x62,0xb3,0x45,0x20,0x3e,0xd5,0x7b] + vpcmpub $123, %ymm21, %ymm23, %k2 + +// CHECK: vpcmpub $123, (%rcx), %ymm23, %k2 +// CHECK: encoding: [0x62,0xf3,0x45,0x20,0x3e,0x11,0x7b] + vpcmpub $123, (%rcx), %ymm23, %k2 + +// CHECK: vpcmpub $123, 291(%rax,%r14,8), %ymm23, %k2 +// CHECK: encoding: [0x62,0xb3,0x45,0x20,0x3e,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpub $123, 291(%rax,%r14,8), %ymm23, %k2 + +// CHECK: vpcmpub $123, 4064(%rdx), %ymm23, %k2 +// CHECK: encoding: [0x62,0xf3,0x45,0x20,0x3e,0x52,0x7f,0x7b] + vpcmpub $123, 4064(%rdx), %ymm23, %k2 + +// CHECK: vpcmpub $123, 4096(%rdx), %ymm23, %k2 +// CHECK: encoding: [0x62,0xf3,0x45,0x20,0x3e,0x92,0x00,0x10,0x00,0x00,0x7b] + vpcmpub $123, 4096(%rdx), %ymm23, %k2 + +// CHECK: vpcmpub $123, -4096(%rdx), %ymm23, %k2 +// CHECK: encoding: [0x62,0xf3,0x45,0x20,0x3e,0x52,0x80,0x7b] + vpcmpub $123, -4096(%rdx), %ymm23, %k2 + +// CHECK: vpcmpub $123, -4128(%rdx), %ymm23, %k2 +// CHECK: encoding: [0x62,0xf3,0x45,0x20,0x3e,0x92,0xe0,0xef,0xff,0xff,0x7b] + vpcmpub $123, -4128(%rdx), %ymm23, %k2 + +// CHECK: vpcmpuw $171, %xmm17, %xmm28, %k5 +// CHECK: encoding: [0x62,0xb3,0x9d,0x00,0x3e,0xe9,0xab] + vpcmpuw $171, %xmm17, %xmm28, %k5 + +// CHECK: vpcmpuw $171, %xmm17, %xmm28, %k5 {%k4} +// CHECK: encoding: [0x62,0xb3,0x9d,0x04,0x3e,0xe9,0xab] + vpcmpuw $171, %xmm17, %xmm28, %k5 {%k4} + +// CHECK: vpcmpuw $123, %xmm17, %xmm28, %k5 +// CHECK: encoding: [0x62,0xb3,0x9d,0x00,0x3e,0xe9,0x7b] + vpcmpuw $123, %xmm17, %xmm28, %k5 + +// CHECK: vpcmpuw $123, (%rcx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x3e,0x29,0x7b] + vpcmpuw $123, (%rcx), %xmm28, %k5 + +// CHECK: vpcmpuw $123, 291(%rax,%r14,8), %xmm28, %k5 +// CHECK: encoding: [0x62,0xb3,0x9d,0x00,0x3e,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpuw $123, 291(%rax,%r14,8), %xmm28, %k5 + +// CHECK: vpcmpuw $123, 2032(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x3e,0x6a,0x7f,0x7b] + vpcmpuw $123, 2032(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuw $123, 2048(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x3e,0xaa,0x00,0x08,0x00,0x00,0x7b] + vpcmpuw $123, 2048(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuw $123, -2048(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x3e,0x6a,0x80,0x7b] + vpcmpuw $123, -2048(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuw $123, -2064(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x3e,0xaa,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpuw $123, -2064(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuw $171, %ymm28, %ymm27, %k4 +// CHECK: encoding: [0x62,0x93,0xa5,0x20,0x3e,0xe4,0xab] + vpcmpuw $171, %ymm28, %ymm27, %k4 + +// CHECK: vpcmpuw $171, %ymm28, %ymm27, %k4 {%k2} +// CHECK: encoding: [0x62,0x93,0xa5,0x22,0x3e,0xe4,0xab] + vpcmpuw $171, %ymm28, %ymm27, %k4 {%k2} + +// CHECK: vpcmpuw $123, %ymm28, %ymm27, %k4 +// CHECK: encoding: [0x62,0x93,0xa5,0x20,0x3e,0xe4,0x7b] + vpcmpuw $123, %ymm28, %ymm27, %k4 + +// CHECK: vpcmpuw $123, (%rcx), %ymm27, %k4 +// CHECK: encoding: [0x62,0xf3,0xa5,0x20,0x3e,0x21,0x7b] + vpcmpuw $123, (%rcx), %ymm27, %k4 + +// CHECK: vpcmpuw $123, 291(%rax,%r14,8), %ymm27, %k4 +// CHECK: encoding: [0x62,0xb3,0xa5,0x20,0x3e,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpuw $123, 291(%rax,%r14,8), %ymm27, %k4 + +// CHECK: vpcmpuw $123, 4064(%rdx), %ymm27, %k4 +// CHECK: encoding: [0x62,0xf3,0xa5,0x20,0x3e,0x62,0x7f,0x7b] + vpcmpuw $123, 4064(%rdx), %ymm27, %k4 + +// CHECK: vpcmpuw $123, 4096(%rdx), %ymm27, %k4 +// CHECK: encoding: [0x62,0xf3,0xa5,0x20,0x3e,0xa2,0x00,0x10,0x00,0x00,0x7b] + vpcmpuw $123, 4096(%rdx), %ymm27, %k4 + +// CHECK: vpcmpuw $123, -4096(%rdx), %ymm27, %k4 +// CHECK: encoding: [0x62,0xf3,0xa5,0x20,0x3e,0x62,0x80,0x7b] + vpcmpuw $123, -4096(%rdx), %ymm27, %k4 + +// CHECK: vpcmpuw $123, -4128(%rdx), %ymm27, %k4 +// CHECK: encoding: [0x62,0xf3,0xa5,0x20,0x3e,0xa2,0xe0,0xef,0xff,0xff,0x7b] + vpcmpuw $123, -4128(%rdx), %ymm27, %k4 + +// CHECK: vpmaxsb %xmm17, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xa2,0x3d,0x00,0x3c,0xf9] + vpmaxsb %xmm17, %xmm24, %xmm23 + +// CHECK: vpmaxsb %xmm17, %xmm24, %xmm23 {%k3} +// CHECK: encoding: [0x62,0xa2,0x3d,0x03,0x3c,0xf9] + vpmaxsb %xmm17, %xmm24, %xmm23 {%k3} + +// CHECK: vpmaxsb %xmm17, %xmm24, %xmm23 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0x3d,0x83,0x3c,0xf9] + vpmaxsb %xmm17, %xmm24, %xmm23 {%k3} {z} + +// CHECK: vpmaxsb (%rcx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x3c,0x39] + vpmaxsb (%rcx), %xmm24, %xmm23 + +// CHECK: vpmaxsb 291(%rax,%r14,8), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xa2,0x3d,0x00,0x3c,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpmaxsb 291(%rax,%r14,8), %xmm24, %xmm23 + +// CHECK: vpmaxsb 2032(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x3c,0x7a,0x7f] + vpmaxsb 2032(%rdx), %xmm24, %xmm23 + +// CHECK: vpmaxsb 2048(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x3c,0xba,0x00,0x08,0x00,0x00] + vpmaxsb 2048(%rdx), %xmm24, %xmm23 + +// CHECK: vpmaxsb -2048(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x3c,0x7a,0x80] + vpmaxsb -2048(%rdx), %xmm24, %xmm23 + +// CHECK: vpmaxsb -2064(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x3c,0xba,0xf0,0xf7,0xff,0xff] + vpmaxsb -2064(%rdx), %xmm24, %xmm23 + +// CHECK: vpmaxsb %ymm27, %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x02,0x4d,0x20,0x3c,0xf3] + vpmaxsb %ymm27, %ymm22, %ymm30 + +// CHECK: vpmaxsb %ymm27, %ymm22, %ymm30 {%k5} +// CHECK: encoding: [0x62,0x02,0x4d,0x25,0x3c,0xf3] + vpmaxsb %ymm27, %ymm22, %ymm30 {%k5} + +// CHECK: vpmaxsb %ymm27, %ymm22, %ymm30 {%k5} {z} +// CHECK: encoding: [0x62,0x02,0x4d,0xa5,0x3c,0xf3] + vpmaxsb %ymm27, %ymm22, %ymm30 {%k5} {z} + +// CHECK: vpmaxsb (%rcx), %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x3c,0x31] + vpmaxsb (%rcx), %ymm22, %ymm30 + +// CHECK: vpmaxsb 291(%rax,%r14,8), %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x22,0x4d,0x20,0x3c,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpmaxsb 291(%rax,%r14,8), %ymm22, %ymm30 + +// CHECK: vpmaxsb 4064(%rdx), %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x3c,0x72,0x7f] + vpmaxsb 4064(%rdx), %ymm22, %ymm30 + +// CHECK: vpmaxsb 4096(%rdx), %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x3c,0xb2,0x00,0x10,0x00,0x00] + vpmaxsb 4096(%rdx), %ymm22, %ymm30 + +// CHECK: vpmaxsb -4096(%rdx), %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x3c,0x72,0x80] + vpmaxsb -4096(%rdx), %ymm22, %ymm30 + +// CHECK: vpmaxsb -4128(%rdx), %ymm22, %ymm30 +// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x3c,0xb2,0xe0,0xef,0xff,0xff] + vpmaxsb -4128(%rdx), %ymm22, %ymm30 + +// CHECK: vpmaxsw %xmm28, %xmm24, %xmm18 +// CHECK: encoding: [0x62,0x81,0x3d,0x00,0xee,0xd4] + vpmaxsw %xmm28, %xmm24, %xmm18 + +// CHECK: vpmaxsw %xmm28, %xmm24, %xmm18 {%k3} +// CHECK: encoding: [0x62,0x81,0x3d,0x03,0xee,0xd4] + vpmaxsw %xmm28, %xmm24, %xmm18 {%k3} + +// CHECK: vpmaxsw %xmm28, %xmm24, %xmm18 {%k3} {z} +// CHECK: encoding: [0x62,0x81,0x3d,0x83,0xee,0xd4] + vpmaxsw %xmm28, %xmm24, %xmm18 {%k3} {z} + +// CHECK: vpmaxsw (%rcx), %xmm24, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xee,0x11] + vpmaxsw (%rcx), %xmm24, %xmm18 + +// CHECK: vpmaxsw 291(%rax,%r14,8), %xmm24, %xmm18 +// CHECK: encoding: [0x62,0xa1,0x3d,0x00,0xee,0x94,0xf0,0x23,0x01,0x00,0x00] + vpmaxsw 291(%rax,%r14,8), %xmm24, %xmm18 + +// CHECK: vpmaxsw 2032(%rdx), %xmm24, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xee,0x52,0x7f] + vpmaxsw 2032(%rdx), %xmm24, %xmm18 + +// CHECK: vpmaxsw 2048(%rdx), %xmm24, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xee,0x92,0x00,0x08,0x00,0x00] + vpmaxsw 2048(%rdx), %xmm24, %xmm18 + +// CHECK: vpmaxsw -2048(%rdx), %xmm24, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xee,0x52,0x80] + vpmaxsw -2048(%rdx), %xmm24, %xmm18 + +// CHECK: vpmaxsw -2064(%rdx), %xmm24, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xee,0x92,0xf0,0xf7,0xff,0xff] + vpmaxsw -2064(%rdx), %xmm24, %xmm18 + +// CHECK: vpmaxsw %ymm17, %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x21,0x1d,0x20,0xee,0xd9] + vpmaxsw %ymm17, %ymm28, %ymm27 + +// CHECK: vpmaxsw %ymm17, %ymm28, %ymm27 {%k6} +// CHECK: encoding: [0x62,0x21,0x1d,0x26,0xee,0xd9] + vpmaxsw %ymm17, %ymm28, %ymm27 {%k6} + +// CHECK: vpmaxsw %ymm17, %ymm28, %ymm27 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0x1d,0xa6,0xee,0xd9] + vpmaxsw %ymm17, %ymm28, %ymm27 {%k6} {z} + +// CHECK: vpmaxsw (%rcx), %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x61,0x1d,0x20,0xee,0x19] + vpmaxsw (%rcx), %ymm28, %ymm27 + +// CHECK: vpmaxsw 291(%rax,%r14,8), %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x21,0x1d,0x20,0xee,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpmaxsw 291(%rax,%r14,8), %ymm28, %ymm27 + +// CHECK: vpmaxsw 4064(%rdx), %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x61,0x1d,0x20,0xee,0x5a,0x7f] + vpmaxsw 4064(%rdx), %ymm28, %ymm27 + +// CHECK: vpmaxsw 4096(%rdx), %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x61,0x1d,0x20,0xee,0x9a,0x00,0x10,0x00,0x00] + vpmaxsw 4096(%rdx), %ymm28, %ymm27 + +// CHECK: vpmaxsw -4096(%rdx), %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x61,0x1d,0x20,0xee,0x5a,0x80] + vpmaxsw -4096(%rdx), %ymm28, %ymm27 + +// CHECK: vpmaxsw -4128(%rdx), %ymm28, %ymm27 +// CHECK: encoding: [0x62,0x61,0x1d,0x20,0xee,0x9a,0xe0,0xef,0xff,0xff] + vpmaxsw -4128(%rdx), %ymm28, %ymm27 + +// CHECK: vpmaxub %xmm23, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x75,0x00,0xde,0xcf] + vpmaxub %xmm23, %xmm17, %xmm17 + +// CHECK: vpmaxub %xmm23, %xmm17, %xmm17 {%k5} +// CHECK: encoding: [0x62,0xa1,0x75,0x05,0xde,0xcf] + vpmaxub %xmm23, %xmm17, %xmm17 {%k5} + +// CHECK: vpmaxub %xmm23, %xmm17, %xmm17 {%k5} {z} +// CHECK: encoding: [0x62,0xa1,0x75,0x85,0xde,0xcf] + vpmaxub %xmm23, %xmm17, %xmm17 {%k5} {z} + +// CHECK: vpmaxub (%rcx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xde,0x09] + vpmaxub (%rcx), %xmm17, %xmm17 + +// CHECK: vpmaxub 291(%rax,%r14,8), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x75,0x00,0xde,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpmaxub 291(%rax,%r14,8), %xmm17, %xmm17 + +// CHECK: vpmaxub 2032(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xde,0x4a,0x7f] + vpmaxub 2032(%rdx), %xmm17, %xmm17 + +// CHECK: vpmaxub 2048(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xde,0x8a,0x00,0x08,0x00,0x00] + vpmaxub 2048(%rdx), %xmm17, %xmm17 + +// CHECK: vpmaxub -2048(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xde,0x4a,0x80] + vpmaxub -2048(%rdx), %xmm17, %xmm17 + +// CHECK: vpmaxub -2064(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xde,0x8a,0xf0,0xf7,0xff,0xff] + vpmaxub -2064(%rdx), %xmm17, %xmm17 + +// CHECK: vpmaxub %ymm24, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x01,0x2d,0x20,0xde,0xe0] + vpmaxub %ymm24, %ymm26, %ymm28 + +// CHECK: vpmaxub %ymm24, %ymm26, %ymm28 {%k6} +// CHECK: encoding: [0x62,0x01,0x2d,0x26,0xde,0xe0] + vpmaxub %ymm24, %ymm26, %ymm28 {%k6} + +// CHECK: vpmaxub %ymm24, %ymm26, %ymm28 {%k6} {z} +// CHECK: encoding: [0x62,0x01,0x2d,0xa6,0xde,0xe0] + vpmaxub %ymm24, %ymm26, %ymm28 {%k6} {z} + +// CHECK: vpmaxub (%rcx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xde,0x21] + vpmaxub (%rcx), %ymm26, %ymm28 + +// CHECK: vpmaxub 291(%rax,%r14,8), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x21,0x2d,0x20,0xde,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpmaxub 291(%rax,%r14,8), %ymm26, %ymm28 + +// CHECK: vpmaxub 4064(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xde,0x62,0x7f] + vpmaxub 4064(%rdx), %ymm26, %ymm28 + +// CHECK: vpmaxub 4096(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xde,0xa2,0x00,0x10,0x00,0x00] + vpmaxub 4096(%rdx), %ymm26, %ymm28 + +// CHECK: vpmaxub -4096(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xde,0x62,0x80] + vpmaxub -4096(%rdx), %ymm26, %ymm28 + +// CHECK: vpmaxub -4128(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xde,0xa2,0xe0,0xef,0xff,0xff] + vpmaxub -4128(%rdx), %ymm26, %ymm28 + +// CHECK: vpmaxuw %xmm20, %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x22,0x6d,0x00,0x3e,0xc4] + vpmaxuw %xmm20, %xmm18, %xmm24 + +// CHECK: vpmaxuw %xmm20, %xmm18, %xmm24 {%k7} +// CHECK: encoding: [0x62,0x22,0x6d,0x07,0x3e,0xc4] + vpmaxuw %xmm20, %xmm18, %xmm24 {%k7} + +// CHECK: vpmaxuw %xmm20, %xmm18, %xmm24 {%k7} {z} +// CHECK: encoding: [0x62,0x22,0x6d,0x87,0x3e,0xc4] + vpmaxuw %xmm20, %xmm18, %xmm24 {%k7} {z} + +// CHECK: vpmaxuw (%rcx), %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x62,0x6d,0x00,0x3e,0x01] + vpmaxuw (%rcx), %xmm18, %xmm24 + +// CHECK: vpmaxuw 291(%rax,%r14,8), %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x22,0x6d,0x00,0x3e,0x84,0xf0,0x23,0x01,0x00,0x00] + vpmaxuw 291(%rax,%r14,8), %xmm18, %xmm24 + +// CHECK: vpmaxuw 2032(%rdx), %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x62,0x6d,0x00,0x3e,0x42,0x7f] + vpmaxuw 2032(%rdx), %xmm18, %xmm24 + +// CHECK: vpmaxuw 2048(%rdx), %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x62,0x6d,0x00,0x3e,0x82,0x00,0x08,0x00,0x00] + vpmaxuw 2048(%rdx), %xmm18, %xmm24 + +// CHECK: vpmaxuw -2048(%rdx), %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x62,0x6d,0x00,0x3e,0x42,0x80] + vpmaxuw -2048(%rdx), %xmm18, %xmm24 + +// CHECK: vpmaxuw -2064(%rdx), %xmm18, %xmm24 +// CHECK: encoding: [0x62,0x62,0x6d,0x00,0x3e,0x82,0xf0,0xf7,0xff,0xff] + vpmaxuw -2064(%rdx), %xmm18, %xmm24 + +// CHECK: vpmaxuw %ymm19, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xa2,0x4d,0x20,0x3e,0xdb] + vpmaxuw %ymm19, %ymm22, %ymm19 + +// CHECK: vpmaxuw %ymm19, %ymm22, %ymm19 {%k7} +// CHECK: encoding: [0x62,0xa2,0x4d,0x27,0x3e,0xdb] + vpmaxuw %ymm19, %ymm22, %ymm19 {%k7} + +// CHECK: vpmaxuw %ymm19, %ymm22, %ymm19 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x4d,0xa7,0x3e,0xdb] + vpmaxuw %ymm19, %ymm22, %ymm19 {%k7} {z} + +// CHECK: vpmaxuw (%rcx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3e,0x19] + vpmaxuw (%rcx), %ymm22, %ymm19 + +// CHECK: vpmaxuw 291(%rax,%r14,8), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xa2,0x4d,0x20,0x3e,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpmaxuw 291(%rax,%r14,8), %ymm22, %ymm19 + +// CHECK: vpmaxuw 4064(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3e,0x5a,0x7f] + vpmaxuw 4064(%rdx), %ymm22, %ymm19 + +// CHECK: vpmaxuw 4096(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3e,0x9a,0x00,0x10,0x00,0x00] + vpmaxuw 4096(%rdx), %ymm22, %ymm19 + +// CHECK: vpmaxuw -4096(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3e,0x5a,0x80] + vpmaxuw -4096(%rdx), %ymm22, %ymm19 + +// CHECK: vpmaxuw -4128(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3e,0x9a,0xe0,0xef,0xff,0xff] + vpmaxuw -4128(%rdx), %ymm22, %ymm19 + +// CHECK: vpminsb %xmm27, %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x02,0x1d,0x00,0x38,0xcb] + vpminsb %xmm27, %xmm28, %xmm25 + +// CHECK: vpminsb %xmm27, %xmm28, %xmm25 {%k1} +// CHECK: encoding: [0x62,0x02,0x1d,0x01,0x38,0xcb] + vpminsb %xmm27, %xmm28, %xmm25 {%k1} + +// CHECK: vpminsb %xmm27, %xmm28, %xmm25 {%k1} {z} +// CHECK: encoding: [0x62,0x02,0x1d,0x81,0x38,0xcb] + vpminsb %xmm27, %xmm28, %xmm25 {%k1} {z} + +// CHECK: vpminsb (%rcx), %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x62,0x1d,0x00,0x38,0x09] + vpminsb (%rcx), %xmm28, %xmm25 + +// CHECK: vpminsb 291(%rax,%r14,8), %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x22,0x1d,0x00,0x38,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpminsb 291(%rax,%r14,8), %xmm28, %xmm25 + +// CHECK: vpminsb 2032(%rdx), %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x62,0x1d,0x00,0x38,0x4a,0x7f] + vpminsb 2032(%rdx), %xmm28, %xmm25 + +// CHECK: vpminsb 2048(%rdx), %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x62,0x1d,0x00,0x38,0x8a,0x00,0x08,0x00,0x00] + vpminsb 2048(%rdx), %xmm28, %xmm25 + +// CHECK: vpminsb -2048(%rdx), %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x62,0x1d,0x00,0x38,0x4a,0x80] + vpminsb -2048(%rdx), %xmm28, %xmm25 + +// CHECK: vpminsb -2064(%rdx), %xmm28, %xmm25 +// CHECK: encoding: [0x62,0x62,0x1d,0x00,0x38,0x8a,0xf0,0xf7,0xff,0xff] + vpminsb -2064(%rdx), %xmm28, %xmm25 + +// CHECK: vpminsb %ymm27, %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x02,0x5d,0x20,0x38,0xdb] + vpminsb %ymm27, %ymm20, %ymm27 + +// CHECK: vpminsb %ymm27, %ymm20, %ymm27 {%k6} +// CHECK: encoding: [0x62,0x02,0x5d,0x26,0x38,0xdb] + vpminsb %ymm27, %ymm20, %ymm27 {%k6} + +// CHECK: vpminsb %ymm27, %ymm20, %ymm27 {%k6} {z} +// CHECK: encoding: [0x62,0x02,0x5d,0xa6,0x38,0xdb] + vpminsb %ymm27, %ymm20, %ymm27 {%k6} {z} + +// CHECK: vpminsb (%rcx), %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x62,0x5d,0x20,0x38,0x19] + vpminsb (%rcx), %ymm20, %ymm27 + +// CHECK: vpminsb 291(%rax,%r14,8), %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x22,0x5d,0x20,0x38,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminsb 291(%rax,%r14,8), %ymm20, %ymm27 + +// CHECK: vpminsb 4064(%rdx), %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x62,0x5d,0x20,0x38,0x5a,0x7f] + vpminsb 4064(%rdx), %ymm20, %ymm27 + +// CHECK: vpminsb 4096(%rdx), %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x62,0x5d,0x20,0x38,0x9a,0x00,0x10,0x00,0x00] + vpminsb 4096(%rdx), %ymm20, %ymm27 + +// CHECK: vpminsb -4096(%rdx), %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x62,0x5d,0x20,0x38,0x5a,0x80] + vpminsb -4096(%rdx), %ymm20, %ymm27 + +// CHECK: vpminsb -4128(%rdx), %ymm20, %ymm27 +// CHECK: encoding: [0x62,0x62,0x5d,0x20,0x38,0x9a,0xe0,0xef,0xff,0xff] + vpminsb -4128(%rdx), %ymm20, %ymm27 + +// CHECK: vpminsw %xmm19, %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x21,0x2d,0x00,0xea,0xdb] + vpminsw %xmm19, %xmm26, %xmm27 + +// CHECK: vpminsw %xmm19, %xmm26, %xmm27 {%k2} +// CHECK: encoding: [0x62,0x21,0x2d,0x02,0xea,0xdb] + vpminsw %xmm19, %xmm26, %xmm27 {%k2} + +// CHECK: vpminsw %xmm19, %xmm26, %xmm27 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0x2d,0x82,0xea,0xdb] + vpminsw %xmm19, %xmm26, %xmm27 {%k2} {z} + +// CHECK: vpminsw (%rcx), %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xea,0x19] + vpminsw (%rcx), %xmm26, %xmm27 + +// CHECK: vpminsw 291(%rax,%r14,8), %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x21,0x2d,0x00,0xea,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminsw 291(%rax,%r14,8), %xmm26, %xmm27 + +// CHECK: vpminsw 2032(%rdx), %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xea,0x5a,0x7f] + vpminsw 2032(%rdx), %xmm26, %xmm27 + +// CHECK: vpminsw 2048(%rdx), %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xea,0x9a,0x00,0x08,0x00,0x00] + vpminsw 2048(%rdx), %xmm26, %xmm27 + +// CHECK: vpminsw -2048(%rdx), %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xea,0x5a,0x80] + vpminsw -2048(%rdx), %xmm26, %xmm27 + +// CHECK: vpminsw -2064(%rdx), %xmm26, %xmm27 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xea,0x9a,0xf0,0xf7,0xff,0xff] + vpminsw -2064(%rdx), %xmm26, %xmm27 + +// CHECK: vpminsw %ymm27, %ymm23, %ymm21 +// CHECK: encoding: [0x62,0x81,0x45,0x20,0xea,0xeb] + vpminsw %ymm27, %ymm23, %ymm21 + +// CHECK: vpminsw %ymm27, %ymm23, %ymm21 {%k2} +// CHECK: encoding: [0x62,0x81,0x45,0x22,0xea,0xeb] + vpminsw %ymm27, %ymm23, %ymm21 {%k2} + +// CHECK: vpminsw %ymm27, %ymm23, %ymm21 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0x45,0xa2,0xea,0xeb] + vpminsw %ymm27, %ymm23, %ymm21 {%k2} {z} + +// CHECK: vpminsw (%rcx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xea,0x29] + vpminsw (%rcx), %ymm23, %ymm21 + +// CHECK: vpminsw 291(%rax,%r14,8), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x45,0x20,0xea,0xac,0xf0,0x23,0x01,0x00,0x00] + vpminsw 291(%rax,%r14,8), %ymm23, %ymm21 + +// CHECK: vpminsw 4064(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xea,0x6a,0x7f] + vpminsw 4064(%rdx), %ymm23, %ymm21 + +// CHECK: vpminsw 4096(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xea,0xaa,0x00,0x10,0x00,0x00] + vpminsw 4096(%rdx), %ymm23, %ymm21 + +// CHECK: vpminsw -4096(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xea,0x6a,0x80] + vpminsw -4096(%rdx), %ymm23, %ymm21 + +// CHECK: vpminsw -4128(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xea,0xaa,0xe0,0xef,0xff,0xff] + vpminsw -4128(%rdx), %ymm23, %ymm21 + +// CHECK: vpminub %xmm27, %xmm27, %xmm22 +// CHECK: encoding: [0x62,0x81,0x25,0x00,0xda,0xf3] + vpminub %xmm27, %xmm27, %xmm22 + +// CHECK: vpminub %xmm27, %xmm27, %xmm22 {%k5} +// CHECK: encoding: [0x62,0x81,0x25,0x05,0xda,0xf3] + vpminub %xmm27, %xmm27, %xmm22 {%k5} + +// CHECK: vpminub %xmm27, %xmm27, %xmm22 {%k5} {z} +// CHECK: encoding: [0x62,0x81,0x25,0x85,0xda,0xf3] + vpminub %xmm27, %xmm27, %xmm22 {%k5} {z} + +// CHECK: vpminub (%rcx), %xmm27, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x25,0x00,0xda,0x31] + vpminub (%rcx), %xmm27, %xmm22 + +// CHECK: vpminub 291(%rax,%r14,8), %xmm27, %xmm22 +// CHECK: encoding: [0x62,0xa1,0x25,0x00,0xda,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpminub 291(%rax,%r14,8), %xmm27, %xmm22 + +// CHECK: vpminub 2032(%rdx), %xmm27, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x25,0x00,0xda,0x72,0x7f] + vpminub 2032(%rdx), %xmm27, %xmm22 + +// CHECK: vpminub 2048(%rdx), %xmm27, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x25,0x00,0xda,0xb2,0x00,0x08,0x00,0x00] + vpminub 2048(%rdx), %xmm27, %xmm22 + +// CHECK: vpminub -2048(%rdx), %xmm27, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x25,0x00,0xda,0x72,0x80] + vpminub -2048(%rdx), %xmm27, %xmm22 + +// CHECK: vpminub -2064(%rdx), %xmm27, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x25,0x00,0xda,0xb2,0xf0,0xf7,0xff,0xff] + vpminub -2064(%rdx), %xmm27, %xmm22 + +// CHECK: vpminub %ymm27, %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x01,0x35,0x20,0xda,0xdb] + vpminub %ymm27, %ymm25, %ymm27 + +// CHECK: vpminub %ymm27, %ymm25, %ymm27 {%k3} +// CHECK: encoding: [0x62,0x01,0x35,0x23,0xda,0xdb] + vpminub %ymm27, %ymm25, %ymm27 {%k3} + +// CHECK: vpminub %ymm27, %ymm25, %ymm27 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x35,0xa3,0xda,0xdb] + vpminub %ymm27, %ymm25, %ymm27 {%k3} {z} + +// CHECK: vpminub (%rcx), %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x61,0x35,0x20,0xda,0x19] + vpminub (%rcx), %ymm25, %ymm27 + +// CHECK: vpminub 291(%rax,%r14,8), %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x21,0x35,0x20,0xda,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminub 291(%rax,%r14,8), %ymm25, %ymm27 + +// CHECK: vpminub 4064(%rdx), %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x61,0x35,0x20,0xda,0x5a,0x7f] + vpminub 4064(%rdx), %ymm25, %ymm27 + +// CHECK: vpminub 4096(%rdx), %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x61,0x35,0x20,0xda,0x9a,0x00,0x10,0x00,0x00] + vpminub 4096(%rdx), %ymm25, %ymm27 + +// CHECK: vpminub -4096(%rdx), %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x61,0x35,0x20,0xda,0x5a,0x80] + vpminub -4096(%rdx), %ymm25, %ymm27 + +// CHECK: vpminub -4128(%rdx), %ymm25, %ymm27 +// CHECK: encoding: [0x62,0x61,0x35,0x20,0xda,0x9a,0xe0,0xef,0xff,0xff] + vpminub -4128(%rdx), %ymm25, %ymm27 + +// CHECK: vpminuw %xmm23, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x22,0x75,0x00,0x3a,0xe7] + vpminuw %xmm23, %xmm17, %xmm28 + +// CHECK: vpminuw %xmm23, %xmm17, %xmm28 {%k2} +// CHECK: encoding: [0x62,0x22,0x75,0x02,0x3a,0xe7] + vpminuw %xmm23, %xmm17, %xmm28 {%k2} + +// CHECK: vpminuw %xmm23, %xmm17, %xmm28 {%k2} {z} +// CHECK: encoding: [0x62,0x22,0x75,0x82,0x3a,0xe7] + vpminuw %xmm23, %xmm17, %xmm28 {%k2} {z} + +// CHECK: vpminuw (%rcx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0x75,0x00,0x3a,0x21] + vpminuw (%rcx), %xmm17, %xmm28 + +// CHECK: vpminuw 291(%rax,%r14,8), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x22,0x75,0x00,0x3a,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpminuw 291(%rax,%r14,8), %xmm17, %xmm28 + +// CHECK: vpminuw 2032(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0x75,0x00,0x3a,0x62,0x7f] + vpminuw 2032(%rdx), %xmm17, %xmm28 + +// CHECK: vpminuw 2048(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0x75,0x00,0x3a,0xa2,0x00,0x08,0x00,0x00] + vpminuw 2048(%rdx), %xmm17, %xmm28 + +// CHECK: vpminuw -2048(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0x75,0x00,0x3a,0x62,0x80] + vpminuw -2048(%rdx), %xmm17, %xmm28 + +// CHECK: vpminuw -2064(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0x75,0x00,0x3a,0xa2,0xf0,0xf7,0xff,0xff] + vpminuw -2064(%rdx), %xmm17, %xmm28 + +// CHECK: vpminuw %ymm18, %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xa2,0x25,0x20,0x3a,0xe2] + vpminuw %ymm18, %ymm27, %ymm20 + +// CHECK: vpminuw %ymm18, %ymm27, %ymm20 {%k7} +// CHECK: encoding: [0x62,0xa2,0x25,0x27,0x3a,0xe2] + vpminuw %ymm18, %ymm27, %ymm20 {%k7} + +// CHECK: vpminuw %ymm18, %ymm27, %ymm20 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x25,0xa7,0x3a,0xe2] + vpminuw %ymm18, %ymm27, %ymm20 {%k7} {z} + +// CHECK: vpminuw (%rcx), %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x25,0x20,0x3a,0x21] + vpminuw (%rcx), %ymm27, %ymm20 + +// CHECK: vpminuw 291(%rax,%r14,8), %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xa2,0x25,0x20,0x3a,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpminuw 291(%rax,%r14,8), %ymm27, %ymm20 + +// CHECK: vpminuw 4064(%rdx), %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x25,0x20,0x3a,0x62,0x7f] + vpminuw 4064(%rdx), %ymm27, %ymm20 + +// CHECK: vpminuw 4096(%rdx), %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x25,0x20,0x3a,0xa2,0x00,0x10,0x00,0x00] + vpminuw 4096(%rdx), %ymm27, %ymm20 + +// CHECK: vpminuw -4096(%rdx), %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x25,0x20,0x3a,0x62,0x80] + vpminuw -4096(%rdx), %ymm27, %ymm20 + +// CHECK: vpminuw -4128(%rdx), %ymm27, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x25,0x20,0x3a,0xa2,0xe0,0xef,0xff,0xff] + vpminuw -4128(%rdx), %ymm27, %ymm20 + +// CHECK: vpmullw %xmm26, %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x01,0x65,0x00,0xd5,0xea] + vpmullw %xmm26, %xmm19, %xmm29 + +// CHECK: vpmullw %xmm26, %xmm19, %xmm29 {%k7} +// CHECK: encoding: [0x62,0x01,0x65,0x07,0xd5,0xea] + vpmullw %xmm26, %xmm19, %xmm29 {%k7} + +// CHECK: vpmullw %xmm26, %xmm19, %xmm29 {%k7} {z} +// CHECK: encoding: [0x62,0x01,0x65,0x87,0xd5,0xea] + vpmullw %xmm26, %xmm19, %xmm29 {%k7} {z} + +// CHECK: vpmullw (%rcx), %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x61,0x65,0x00,0xd5,0x29] + vpmullw (%rcx), %xmm19, %xmm29 + +// CHECK: vpmullw 291(%rax,%r14,8), %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x21,0x65,0x00,0xd5,0xac,0xf0,0x23,0x01,0x00,0x00] + vpmullw 291(%rax,%r14,8), %xmm19, %xmm29 + +// CHECK: vpmullw 2032(%rdx), %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x61,0x65,0x00,0xd5,0x6a,0x7f] + vpmullw 2032(%rdx), %xmm19, %xmm29 + +// CHECK: vpmullw 2048(%rdx), %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x61,0x65,0x00,0xd5,0xaa,0x00,0x08,0x00,0x00] + vpmullw 2048(%rdx), %xmm19, %xmm29 + +// CHECK: vpmullw -2048(%rdx), %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x61,0x65,0x00,0xd5,0x6a,0x80] + vpmullw -2048(%rdx), %xmm19, %xmm29 + +// CHECK: vpmullw -2064(%rdx), %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x61,0x65,0x00,0xd5,0xaa,0xf0,0xf7,0xff,0xff] + vpmullw -2064(%rdx), %xmm19, %xmm29 + +// CHECK: vpmullw %ymm20, %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xa1,0x3d,0x20,0xd5,0xcc] + vpmullw %ymm20, %ymm24, %ymm17 + +// CHECK: vpmullw %ymm20, %ymm24, %ymm17 {%k5} +// CHECK: encoding: [0x62,0xa1,0x3d,0x25,0xd5,0xcc] + vpmullw %ymm20, %ymm24, %ymm17 {%k5} + +// CHECK: vpmullw %ymm20, %ymm24, %ymm17 {%k5} {z} +// CHECK: encoding: [0x62,0xa1,0x3d,0xa5,0xd5,0xcc] + vpmullw %ymm20, %ymm24, %ymm17 {%k5} {z} + +// CHECK: vpmullw (%rcx), %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x20,0xd5,0x09] + vpmullw (%rcx), %ymm24, %ymm17 + +// CHECK: vpmullw 291(%rax,%r14,8), %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xa1,0x3d,0x20,0xd5,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpmullw 291(%rax,%r14,8), %ymm24, %ymm17 + +// CHECK: vpmullw 4064(%rdx), %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x20,0xd5,0x4a,0x7f] + vpmullw 4064(%rdx), %ymm24, %ymm17 + +// CHECK: vpmullw 4096(%rdx), %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x20,0xd5,0x8a,0x00,0x10,0x00,0x00] + vpmullw 4096(%rdx), %ymm24, %ymm17 + +// CHECK: vpmullw -4096(%rdx), %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x20,0xd5,0x4a,0x80] + vpmullw -4096(%rdx), %ymm24, %ymm17 + +// CHECK: vpmullw -4128(%rdx), %ymm24, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x3d,0x20,0xd5,0x8a,0xe0,0xef,0xff,0xff] + vpmullw -4128(%rdx), %ymm24, %ymm17 + +// CHECK: vpsubb %xmm28, %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x01,0x15,0x00,0xf8,0xdc] + vpsubb %xmm28, %xmm29, %xmm27 + +// CHECK: vpsubb %xmm28, %xmm29, %xmm27 {%k3} +// CHECK: encoding: [0x62,0x01,0x15,0x03,0xf8,0xdc] + vpsubb %xmm28, %xmm29, %xmm27 {%k3} + +// CHECK: vpsubb %xmm28, %xmm29, %xmm27 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x15,0x83,0xf8,0xdc] + vpsubb %xmm28, %xmm29, %xmm27 {%k3} {z} + +// CHECK: vpsubb (%rcx), %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xf8,0x19] + vpsubb (%rcx), %xmm29, %xmm27 + +// CHECK: vpsubb 291(%rax,%r14,8), %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x21,0x15,0x00,0xf8,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpsubb 291(%rax,%r14,8), %xmm29, %xmm27 + +// CHECK: vpsubb 2032(%rdx), %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xf8,0x5a,0x7f] + vpsubb 2032(%rdx), %xmm29, %xmm27 + +// CHECK: vpsubb 2048(%rdx), %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xf8,0x9a,0x00,0x08,0x00,0x00] + vpsubb 2048(%rdx), %xmm29, %xmm27 + +// CHECK: vpsubb -2048(%rdx), %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xf8,0x5a,0x80] + vpsubb -2048(%rdx), %xmm29, %xmm27 + +// CHECK: vpsubb -2064(%rdx), %xmm29, %xmm27 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xf8,0x9a,0xf0,0xf7,0xff,0xff] + vpsubb -2064(%rdx), %xmm29, %xmm27 + +// CHECK: vpsubb %ymm28, %ymm20, %ymm20 +// CHECK: encoding: [0x62,0x81,0x5d,0x20,0xf8,0xe4] + vpsubb %ymm28, %ymm20, %ymm20 + +// CHECK: vpsubb %ymm28, %ymm20, %ymm20 {%k2} +// CHECK: encoding: [0x62,0x81,0x5d,0x22,0xf8,0xe4] + vpsubb %ymm28, %ymm20, %ymm20 {%k2} + +// CHECK: vpsubb %ymm28, %ymm20, %ymm20 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0x5d,0xa2,0xf8,0xe4] + vpsubb %ymm28, %ymm20, %ymm20 {%k2} {z} + +// CHECK: vpsubb (%rcx), %ymm20, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x5d,0x20,0xf8,0x21] + vpsubb (%rcx), %ymm20, %ymm20 + +// CHECK: vpsubb 291(%rax,%r14,8), %ymm20, %ymm20 +// CHECK: encoding: [0x62,0xa1,0x5d,0x20,0xf8,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsubb 291(%rax,%r14,8), %ymm20, %ymm20 + +// CHECK: vpsubb 4064(%rdx), %ymm20, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x5d,0x20,0xf8,0x62,0x7f] + vpsubb 4064(%rdx), %ymm20, %ymm20 + +// CHECK: vpsubb 4096(%rdx), %ymm20, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x5d,0x20,0xf8,0xa2,0x00,0x10,0x00,0x00] + vpsubb 4096(%rdx), %ymm20, %ymm20 + +// CHECK: vpsubb -4096(%rdx), %ymm20, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x5d,0x20,0xf8,0x62,0x80] + vpsubb -4096(%rdx), %ymm20, %ymm20 + +// CHECK: vpsubb -4128(%rdx), %ymm20, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x5d,0x20,0xf8,0xa2,0xe0,0xef,0xff,0xff] + vpsubb -4128(%rdx), %ymm20, %ymm20 + +// CHECK: vpsubw %xmm18, %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x4d,0x00,0xf9,0xca] + vpsubw %xmm18, %xmm22, %xmm17 + +// CHECK: vpsubw %xmm18, %xmm22, %xmm17 {%k6} +// CHECK: encoding: [0x62,0xa1,0x4d,0x06,0xf9,0xca] + vpsubw %xmm18, %xmm22, %xmm17 {%k6} + +// CHECK: vpsubw %xmm18, %xmm22, %xmm17 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0x4d,0x86,0xf9,0xca] + vpsubw %xmm18, %xmm22, %xmm17 {%k6} {z} + +// CHECK: vpsubw (%rcx), %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x4d,0x00,0xf9,0x09] + vpsubw (%rcx), %xmm22, %xmm17 + +// CHECK: vpsubw 291(%rax,%r14,8), %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x4d,0x00,0xf9,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsubw 291(%rax,%r14,8), %xmm22, %xmm17 + +// CHECK: vpsubw 2032(%rdx), %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x4d,0x00,0xf9,0x4a,0x7f] + vpsubw 2032(%rdx), %xmm22, %xmm17 + +// CHECK: vpsubw 2048(%rdx), %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x4d,0x00,0xf9,0x8a,0x00,0x08,0x00,0x00] + vpsubw 2048(%rdx), %xmm22, %xmm17 + +// CHECK: vpsubw -2048(%rdx), %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x4d,0x00,0xf9,0x4a,0x80] + vpsubw -2048(%rdx), %xmm22, %xmm17 + +// CHECK: vpsubw -2064(%rdx), %xmm22, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x4d,0x00,0xf9,0x8a,0xf0,0xf7,0xff,0xff] + vpsubw -2064(%rdx), %xmm22, %xmm17 + +// CHECK: vpsubw %ymm24, %ymm29, %ymm17 +// CHECK: encoding: [0x62,0x81,0x15,0x20,0xf9,0xc8] + vpsubw %ymm24, %ymm29, %ymm17 + +// CHECK: vpsubw %ymm24, %ymm29, %ymm17 {%k2} +// CHECK: encoding: [0x62,0x81,0x15,0x22,0xf9,0xc8] + vpsubw %ymm24, %ymm29, %ymm17 {%k2} + +// CHECK: vpsubw %ymm24, %ymm29, %ymm17 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0x15,0xa2,0xf9,0xc8] + vpsubw %ymm24, %ymm29, %ymm17 {%k2} {z} + +// CHECK: vpsubw (%rcx), %ymm29, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xf9,0x09] + vpsubw (%rcx), %ymm29, %ymm17 + +// CHECK: vpsubw 291(%rax,%r14,8), %ymm29, %ymm17 +// CHECK: encoding: [0x62,0xa1,0x15,0x20,0xf9,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsubw 291(%rax,%r14,8), %ymm29, %ymm17 + +// CHECK: vpsubw 4064(%rdx), %ymm29, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xf9,0x4a,0x7f] + vpsubw 4064(%rdx), %ymm29, %ymm17 + +// CHECK: vpsubw 4096(%rdx), %ymm29, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xf9,0x8a,0x00,0x10,0x00,0x00] + vpsubw 4096(%rdx), %ymm29, %ymm17 + +// CHECK: vpsubw -4096(%rdx), %ymm29, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xf9,0x4a,0x80] + vpsubw -4096(%rdx), %ymm29, %ymm17 + +// CHECK: vpsubw -4128(%rdx), %ymm29, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xf9,0x8a,0xe0,0xef,0xff,0xff] + vpsubw -4128(%rdx), %ymm29, %ymm17 + +// CHECK: vmovdqu8 %xmm23, %xmm26 +// CHECK: encoding: [0x62,0x21,0x7f,0x08,0x6f,0xd7] + vmovdqu8 %xmm23, %xmm26 + +// CHECK: vmovdqu8 %xmm23, %xmm26 {%k2} +// CHECK: encoding: [0x62,0x21,0x7f,0x0a,0x6f,0xd7] + vmovdqu8 %xmm23, %xmm26 {%k2} + +// CHECK: vmovdqu8 %xmm23, %xmm26 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0x7f,0x8a,0x6f,0xd7] + vmovdqu8 %xmm23, %xmm26 {%k2} {z} + +// CHECK: vmovdqu8 (%rcx), %xmm26 +// CHECK: encoding: [0x62,0x61,0x7f,0x08,0x6f,0x11] + vmovdqu8 (%rcx), %xmm26 + +// CHECK: vmovdqu8 291(%rax,%r14,8), %xmm26 +// CHECK: encoding: [0x62,0x21,0x7f,0x08,0x6f,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovdqu8 291(%rax,%r14,8), %xmm26 + +// CHECK: vmovdqu8 2032(%rdx), %xmm26 +// CHECK: encoding: [0x62,0x61,0x7f,0x08,0x6f,0x52,0x7f] + vmovdqu8 2032(%rdx), %xmm26 + +// CHECK: vmovdqu8 2048(%rdx), %xmm26 +// CHECK: encoding: [0x62,0x61,0x7f,0x08,0x6f,0x92,0x00,0x08,0x00,0x00] + vmovdqu8 2048(%rdx), %xmm26 + +// CHECK: vmovdqu8 -2048(%rdx), %xmm26 +// CHECK: encoding: [0x62,0x61,0x7f,0x08,0x6f,0x52,0x80] + vmovdqu8 -2048(%rdx), %xmm26 + +// CHECK: vmovdqu8 -2064(%rdx), %xmm26 +// CHECK: encoding: [0x62,0x61,0x7f,0x08,0x6f,0x92,0xf0,0xf7,0xff,0xff] + vmovdqu8 -2064(%rdx), %xmm26 + +// CHECK: vmovdqu8 %ymm29, %ymm18 +// CHECK: encoding: [0x62,0x81,0x7f,0x28,0x6f,0xd5] + vmovdqu8 %ymm29, %ymm18 + +// CHECK: vmovdqu8 %ymm29, %ymm18 {%k7} +// CHECK: encoding: [0x62,0x81,0x7f,0x2f,0x6f,0xd5] + vmovdqu8 %ymm29, %ymm18 {%k7} + +// CHECK: vmovdqu8 %ymm29, %ymm18 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0x7f,0xaf,0x6f,0xd5] + vmovdqu8 %ymm29, %ymm18 {%k7} {z} + +// CHECK: vmovdqu8 (%rcx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x6f,0x11] + vmovdqu8 (%rcx), %ymm18 + +// CHECK: vmovdqu8 291(%rax,%r14,8), %ymm18 +// CHECK: encoding: [0x62,0xa1,0x7f,0x28,0x6f,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovdqu8 291(%rax,%r14,8), %ymm18 + +// CHECK: vmovdqu8 4064(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x6f,0x52,0x7f] + vmovdqu8 4064(%rdx), %ymm18 + +// CHECK: vmovdqu8 4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x6f,0x92,0x00,0x10,0x00,0x00] + vmovdqu8 4096(%rdx), %ymm18 + +// CHECK: vmovdqu8 -4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x6f,0x52,0x80] + vmovdqu8 -4096(%rdx), %ymm18 + +// CHECK: vmovdqu8 -4128(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x6f,0x92,0xe0,0xef,0xff,0xff] + vmovdqu8 -4128(%rdx), %ymm18 + +// CHECK: vmovdqu16 %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x01,0xff,0x08,0x6f,0xe8] + vmovdqu16 %xmm24, %xmm29 + +// CHECK: vmovdqu16 %xmm24, %xmm29 {%k6} +// CHECK: encoding: [0x62,0x01,0xff,0x0e,0x6f,0xe8] + vmovdqu16 %xmm24, %xmm29 {%k6} + +// CHECK: vmovdqu16 %xmm24, %xmm29 {%k6} {z} +// CHECK: encoding: [0x62,0x01,0xff,0x8e,0x6f,0xe8] + vmovdqu16 %xmm24, %xmm29 {%k6} {z} + +// CHECK: vmovdqu16 (%rcx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xff,0x08,0x6f,0x29] + vmovdqu16 (%rcx), %xmm29 + +// CHECK: vmovdqu16 291(%rax,%r14,8), %xmm29 +// CHECK: encoding: [0x62,0x21,0xff,0x08,0x6f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu16 291(%rax,%r14,8), %xmm29 + +// CHECK: vmovdqu16 2032(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xff,0x08,0x6f,0x6a,0x7f] + vmovdqu16 2032(%rdx), %xmm29 + +// CHECK: vmovdqu16 2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xff,0x08,0x6f,0xaa,0x00,0x08,0x00,0x00] + vmovdqu16 2048(%rdx), %xmm29 + +// CHECK: vmovdqu16 -2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xff,0x08,0x6f,0x6a,0x80] + vmovdqu16 -2048(%rdx), %xmm29 + +// CHECK: vmovdqu16 -2064(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xff,0x08,0x6f,0xaa,0xf0,0xf7,0xff,0xff] + vmovdqu16 -2064(%rdx), %xmm29 + +// CHECK: vmovdqu16 %ymm24, %ymm23 +// CHECK: encoding: [0x62,0x81,0xff,0x28,0x6f,0xf8] + vmovdqu16 %ymm24, %ymm23 + +// CHECK: vmovdqu16 %ymm24, %ymm23 {%k3} +// CHECK: encoding: [0x62,0x81,0xff,0x2b,0x6f,0xf8] + vmovdqu16 %ymm24, %ymm23 {%k3} + +// CHECK: vmovdqu16 %ymm24, %ymm23 {%k3} {z} +// CHECK: encoding: [0x62,0x81,0xff,0xab,0x6f,0xf8] + vmovdqu16 %ymm24, %ymm23 {%k3} {z} + +// CHECK: vmovdqu16 (%rcx), %ymm23 +// CHECK: encoding: [0x62,0xe1,0xff,0x28,0x6f,0x39] + vmovdqu16 (%rcx), %ymm23 + +// CHECK: vmovdqu16 291(%rax,%r14,8), %ymm23 +// CHECK: encoding: [0x62,0xa1,0xff,0x28,0x6f,0xbc,0xf0,0x23,0x01,0x00,0x00] + vmovdqu16 291(%rax,%r14,8), %ymm23 + +// CHECK: vmovdqu16 4064(%rdx), %ymm23 +// CHECK: encoding: [0x62,0xe1,0xff,0x28,0x6f,0x7a,0x7f] + vmovdqu16 4064(%rdx), %ymm23 + +// CHECK: vmovdqu16 4096(%rdx), %ymm23 +// CHECK: encoding: [0x62,0xe1,0xff,0x28,0x6f,0xba,0x00,0x10,0x00,0x00] + vmovdqu16 4096(%rdx), %ymm23 + +// CHECK: vmovdqu16 -4096(%rdx), %ymm23 +// CHECK: encoding: [0x62,0xe1,0xff,0x28,0x6f,0x7a,0x80] + vmovdqu16 -4096(%rdx), %ymm23 + +// CHECK: vmovdqu16 -4128(%rdx), %ymm23 +// CHECK: encoding: [0x62,0xe1,0xff,0x28,0x6f,0xba,0xe0,0xef,0xff,0xff] + vmovdqu16 -4128(%rdx), %ymm23 + +// CHECK: vmovdqu8 %xmm17, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x7f,0x09] + vmovdqu8 %xmm17, (%rcx) + +// CHECK: vmovdqu8 %xmm17, (%rcx) {%k4} +// CHECK: encoding: [0x62,0xe1,0x7f,0x0c,0x7f,0x09] + vmovdqu8 %xmm17, (%rcx) {%k4} + +// CHECK: vmovdqu8 %xmm17, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7f,0x08,0x7f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovdqu8 %xmm17, 291(%rax,%r14,8) + +// CHECK: vmovdqu8 %xmm17, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x7f,0x4a,0x7f] + vmovdqu8 %xmm17, 2032(%rdx) + +// CHECK: vmovdqu8 %xmm17, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x7f,0x8a,0x00,0x08,0x00,0x00] + vmovdqu8 %xmm17, 2048(%rdx) + +// CHECK: vmovdqu8 %xmm17, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x7f,0x4a,0x80] + vmovdqu8 %xmm17, -2048(%rdx) + +// CHECK: vmovdqu8 %xmm17, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x08,0x7f,0x8a,0xf0,0xf7,0xff,0xff] + vmovdqu8 %xmm17, -2064(%rdx) + +// CHECK: vmovdqu8 %ymm21, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x7f,0x29] + vmovdqu8 %ymm21, (%rcx) + +// CHECK: vmovdqu8 %ymm21, (%rcx) {%k1} +// CHECK: encoding: [0x62,0xe1,0x7f,0x29,0x7f,0x29] + vmovdqu8 %ymm21, (%rcx) {%k1} + +// CHECK: vmovdqu8 %ymm21, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7f,0x28,0x7f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu8 %ymm21, 291(%rax,%r14,8) + +// CHECK: vmovdqu8 %ymm21, 4064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x7f,0x6a,0x7f] + vmovdqu8 %ymm21, 4064(%rdx) + +// CHECK: vmovdqu8 %ymm21, 4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x7f,0xaa,0x00,0x10,0x00,0x00] + vmovdqu8 %ymm21, 4096(%rdx) + +// CHECK: vmovdqu8 %ymm21, -4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x7f,0x6a,0x80] + vmovdqu8 %ymm21, -4096(%rdx) + +// CHECK: vmovdqu8 %ymm21, -4128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7f,0x28,0x7f,0xaa,0xe0,0xef,0xff,0xff] + vmovdqu8 %ymm21, -4128(%rdx) + +// CHECK: vmovdqu16 %xmm23, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xff,0x08,0x7f,0x39] + vmovdqu16 %xmm23, (%rcx) + +// CHECK: vmovdqu16 %xmm23, (%rcx) {%k7} +// CHECK: encoding: [0x62,0xe1,0xff,0x0f,0x7f,0x39] + vmovdqu16 %xmm23, (%rcx) {%k7} + +// CHECK: vmovdqu16 %xmm23, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xff,0x08,0x7f,0xbc,0xf0,0x23,0x01,0x00,0x00] + vmovdqu16 %xmm23, 291(%rax,%r14,8) + +// CHECK: vmovdqu16 %xmm23, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0xff,0x08,0x7f,0x7a,0x7f] + vmovdqu16 %xmm23, 2032(%rdx) + +// CHECK: vmovdqu16 %xmm23, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xff,0x08,0x7f,0xba,0x00,0x08,0x00,0x00] + vmovdqu16 %xmm23, 2048(%rdx) + +// CHECK: vmovdqu16 %xmm23, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xff,0x08,0x7f,0x7a,0x80] + vmovdqu16 %xmm23, -2048(%rdx) + +// CHECK: vmovdqu16 %xmm23, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xff,0x08,0x7f,0xba,0xf0,0xf7,0xff,0xff] + vmovdqu16 %xmm23, -2064(%rdx) + +// CHECK: vmovdqu16 %ymm29, (%rcx) +// CHECK: encoding: [0x62,0x61,0xff,0x28,0x7f,0x29] + vmovdqu16 %ymm29, (%rcx) + +// CHECK: vmovdqu16 %ymm29, (%rcx) {%k6} +// CHECK: encoding: [0x62,0x61,0xff,0x2e,0x7f,0x29] + vmovdqu16 %ymm29, (%rcx) {%k6} + +// CHECK: vmovdqu16 %ymm29, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0xff,0x28,0x7f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu16 %ymm29, 291(%rax,%r14,8) + +// CHECK: vmovdqu16 %ymm29, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x28,0x7f,0x6a,0x7f] + vmovdqu16 %ymm29, 4064(%rdx) + +// CHECK: vmovdqu16 %ymm29, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x28,0x7f,0xaa,0x00,0x10,0x00,0x00] + vmovdqu16 %ymm29, 4096(%rdx) + +// CHECK: vmovdqu16 %ymm29, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x28,0x7f,0x6a,0x80] + vmovdqu16 %ymm29, -4096(%rdx) + +// CHECK: vmovdqu16 %ymm29, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0xff,0x28,0x7f,0xaa,0xe0,0xef,0xff,0xff] + vmovdqu16 %ymm29, -4128(%rdx) diff --git a/test/MC/X86/x86-64-avx512dq.s b/test/MC/X86/x86-64-avx512dq.s new file mode 100644 index 0000000..aac1765 --- /dev/null +++ b/test/MC/X86/x86-64-avx512dq.s @@ -0,0 +1,129 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512dq --show-encoding %s | FileCheck %s + +// CHECK: vpmullq %zmm18, %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xa2,0xbd,0x40,0x40,0xd2] + vpmullq %zmm18, %zmm24, %zmm18 + +// CHECK: vpmullq %zmm18, %zmm24, %zmm18 {%k2} +// CHECK: encoding: [0x62,0xa2,0xbd,0x42,0x40,0xd2] + vpmullq %zmm18, %zmm24, %zmm18 {%k2} + +// CHECK: vpmullq %zmm18, %zmm24, %zmm18 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0xbd,0xc2,0x40,0xd2] + vpmullq %zmm18, %zmm24, %zmm18 {%k2} {z} + +// CHECK: vpmullq (%rcx), %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x40,0x11] + vpmullq (%rcx), %zmm24, %zmm18 + +// CHECK: vpmullq 291(%rax,%r14,8), %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xa2,0xbd,0x40,0x40,0x94,0xf0,0x23,0x01,0x00,0x00] + vpmullq 291(%rax,%r14,8), %zmm24, %zmm18 + +// CHECK: vpmullq (%rcx){1to8}, %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x50,0x40,0x11] + vpmullq (%rcx){1to8}, %zmm24, %zmm18 + +// CHECK: vpmullq 8128(%rdx), %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x40,0x52,0x7f] + vpmullq 8128(%rdx), %zmm24, %zmm18 + +// CHECK: vpmullq 8192(%rdx), %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x40,0x92,0x00,0x20,0x00,0x00] + vpmullq 8192(%rdx), %zmm24, %zmm18 + +// CHECK: vpmullq -8192(%rdx), %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x40,0x52,0x80] + vpmullq -8192(%rdx), %zmm24, %zmm18 + +// CHECK: vpmullq -8256(%rdx), %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x40,0x92,0xc0,0xdf,0xff,0xff] + vpmullq -8256(%rdx), %zmm24, %zmm18 + +// CHECK: vpmullq 1016(%rdx){1to8}, %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x50,0x40,0x52,0x7f] + vpmullq 1016(%rdx){1to8}, %zmm24, %zmm18 + +// CHECK: vpmullq 1024(%rdx){1to8}, %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x50,0x40,0x92,0x00,0x04,0x00,0x00] + vpmullq 1024(%rdx){1to8}, %zmm24, %zmm18 + +// CHECK: vpmullq -1024(%rdx){1to8}, %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x50,0x40,0x52,0x80] + vpmullq -1024(%rdx){1to8}, %zmm24, %zmm18 + +// CHECK: vpmullq -1032(%rdx){1to8}, %zmm24, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xbd,0x50,0x40,0x92,0xf8,0xfb,0xff,0xff] + vpmullq -1032(%rdx){1to8}, %zmm24, %zmm18 + +// CHECK: kandb %k6, %k5, %k2 +// CHECK: encoding: [0xc5,0xd5,0x41,0xd6] + kandb %k6, %k5, %k2 + +// CHECK: kandnb %k4, %k6, %k5 +// CHECK: encoding: [0xc5,0xcd,0x42,0xec] + kandnb %k4, %k6, %k5 + +// CHECK: korb %k5, %k4, %k4 +// CHECK: encoding: [0xc5,0xdd,0x45,0xe5] + korb %k5, %k4, %k4 + +// CHECK: kxnorb %k7, %k6, %k4 +// CHECK: encoding: [0xc5,0xcd,0x46,0xe7] + kxnorb %k7, %k6, %k4 + +// CHECK: kxorb %k5, %k6, %k4 +// CHECK: encoding: [0xc5,0xcd,0x47,0xe5] + kxorb %k5, %k6, %k4 + +// CHECK: knotb %k4, %k5 +// CHECK: encoding: [0xc5,0xf9,0x44,0xec] + knotb %k4, %k5 + +// CHECK: knotb %k3, %k3 +// CHECK: encoding: [0xc5,0xf9,0x44,0xdb] + knotb %k3, %k3 + +// CHECK: kmovb %k3, %k5 +// CHECK: encoding: [0xc5,0xf9,0x90,0xeb] + kmovb %k3, %k5 + +// CHECK: kmovb (%rcx), %k5 +// CHECK: encoding: [0xc5,0xf9,0x90,0x29] + kmovb (%rcx), %k5 + +// CHECK: kmovb 4660(%rax,%r14,8), %k5 +// CHECK: encoding: [0xc4,0xa1,0x79,0x90,0xac,0xf0,0x34,0x12,0x00,0x00] + kmovb 4660(%rax,%r14,8), %k5 + +// CHECK: kmovb %k2, (%rcx) +// CHECK: encoding: [0xc5,0xf9,0x91,0x11] + kmovb %k2, (%rcx) + +// CHECK: kmovb %k2, 4660(%rax,%r14,8) +// CHECK: encoding: [0xc4,0xa1,0x79,0x91,0x94,0xf0,0x34,0x12,0x00,0x00] + kmovb %k2, 4660(%rax,%r14,8) + +// CHECK: kmovb %eax, %k2 +// CHECK: encoding: [0xc5,0xf9,0x92,0xd0] + kmovb %eax, %k2 + +// CHECK: kmovb %ebp, %k2 +// CHECK: encoding: [0xc5,0xf9,0x92,0xd5] + kmovb %ebp, %k2 + +// CHECK: kmovb %r13d, %k2 +// CHECK: encoding: [0xc4,0xc1,0x79,0x92,0xd5] + kmovb %r13d, %k2 + +// CHECK: kmovb %k3, %eax +// CHECK: encoding: [0xc5,0xf9,0x93,0xc3] + kmovb %k3, %eax + +// CHECK: kmovb %k3, %ebp +// CHECK: encoding: [0xc5,0xf9,0x93,0xeb] + kmovb %k3, %ebp + +// CHECK: kmovb %k3, %r13d +// CHECK: encoding: [0xc5,0x79,0x93,0xeb] + kmovb %k3, %r13d diff --git a/test/MC/X86/x86-64-avx512dq_vl.s b/test/MC/X86/x86-64-avx512dq_vl.s new file mode 100644 index 0000000..38aab78 --- /dev/null +++ b/test/MC/X86/x86-64-avx512dq_vl.s @@ -0,0 +1,113 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512dq -mattr=+avx512vl --show-encoding %s | FileCheck %s + +// CHECK: vpmullq %xmm22, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x22,0xf5,0x00,0x40,0xd6] + vpmullq %xmm22, %xmm17, %xmm26 + +// CHECK: vpmullq %xmm22, %xmm17, %xmm26 {%k6} +// CHECK: encoding: [0x62,0x22,0xf5,0x06,0x40,0xd6] + vpmullq %xmm22, %xmm17, %xmm26 {%k6} + +// CHECK: vpmullq %xmm22, %xmm17, %xmm26 {%k6} {z} +// CHECK: encoding: [0x62,0x22,0xf5,0x86,0x40,0xd6] + vpmullq %xmm22, %xmm17, %xmm26 {%k6} {z} + +// CHECK: vpmullq (%rcx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x40,0x11] + vpmullq (%rcx), %xmm17, %xmm26 + +// CHECK: vpmullq 291(%rax,%r14,8), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x22,0xf5,0x00,0x40,0x94,0xf0,0x23,0x01,0x00,0x00] + vpmullq 291(%rax,%r14,8), %xmm17, %xmm26 + +// CHECK: vpmullq (%rcx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x40,0x11] + vpmullq (%rcx){1to2}, %xmm17, %xmm26 + +// CHECK: vpmullq 2032(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x40,0x52,0x7f] + vpmullq 2032(%rdx), %xmm17, %xmm26 + +// CHECK: vpmullq 2048(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x40,0x92,0x00,0x08,0x00,0x00] + vpmullq 2048(%rdx), %xmm17, %xmm26 + +// CHECK: vpmullq -2048(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x40,0x52,0x80] + vpmullq -2048(%rdx), %xmm17, %xmm26 + +// CHECK: vpmullq -2064(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x40,0x92,0xf0,0xf7,0xff,0xff] + vpmullq -2064(%rdx), %xmm17, %xmm26 + +// CHECK: vpmullq 1016(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x40,0x52,0x7f] + vpmullq 1016(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpmullq 1024(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x40,0x92,0x00,0x04,0x00,0x00] + vpmullq 1024(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpmullq -1024(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x40,0x52,0x80] + vpmullq -1024(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpmullq -1032(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x40,0x92,0xf8,0xfb,0xff,0xff] + vpmullq -1032(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpmullq %ymm25, %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x02,0xb5,0x20,0x40,0xc9] + vpmullq %ymm25, %ymm25, %ymm25 + +// CHECK: vpmullq %ymm25, %ymm25, %ymm25 {%k3} +// CHECK: encoding: [0x62,0x02,0xb5,0x23,0x40,0xc9] + vpmullq %ymm25, %ymm25, %ymm25 {%k3} + +// CHECK: vpmullq %ymm25, %ymm25, %ymm25 {%k3} {z} +// CHECK: encoding: [0x62,0x02,0xb5,0xa3,0x40,0xc9] + vpmullq %ymm25, %ymm25, %ymm25 {%k3} {z} + +// CHECK: vpmullq (%rcx), %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x40,0x09] + vpmullq (%rcx), %ymm25, %ymm25 + +// CHECK: vpmullq 291(%rax,%r14,8), %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x22,0xb5,0x20,0x40,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpmullq 291(%rax,%r14,8), %ymm25, %ymm25 + +// CHECK: vpmullq (%rcx){1to4}, %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x30,0x40,0x09] + vpmullq (%rcx){1to4}, %ymm25, %ymm25 + +// CHECK: vpmullq 4064(%rdx), %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x40,0x4a,0x7f] + vpmullq 4064(%rdx), %ymm25, %ymm25 + +// CHECK: vpmullq 4096(%rdx), %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x40,0x8a,0x00,0x10,0x00,0x00] + vpmullq 4096(%rdx), %ymm25, %ymm25 + +// CHECK: vpmullq -4096(%rdx), %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x40,0x4a,0x80] + vpmullq -4096(%rdx), %ymm25, %ymm25 + +// CHECK: vpmullq -4128(%rdx), %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x40,0x8a,0xe0,0xef,0xff,0xff] + vpmullq -4128(%rdx), %ymm25, %ymm25 + +// CHECK: vpmullq 1016(%rdx){1to4}, %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x30,0x40,0x4a,0x7f] + vpmullq 1016(%rdx){1to4}, %ymm25, %ymm25 + +// CHECK: vpmullq 1024(%rdx){1to4}, %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x30,0x40,0x8a,0x00,0x04,0x00,0x00] + vpmullq 1024(%rdx){1to4}, %ymm25, %ymm25 + +// CHECK: vpmullq -1024(%rdx){1to4}, %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x30,0x40,0x4a,0x80] + vpmullq -1024(%rdx){1to4}, %ymm25, %ymm25 + +// CHECK: vpmullq -1032(%rdx){1to4}, %ymm25, %ymm25 +// CHECK: encoding: [0x62,0x62,0xb5,0x30,0x40,0x8a,0xf8,0xfb,0xff,0xff] + vpmullq -1032(%rdx){1to4}, %ymm25, %ymm25 diff --git a/test/MC/X86/x86-64-avx512f_vl.s b/test/MC/X86/x86-64-avx512f_vl.s new file mode 100644 index 0000000..973a553 --- /dev/null +++ b/test/MC/X86/x86-64-avx512f_vl.s @@ -0,0 +1,6581 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512vl --show-encoding %s | FileCheck %s + +// CHECK: vaddpd %xmm19, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xa1,0x95,0x00,0x58,0xe3] + vaddpd %xmm19, %xmm29, %xmm20 + +// CHECK: vaddpd %xmm19, %xmm29, %xmm20 {%k7} +// CHECK: encoding: [0x62,0xa1,0x95,0x07,0x58,0xe3] + vaddpd %xmm19, %xmm29, %xmm20 {%k7} + +// CHECK: vaddpd %xmm19, %xmm29, %xmm20 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x95,0x87,0x58,0xe3] + vaddpd %xmm19, %xmm29, %xmm20 {%k7} {z} + +// CHECK: vaddpd (%rcx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x58,0x21] + vaddpd (%rcx), %xmm29, %xmm20 + +// CHECK: vaddpd 291(%rax,%r14,8), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xa1,0x95,0x00,0x58,0xa4,0xf0,0x23,0x01,0x00,0x00] + vaddpd 291(%rax,%r14,8), %xmm29, %xmm20 + +// CHECK: vaddpd (%rcx){1to2}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x58,0x21] + vaddpd (%rcx){1to2}, %xmm29, %xmm20 + +// CHECK: vaddpd 2032(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x58,0x62,0x7f] + vaddpd 2032(%rdx), %xmm29, %xmm20 + +// CHECK: vaddpd 2048(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x58,0xa2,0x00,0x08,0x00,0x00] + vaddpd 2048(%rdx), %xmm29, %xmm20 + +// CHECK: vaddpd -2048(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x58,0x62,0x80] + vaddpd -2048(%rdx), %xmm29, %xmm20 + +// CHECK: vaddpd -2064(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x58,0xa2,0xf0,0xf7,0xff,0xff] + vaddpd -2064(%rdx), %xmm29, %xmm20 + +// CHECK: vaddpd 1016(%rdx){1to2}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x58,0x62,0x7f] + vaddpd 1016(%rdx){1to2}, %xmm29, %xmm20 + +// CHECK: vaddpd 1024(%rdx){1to2}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x58,0xa2,0x00,0x04,0x00,0x00] + vaddpd 1024(%rdx){1to2}, %xmm29, %xmm20 + +// CHECK: vaddpd -1024(%rdx){1to2}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x58,0x62,0x80] + vaddpd -1024(%rdx){1to2}, %xmm29, %xmm20 + +// CHECK: vaddpd -1032(%rdx){1to2}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x58,0xa2,0xf8,0xfb,0xff,0xff] + vaddpd -1032(%rdx){1to2}, %xmm29, %xmm20 + +// CHECK: vaddpd %ymm26, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x01,0xad,0x20,0x58,0xe2] + vaddpd %ymm26, %ymm26, %ymm28 + +// CHECK: vaddpd %ymm26, %ymm26, %ymm28 {%k1} +// CHECK: encoding: [0x62,0x01,0xad,0x21,0x58,0xe2] + vaddpd %ymm26, %ymm26, %ymm28 {%k1} + +// CHECK: vaddpd %ymm26, %ymm26, %ymm28 {%k1} {z} +// CHECK: encoding: [0x62,0x01,0xad,0xa1,0x58,0xe2] + vaddpd %ymm26, %ymm26, %ymm28 {%k1} {z} + +// CHECK: vaddpd (%rcx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0x58,0x21] + vaddpd (%rcx), %ymm26, %ymm28 + +// CHECK: vaddpd 291(%rax,%r14,8), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x21,0xad,0x20,0x58,0xa4,0xf0,0x23,0x01,0x00,0x00] + vaddpd 291(%rax,%r14,8), %ymm26, %ymm28 + +// CHECK: vaddpd (%rcx){1to4}, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0x58,0x21] + vaddpd (%rcx){1to4}, %ymm26, %ymm28 + +// CHECK: vaddpd 4064(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0x58,0x62,0x7f] + vaddpd 4064(%rdx), %ymm26, %ymm28 + +// CHECK: vaddpd 4096(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0x58,0xa2,0x00,0x10,0x00,0x00] + vaddpd 4096(%rdx), %ymm26, %ymm28 + +// CHECK: vaddpd -4096(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0x58,0x62,0x80] + vaddpd -4096(%rdx), %ymm26, %ymm28 + +// CHECK: vaddpd -4128(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0x58,0xa2,0xe0,0xef,0xff,0xff] + vaddpd -4128(%rdx), %ymm26, %ymm28 + +// CHECK: vaddpd 1016(%rdx){1to4}, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0x58,0x62,0x7f] + vaddpd 1016(%rdx){1to4}, %ymm26, %ymm28 + +// CHECK: vaddpd 1024(%rdx){1to4}, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0x58,0xa2,0x00,0x04,0x00,0x00] + vaddpd 1024(%rdx){1to4}, %ymm26, %ymm28 + +// CHECK: vaddpd -1024(%rdx){1to4}, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0x58,0x62,0x80] + vaddpd -1024(%rdx){1to4}, %ymm26, %ymm28 + +// CHECK: vaddpd -1032(%rdx){1to4}, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0x58,0xa2,0xf8,0xfb,0xff,0xff] + vaddpd -1032(%rdx){1to4}, %ymm26, %ymm28 + +// CHECK: vaddps %xmm27, %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x01,0x64,0x00,0x58,0xc3] + vaddps %xmm27, %xmm19, %xmm24 + +// CHECK: vaddps %xmm27, %xmm19, %xmm24 {%k4} +// CHECK: encoding: [0x62,0x01,0x64,0x04,0x58,0xc3] + vaddps %xmm27, %xmm19, %xmm24 {%k4} + +// CHECK: vaddps %xmm27, %xmm19, %xmm24 {%k4} {z} +// CHECK: encoding: [0x62,0x01,0x64,0x84,0x58,0xc3] + vaddps %xmm27, %xmm19, %xmm24 {%k4} {z} + +// CHECK: vaddps (%rcx), %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x00,0x58,0x01] + vaddps (%rcx), %xmm19, %xmm24 + +// CHECK: vaddps 291(%rax,%r14,8), %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x21,0x64,0x00,0x58,0x84,0xf0,0x23,0x01,0x00,0x00] + vaddps 291(%rax,%r14,8), %xmm19, %xmm24 + +// CHECK: vaddps (%rcx){1to4}, %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x10,0x58,0x01] + vaddps (%rcx){1to4}, %xmm19, %xmm24 + +// CHECK: vaddps 2032(%rdx), %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x00,0x58,0x42,0x7f] + vaddps 2032(%rdx), %xmm19, %xmm24 + +// CHECK: vaddps 2048(%rdx), %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x00,0x58,0x82,0x00,0x08,0x00,0x00] + vaddps 2048(%rdx), %xmm19, %xmm24 + +// CHECK: vaddps -2048(%rdx), %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x00,0x58,0x42,0x80] + vaddps -2048(%rdx), %xmm19, %xmm24 + +// CHECK: vaddps -2064(%rdx), %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x00,0x58,0x82,0xf0,0xf7,0xff,0xff] + vaddps -2064(%rdx), %xmm19, %xmm24 + +// CHECK: vaddps 508(%rdx){1to4}, %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x10,0x58,0x42,0x7f] + vaddps 508(%rdx){1to4}, %xmm19, %xmm24 + +// CHECK: vaddps 512(%rdx){1to4}, %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x10,0x58,0x82,0x00,0x02,0x00,0x00] + vaddps 512(%rdx){1to4}, %xmm19, %xmm24 + +// CHECK: vaddps -512(%rdx){1to4}, %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x10,0x58,0x42,0x80] + vaddps -512(%rdx){1to4}, %xmm19, %xmm24 + +// CHECK: vaddps -516(%rdx){1to4}, %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x61,0x64,0x10,0x58,0x82,0xfc,0xfd,0xff,0xff] + vaddps -516(%rdx){1to4}, %xmm19, %xmm24 + +// CHECK: vaddps %ymm20, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x21,0x2c,0x20,0x58,0xcc] + vaddps %ymm20, %ymm26, %ymm25 + +// CHECK: vaddps %ymm20, %ymm26, %ymm25 {%k4} +// CHECK: encoding: [0x62,0x21,0x2c,0x24,0x58,0xcc] + vaddps %ymm20, %ymm26, %ymm25 {%k4} + +// CHECK: vaddps %ymm20, %ymm26, %ymm25 {%k4} {z} +// CHECK: encoding: [0x62,0x21,0x2c,0xa4,0x58,0xcc] + vaddps %ymm20, %ymm26, %ymm25 {%k4} {z} + +// CHECK: vaddps (%rcx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x58,0x09] + vaddps (%rcx), %ymm26, %ymm25 + +// CHECK: vaddps 291(%rax,%r14,8), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x21,0x2c,0x20,0x58,0x8c,0xf0,0x23,0x01,0x00,0x00] + vaddps 291(%rax,%r14,8), %ymm26, %ymm25 + +// CHECK: vaddps (%rcx){1to8}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x58,0x09] + vaddps (%rcx){1to8}, %ymm26, %ymm25 + +// CHECK: vaddps 4064(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x58,0x4a,0x7f] + vaddps 4064(%rdx), %ymm26, %ymm25 + +// CHECK: vaddps 4096(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x58,0x8a,0x00,0x10,0x00,0x00] + vaddps 4096(%rdx), %ymm26, %ymm25 + +// CHECK: vaddps -4096(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x58,0x4a,0x80] + vaddps -4096(%rdx), %ymm26, %ymm25 + +// CHECK: vaddps -4128(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x58,0x8a,0xe0,0xef,0xff,0xff] + vaddps -4128(%rdx), %ymm26, %ymm25 + +// CHECK: vaddps 508(%rdx){1to8}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x58,0x4a,0x7f] + vaddps 508(%rdx){1to8}, %ymm26, %ymm25 + +// CHECK: vaddps 512(%rdx){1to8}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x58,0x8a,0x00,0x02,0x00,0x00] + vaddps 512(%rdx){1to8}, %ymm26, %ymm25 + +// CHECK: vaddps -512(%rdx){1to8}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x58,0x4a,0x80] + vaddps -512(%rdx){1to8}, %ymm26, %ymm25 + +// CHECK: vaddps -516(%rdx){1to8}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x58,0x8a,0xfc,0xfd,0xff,0xff] + vaddps -516(%rdx){1to8}, %ymm26, %ymm25 + +// CHECK: vbroadcastsd (%rcx), %ymm22 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x19,0x31] + vbroadcastsd (%rcx), %ymm22 + +// CHECK: vbroadcastsd (%rcx), %ymm22 {%k5} +// CHECK: encoding: [0x62,0xe2,0xfd,0x2d,0x19,0x31] + vbroadcastsd (%rcx), %ymm22 {%k5} + +// CHECK: vbroadcastsd (%rcx), %ymm22 {%k5} {z} +// CHECK: encoding: [0x62,0xe2,0xfd,0xad,0x19,0x31] + vbroadcastsd (%rcx), %ymm22 {%k5} {z} + +// CHECK: vbroadcastsd 291(%rax,%r14,8), %ymm22 +// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x19,0xb4,0xf0,0x23,0x01,0x00,0x00] + vbroadcastsd 291(%rax,%r14,8), %ymm22 + +// CHECK: vbroadcastsd 1016(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x19,0x72,0x7f] + vbroadcastsd 1016(%rdx), %ymm22 + +// CHECK: vbroadcastsd 1024(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x19,0xb2,0x00,0x04,0x00,0x00] + vbroadcastsd 1024(%rdx), %ymm22 + +// CHECK: vbroadcastsd -1024(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x19,0x72,0x80] + vbroadcastsd -1024(%rdx), %ymm22 + +// CHECK: vbroadcastsd -1032(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x19,0xb2,0xf8,0xfb,0xff,0xff] + vbroadcastsd -1032(%rdx), %ymm22 + +// CHECK: vbroadcastsd %xmm17, %ymm19 +// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x19,0xd9] + vbroadcastsd %xmm17, %ymm19 + +// CHECK: vbroadcastsd %xmm17, %ymm19 {%k6} +// CHECK: encoding: [0x62,0xa2,0xfd,0x2e,0x19,0xd9] + vbroadcastsd %xmm17, %ymm19 {%k6} + +// CHECK: vbroadcastsd %xmm17, %ymm19 {%k6} {z} +// CHECK: encoding: [0x62,0xa2,0xfd,0xae,0x19,0xd9] + vbroadcastsd %xmm17, %ymm19 {%k6} {z} + +// CHECK: vbroadcastss (%rcx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x18,0x29] + vbroadcastss (%rcx), %xmm21 + +// CHECK: vbroadcastss (%rcx), %xmm21 {%k2} +// CHECK: encoding: [0x62,0xe2,0x7d,0x0a,0x18,0x29] + vbroadcastss (%rcx), %xmm21 {%k2} + +// CHECK: vbroadcastss (%rcx), %xmm21 {%k2} {z} +// CHECK: encoding: [0x62,0xe2,0x7d,0x8a,0x18,0x29] + vbroadcastss (%rcx), %xmm21 {%k2} {z} + +// CHECK: vbroadcastss 291(%rax,%r14,8), %xmm21 +// CHECK: encoding: [0x62,0xa2,0x7d,0x08,0x18,0xac,0xf0,0x23,0x01,0x00,0x00] + vbroadcastss 291(%rax,%r14,8), %xmm21 + +// CHECK: vbroadcastss 508(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x18,0x6a,0x7f] + vbroadcastss 508(%rdx), %xmm21 + +// CHECK: vbroadcastss 512(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x18,0xaa,0x00,0x02,0x00,0x00] + vbroadcastss 512(%rdx), %xmm21 + +// CHECK: vbroadcastss -512(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x18,0x6a,0x80] + vbroadcastss -512(%rdx), %xmm21 + +// CHECK: vbroadcastss -516(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x18,0xaa,0xfc,0xfd,0xff,0xff] + vbroadcastss -516(%rdx), %xmm21 + +// CHECK: vbroadcastss (%rcx), %ymm30 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x18,0x31] + vbroadcastss (%rcx), %ymm30 + +// CHECK: vbroadcastss (%rcx), %ymm30 {%k1} +// CHECK: encoding: [0x62,0x62,0x7d,0x29,0x18,0x31] + vbroadcastss (%rcx), %ymm30 {%k1} + +// CHECK: vbroadcastss (%rcx), %ymm30 {%k1} {z} +// CHECK: encoding: [0x62,0x62,0x7d,0xa9,0x18,0x31] + vbroadcastss (%rcx), %ymm30 {%k1} {z} + +// CHECK: vbroadcastss 291(%rax,%r14,8), %ymm30 +// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x18,0xb4,0xf0,0x23,0x01,0x00,0x00] + vbroadcastss 291(%rax,%r14,8), %ymm30 + +// CHECK: vbroadcastss 508(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x18,0x72,0x7f] + vbroadcastss 508(%rdx), %ymm30 + +// CHECK: vbroadcastss 512(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x18,0xb2,0x00,0x02,0x00,0x00] + vbroadcastss 512(%rdx), %ymm30 + +// CHECK: vbroadcastss -512(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x18,0x72,0x80] + vbroadcastss -512(%rdx), %ymm30 + +// CHECK: vbroadcastss -516(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x18,0xb2,0xfc,0xfd,0xff,0xff] + vbroadcastss -516(%rdx), %ymm30 + +// CHECK: vbroadcastss %xmm24, %xmm24 +// CHECK: encoding: [0x62,0x02,0x7d,0x08,0x18,0xc0] + vbroadcastss %xmm24, %xmm24 + +// CHECK: vbroadcastss %xmm24, %xmm24 {%k2} +// CHECK: encoding: [0x62,0x02,0x7d,0x0a,0x18,0xc0] + vbroadcastss %xmm24, %xmm24 {%k2} + +// CHECK: vbroadcastss %xmm24, %xmm24 {%k2} {z} +// CHECK: encoding: [0x62,0x02,0x7d,0x8a,0x18,0xc0] + vbroadcastss %xmm24, %xmm24 {%k2} {z} + +// CHECK: vbroadcastss %xmm28, %ymm24 +// CHECK: encoding: [0x62,0x02,0x7d,0x28,0x18,0xc4] + vbroadcastss %xmm28, %ymm24 + +// CHECK: vbroadcastss %xmm28, %ymm24 {%k6} +// CHECK: encoding: [0x62,0x02,0x7d,0x2e,0x18,0xc4] + vbroadcastss %xmm28, %ymm24 {%k6} + +// CHECK: vbroadcastss %xmm28, %ymm24 {%k6} {z} +// CHECK: encoding: [0x62,0x02,0x7d,0xae,0x18,0xc4] + vbroadcastss %xmm28, %ymm24 {%k6} {z} + +// CHECK: vdivpd %xmm27, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0x81,0xed,0x00,0x5e,0xdb] + vdivpd %xmm27, %xmm18, %xmm19 + +// CHECK: vdivpd %xmm27, %xmm18, %xmm19 {%k3} +// CHECK: encoding: [0x62,0x81,0xed,0x03,0x5e,0xdb] + vdivpd %xmm27, %xmm18, %xmm19 {%k3} + +// CHECK: vdivpd %xmm27, %xmm18, %xmm19 {%k3} {z} +// CHECK: encoding: [0x62,0x81,0xed,0x83,0x5e,0xdb] + vdivpd %xmm27, %xmm18, %xmm19 {%k3} {z} + +// CHECK: vdivpd (%rcx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x00,0x5e,0x19] + vdivpd (%rcx), %xmm18, %xmm19 + +// CHECK: vdivpd 291(%rax,%r14,8), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xa1,0xed,0x00,0x5e,0x9c,0xf0,0x23,0x01,0x00,0x00] + vdivpd 291(%rax,%r14,8), %xmm18, %xmm19 + +// CHECK: vdivpd (%rcx){1to2}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x10,0x5e,0x19] + vdivpd (%rcx){1to2}, %xmm18, %xmm19 + +// CHECK: vdivpd 2032(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x00,0x5e,0x5a,0x7f] + vdivpd 2032(%rdx), %xmm18, %xmm19 + +// CHECK: vdivpd 2048(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x00,0x5e,0x9a,0x00,0x08,0x00,0x00] + vdivpd 2048(%rdx), %xmm18, %xmm19 + +// CHECK: vdivpd -2048(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x00,0x5e,0x5a,0x80] + vdivpd -2048(%rdx), %xmm18, %xmm19 + +// CHECK: vdivpd -2064(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x00,0x5e,0x9a,0xf0,0xf7,0xff,0xff] + vdivpd -2064(%rdx), %xmm18, %xmm19 + +// CHECK: vdivpd 1016(%rdx){1to2}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x10,0x5e,0x5a,0x7f] + vdivpd 1016(%rdx){1to2}, %xmm18, %xmm19 + +// CHECK: vdivpd 1024(%rdx){1to2}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x10,0x5e,0x9a,0x00,0x04,0x00,0x00] + vdivpd 1024(%rdx){1to2}, %xmm18, %xmm19 + +// CHECK: vdivpd -1024(%rdx){1to2}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x10,0x5e,0x5a,0x80] + vdivpd -1024(%rdx){1to2}, %xmm18, %xmm19 + +// CHECK: vdivpd -1032(%rdx){1to2}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0xed,0x10,0x5e,0x9a,0xf8,0xfb,0xff,0xff] + vdivpd -1032(%rdx){1to2}, %xmm18, %xmm19 + +// CHECK: vdivpd %ymm28, %ymm24, %ymm23 +// CHECK: encoding: [0x62,0x81,0xbd,0x20,0x5e,0xfc] + vdivpd %ymm28, %ymm24, %ymm23 + +// CHECK: vdivpd %ymm28, %ymm24, %ymm23 {%k6} +// CHECK: encoding: [0x62,0x81,0xbd,0x26,0x5e,0xfc] + vdivpd %ymm28, %ymm24, %ymm23 {%k6} + +// CHECK: vdivpd %ymm28, %ymm24, %ymm23 {%k6} {z} +// CHECK: encoding: [0x62,0x81,0xbd,0xa6,0x5e,0xfc] + vdivpd %ymm28, %ymm24, %ymm23 {%k6} {z} + +// CHECK: vdivpd (%rcx), %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5e,0x39] + vdivpd (%rcx), %ymm24, %ymm23 + +// CHECK: vdivpd 291(%rax,%r14,8), %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xa1,0xbd,0x20,0x5e,0xbc,0xf0,0x23,0x01,0x00,0x00] + vdivpd 291(%rax,%r14,8), %ymm24, %ymm23 + +// CHECK: vdivpd (%rcx){1to4}, %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5e,0x39] + vdivpd (%rcx){1to4}, %ymm24, %ymm23 + +// CHECK: vdivpd 4064(%rdx), %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5e,0x7a,0x7f] + vdivpd 4064(%rdx), %ymm24, %ymm23 + +// CHECK: vdivpd 4096(%rdx), %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5e,0xba,0x00,0x10,0x00,0x00] + vdivpd 4096(%rdx), %ymm24, %ymm23 + +// CHECK: vdivpd -4096(%rdx), %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5e,0x7a,0x80] + vdivpd -4096(%rdx), %ymm24, %ymm23 + +// CHECK: vdivpd -4128(%rdx), %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5e,0xba,0xe0,0xef,0xff,0xff] + vdivpd -4128(%rdx), %ymm24, %ymm23 + +// CHECK: vdivpd 1016(%rdx){1to4}, %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5e,0x7a,0x7f] + vdivpd 1016(%rdx){1to4}, %ymm24, %ymm23 + +// CHECK: vdivpd 1024(%rdx){1to4}, %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5e,0xba,0x00,0x04,0x00,0x00] + vdivpd 1024(%rdx){1to4}, %ymm24, %ymm23 + +// CHECK: vdivpd -1024(%rdx){1to4}, %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5e,0x7a,0x80] + vdivpd -1024(%rdx){1to4}, %ymm24, %ymm23 + +// CHECK: vdivpd -1032(%rdx){1to4}, %ymm24, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5e,0xba,0xf8,0xfb,0xff,0xff] + vdivpd -1032(%rdx){1to4}, %ymm24, %ymm23 + +// CHECK: vdivps %xmm26, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0x81,0x3c,0x00,0x5e,0xca] + vdivps %xmm26, %xmm24, %xmm17 + +// CHECK: vdivps %xmm26, %xmm24, %xmm17 {%k2} +// CHECK: encoding: [0x62,0x81,0x3c,0x02,0x5e,0xca] + vdivps %xmm26, %xmm24, %xmm17 {%k2} + +// CHECK: vdivps %xmm26, %xmm24, %xmm17 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0x3c,0x82,0x5e,0xca] + vdivps %xmm26, %xmm24, %xmm17 {%k2} {z} + +// CHECK: vdivps (%rcx), %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x00,0x5e,0x09] + vdivps (%rcx), %xmm24, %xmm17 + +// CHECK: vdivps 291(%rax,%r14,8), %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x3c,0x00,0x5e,0x8c,0xf0,0x23,0x01,0x00,0x00] + vdivps 291(%rax,%r14,8), %xmm24, %xmm17 + +// CHECK: vdivps (%rcx){1to4}, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x10,0x5e,0x09] + vdivps (%rcx){1to4}, %xmm24, %xmm17 + +// CHECK: vdivps 2032(%rdx), %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x00,0x5e,0x4a,0x7f] + vdivps 2032(%rdx), %xmm24, %xmm17 + +// CHECK: vdivps 2048(%rdx), %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x00,0x5e,0x8a,0x00,0x08,0x00,0x00] + vdivps 2048(%rdx), %xmm24, %xmm17 + +// CHECK: vdivps -2048(%rdx), %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x00,0x5e,0x4a,0x80] + vdivps -2048(%rdx), %xmm24, %xmm17 + +// CHECK: vdivps -2064(%rdx), %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x00,0x5e,0x8a,0xf0,0xf7,0xff,0xff] + vdivps -2064(%rdx), %xmm24, %xmm17 + +// CHECK: vdivps 508(%rdx){1to4}, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x10,0x5e,0x4a,0x7f] + vdivps 508(%rdx){1to4}, %xmm24, %xmm17 + +// CHECK: vdivps 512(%rdx){1to4}, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x10,0x5e,0x8a,0x00,0x02,0x00,0x00] + vdivps 512(%rdx){1to4}, %xmm24, %xmm17 + +// CHECK: vdivps -512(%rdx){1to4}, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x10,0x5e,0x4a,0x80] + vdivps -512(%rdx){1to4}, %xmm24, %xmm17 + +// CHECK: vdivps -516(%rdx){1to4}, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x3c,0x10,0x5e,0x8a,0xfc,0xfd,0xff,0xff] + vdivps -516(%rdx){1to4}, %xmm24, %xmm17 + +// CHECK: vdivps %ymm17, %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xa1,0x24,0x20,0x5e,0xc9] + vdivps %ymm17, %ymm27, %ymm17 + +// CHECK: vdivps %ymm17, %ymm27, %ymm17 {%k6} +// CHECK: encoding: [0x62,0xa1,0x24,0x26,0x5e,0xc9] + vdivps %ymm17, %ymm27, %ymm17 {%k6} + +// CHECK: vdivps %ymm17, %ymm27, %ymm17 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0x24,0xa6,0x5e,0xc9] + vdivps %ymm17, %ymm27, %ymm17 {%k6} {z} + +// CHECK: vdivps (%rcx), %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x20,0x5e,0x09] + vdivps (%rcx), %ymm27, %ymm17 + +// CHECK: vdivps 291(%rax,%r14,8), %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xa1,0x24,0x20,0x5e,0x8c,0xf0,0x23,0x01,0x00,0x00] + vdivps 291(%rax,%r14,8), %ymm27, %ymm17 + +// CHECK: vdivps (%rcx){1to8}, %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x30,0x5e,0x09] + vdivps (%rcx){1to8}, %ymm27, %ymm17 + +// CHECK: vdivps 4064(%rdx), %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x20,0x5e,0x4a,0x7f] + vdivps 4064(%rdx), %ymm27, %ymm17 + +// CHECK: vdivps 4096(%rdx), %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x20,0x5e,0x8a,0x00,0x10,0x00,0x00] + vdivps 4096(%rdx), %ymm27, %ymm17 + +// CHECK: vdivps -4096(%rdx), %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x20,0x5e,0x4a,0x80] + vdivps -4096(%rdx), %ymm27, %ymm17 + +// CHECK: vdivps -4128(%rdx), %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x20,0x5e,0x8a,0xe0,0xef,0xff,0xff] + vdivps -4128(%rdx), %ymm27, %ymm17 + +// CHECK: vdivps 508(%rdx){1to8}, %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x30,0x5e,0x4a,0x7f] + vdivps 508(%rdx){1to8}, %ymm27, %ymm17 + +// CHECK: vdivps 512(%rdx){1to8}, %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x30,0x5e,0x8a,0x00,0x02,0x00,0x00] + vdivps 512(%rdx){1to8}, %ymm27, %ymm17 + +// CHECK: vdivps -512(%rdx){1to8}, %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x30,0x5e,0x4a,0x80] + vdivps -512(%rdx){1to8}, %ymm27, %ymm17 + +// CHECK: vdivps -516(%rdx){1to8}, %ymm27, %ymm17 +// CHECK: encoding: [0x62,0xe1,0x24,0x30,0x5e,0x8a,0xfc,0xfd,0xff,0xff] + vdivps -516(%rdx){1to8}, %ymm27, %ymm17 + +// CHECK: vmaxpd %xmm23, %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x95,0x00,0x5f,0xcf] + vmaxpd %xmm23, %xmm29, %xmm17 + +// CHECK: vmaxpd %xmm23, %xmm29, %xmm17 {%k6} +// CHECK: encoding: [0x62,0xa1,0x95,0x06,0x5f,0xcf] + vmaxpd %xmm23, %xmm29, %xmm17 {%k6} + +// CHECK: vmaxpd %xmm23, %xmm29, %xmm17 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0x95,0x86,0x5f,0xcf] + vmaxpd %xmm23, %xmm29, %xmm17 {%k6} {z} + +// CHECK: vmaxpd (%rcx), %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x5f,0x09] + vmaxpd (%rcx), %xmm29, %xmm17 + +// CHECK: vmaxpd 291(%rax,%r14,8), %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x95,0x00,0x5f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmaxpd 291(%rax,%r14,8), %xmm29, %xmm17 + +// CHECK: vmaxpd (%rcx){1to2}, %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x5f,0x09] + vmaxpd (%rcx){1to2}, %xmm29, %xmm17 + +// CHECK: vmaxpd 2032(%rdx), %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x5f,0x4a,0x7f] + vmaxpd 2032(%rdx), %xmm29, %xmm17 + +// CHECK: vmaxpd 2048(%rdx), %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x5f,0x8a,0x00,0x08,0x00,0x00] + vmaxpd 2048(%rdx), %xmm29, %xmm17 + +// CHECK: vmaxpd -2048(%rdx), %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x5f,0x4a,0x80] + vmaxpd -2048(%rdx), %xmm29, %xmm17 + +// CHECK: vmaxpd -2064(%rdx), %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x00,0x5f,0x8a,0xf0,0xf7,0xff,0xff] + vmaxpd -2064(%rdx), %xmm29, %xmm17 + +// CHECK: vmaxpd 1016(%rdx){1to2}, %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x5f,0x4a,0x7f] + vmaxpd 1016(%rdx){1to2}, %xmm29, %xmm17 + +// CHECK: vmaxpd 1024(%rdx){1to2}, %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x5f,0x8a,0x00,0x04,0x00,0x00] + vmaxpd 1024(%rdx){1to2}, %xmm29, %xmm17 + +// CHECK: vmaxpd -1024(%rdx){1to2}, %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x5f,0x4a,0x80] + vmaxpd -1024(%rdx){1to2}, %xmm29, %xmm17 + +// CHECK: vmaxpd -1032(%rdx){1to2}, %xmm29, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x95,0x10,0x5f,0x8a,0xf8,0xfb,0xff,0xff] + vmaxpd -1032(%rdx){1to2}, %xmm29, %xmm17 + +// CHECK: vmaxpd %ymm24, %ymm24, %ymm21 +// CHECK: encoding: [0x62,0x81,0xbd,0x20,0x5f,0xe8] + vmaxpd %ymm24, %ymm24, %ymm21 + +// CHECK: vmaxpd %ymm24, %ymm24, %ymm21 {%k1} +// CHECK: encoding: [0x62,0x81,0xbd,0x21,0x5f,0xe8] + vmaxpd %ymm24, %ymm24, %ymm21 {%k1} + +// CHECK: vmaxpd %ymm24, %ymm24, %ymm21 {%k1} {z} +// CHECK: encoding: [0x62,0x81,0xbd,0xa1,0x5f,0xe8] + vmaxpd %ymm24, %ymm24, %ymm21 {%k1} {z} + +// CHECK: vmaxpd (%rcx), %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5f,0x29] + vmaxpd (%rcx), %ymm24, %ymm21 + +// CHECK: vmaxpd 291(%rax,%r14,8), %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xa1,0xbd,0x20,0x5f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmaxpd 291(%rax,%r14,8), %ymm24, %ymm21 + +// CHECK: vmaxpd (%rcx){1to4}, %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5f,0x29] + vmaxpd (%rcx){1to4}, %ymm24, %ymm21 + +// CHECK: vmaxpd 4064(%rdx), %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5f,0x6a,0x7f] + vmaxpd 4064(%rdx), %ymm24, %ymm21 + +// CHECK: vmaxpd 4096(%rdx), %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5f,0xaa,0x00,0x10,0x00,0x00] + vmaxpd 4096(%rdx), %ymm24, %ymm21 + +// CHECK: vmaxpd -4096(%rdx), %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5f,0x6a,0x80] + vmaxpd -4096(%rdx), %ymm24, %ymm21 + +// CHECK: vmaxpd -4128(%rdx), %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x20,0x5f,0xaa,0xe0,0xef,0xff,0xff] + vmaxpd -4128(%rdx), %ymm24, %ymm21 + +// CHECK: vmaxpd 1016(%rdx){1to4}, %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5f,0x6a,0x7f] + vmaxpd 1016(%rdx){1to4}, %ymm24, %ymm21 + +// CHECK: vmaxpd 1024(%rdx){1to4}, %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5f,0xaa,0x00,0x04,0x00,0x00] + vmaxpd 1024(%rdx){1to4}, %ymm24, %ymm21 + +// CHECK: vmaxpd -1024(%rdx){1to4}, %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5f,0x6a,0x80] + vmaxpd -1024(%rdx){1to4}, %ymm24, %ymm21 + +// CHECK: vmaxpd -1032(%rdx){1to4}, %ymm24, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xbd,0x30,0x5f,0xaa,0xf8,0xfb,0xff,0xff] + vmaxpd -1032(%rdx){1to4}, %ymm24, %ymm21 + +// CHECK: vmaxps %xmm19, %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x21,0x5c,0x00,0x5f,0xc3] + vmaxps %xmm19, %xmm20, %xmm24 + +// CHECK: vmaxps %xmm19, %xmm20, %xmm24 {%k6} +// CHECK: encoding: [0x62,0x21,0x5c,0x06,0x5f,0xc3] + vmaxps %xmm19, %xmm20, %xmm24 {%k6} + +// CHECK: vmaxps %xmm19, %xmm20, %xmm24 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0x5c,0x86,0x5f,0xc3] + vmaxps %xmm19, %xmm20, %xmm24 {%k6} {z} + +// CHECK: vmaxps (%rcx), %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x00,0x5f,0x01] + vmaxps (%rcx), %xmm20, %xmm24 + +// CHECK: vmaxps 291(%rax,%r14,8), %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x21,0x5c,0x00,0x5f,0x84,0xf0,0x23,0x01,0x00,0x00] + vmaxps 291(%rax,%r14,8), %xmm20, %xmm24 + +// CHECK: vmaxps (%rcx){1to4}, %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x10,0x5f,0x01] + vmaxps (%rcx){1to4}, %xmm20, %xmm24 + +// CHECK: vmaxps 2032(%rdx), %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x00,0x5f,0x42,0x7f] + vmaxps 2032(%rdx), %xmm20, %xmm24 + +// CHECK: vmaxps 2048(%rdx), %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x00,0x5f,0x82,0x00,0x08,0x00,0x00] + vmaxps 2048(%rdx), %xmm20, %xmm24 + +// CHECK: vmaxps -2048(%rdx), %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x00,0x5f,0x42,0x80] + vmaxps -2048(%rdx), %xmm20, %xmm24 + +// CHECK: vmaxps -2064(%rdx), %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x00,0x5f,0x82,0xf0,0xf7,0xff,0xff] + vmaxps -2064(%rdx), %xmm20, %xmm24 + +// CHECK: vmaxps 508(%rdx){1to4}, %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x10,0x5f,0x42,0x7f] + vmaxps 508(%rdx){1to4}, %xmm20, %xmm24 + +// CHECK: vmaxps 512(%rdx){1to4}, %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x10,0x5f,0x82,0x00,0x02,0x00,0x00] + vmaxps 512(%rdx){1to4}, %xmm20, %xmm24 + +// CHECK: vmaxps -512(%rdx){1to4}, %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x10,0x5f,0x42,0x80] + vmaxps -512(%rdx){1to4}, %xmm20, %xmm24 + +// CHECK: vmaxps -516(%rdx){1to4}, %xmm20, %xmm24 +// CHECK: encoding: [0x62,0x61,0x5c,0x10,0x5f,0x82,0xfc,0xfd,0xff,0xff] + vmaxps -516(%rdx){1to4}, %xmm20, %xmm24 + +// CHECK: vmaxps %ymm17, %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xa1,0x74,0x20,0x5f,0xd9] + vmaxps %ymm17, %ymm17, %ymm19 + +// CHECK: vmaxps %ymm17, %ymm17, %ymm19 {%k3} +// CHECK: encoding: [0x62,0xa1,0x74,0x23,0x5f,0xd9] + vmaxps %ymm17, %ymm17, %ymm19 {%k3} + +// CHECK: vmaxps %ymm17, %ymm17, %ymm19 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0x74,0xa3,0x5f,0xd9] + vmaxps %ymm17, %ymm17, %ymm19 {%k3} {z} + +// CHECK: vmaxps (%rcx), %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x20,0x5f,0x19] + vmaxps (%rcx), %ymm17, %ymm19 + +// CHECK: vmaxps 291(%rax,%r14,8), %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xa1,0x74,0x20,0x5f,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmaxps 291(%rax,%r14,8), %ymm17, %ymm19 + +// CHECK: vmaxps (%rcx){1to8}, %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x30,0x5f,0x19] + vmaxps (%rcx){1to8}, %ymm17, %ymm19 + +// CHECK: vmaxps 4064(%rdx), %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x20,0x5f,0x5a,0x7f] + vmaxps 4064(%rdx), %ymm17, %ymm19 + +// CHECK: vmaxps 4096(%rdx), %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x20,0x5f,0x9a,0x00,0x10,0x00,0x00] + vmaxps 4096(%rdx), %ymm17, %ymm19 + +// CHECK: vmaxps -4096(%rdx), %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x20,0x5f,0x5a,0x80] + vmaxps -4096(%rdx), %ymm17, %ymm19 + +// CHECK: vmaxps -4128(%rdx), %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x20,0x5f,0x9a,0xe0,0xef,0xff,0xff] + vmaxps -4128(%rdx), %ymm17, %ymm19 + +// CHECK: vmaxps 508(%rdx){1to8}, %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x30,0x5f,0x5a,0x7f] + vmaxps 508(%rdx){1to8}, %ymm17, %ymm19 + +// CHECK: vmaxps 512(%rdx){1to8}, %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x30,0x5f,0x9a,0x00,0x02,0x00,0x00] + vmaxps 512(%rdx){1to8}, %ymm17, %ymm19 + +// CHECK: vmaxps -512(%rdx){1to8}, %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x30,0x5f,0x5a,0x80] + vmaxps -512(%rdx){1to8}, %ymm17, %ymm19 + +// CHECK: vmaxps -516(%rdx){1to8}, %ymm17, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x74,0x30,0x5f,0x9a,0xfc,0xfd,0xff,0xff] + vmaxps -516(%rdx){1to8}, %ymm17, %ymm19 + +// CHECK: vminpd %xmm19, %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x21,0xe5,0x00,0x5d,0xdb] + vminpd %xmm19, %xmm19, %xmm27 + +// CHECK: vminpd %xmm19, %xmm19, %xmm27 {%k6} +// CHECK: encoding: [0x62,0x21,0xe5,0x06,0x5d,0xdb] + vminpd %xmm19, %xmm19, %xmm27 {%k6} + +// CHECK: vminpd %xmm19, %xmm19, %xmm27 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0xe5,0x86,0x5d,0xdb] + vminpd %xmm19, %xmm19, %xmm27 {%k6} {z} + +// CHECK: vminpd (%rcx), %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x00,0x5d,0x19] + vminpd (%rcx), %xmm19, %xmm27 + +// CHECK: vminpd 291(%rax,%r14,8), %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x21,0xe5,0x00,0x5d,0x9c,0xf0,0x23,0x01,0x00,0x00] + vminpd 291(%rax,%r14,8), %xmm19, %xmm27 + +// CHECK: vminpd (%rcx){1to2}, %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x10,0x5d,0x19] + vminpd (%rcx){1to2}, %xmm19, %xmm27 + +// CHECK: vminpd 2032(%rdx), %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x00,0x5d,0x5a,0x7f] + vminpd 2032(%rdx), %xmm19, %xmm27 + +// CHECK: vminpd 2048(%rdx), %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x00,0x5d,0x9a,0x00,0x08,0x00,0x00] + vminpd 2048(%rdx), %xmm19, %xmm27 + +// CHECK: vminpd -2048(%rdx), %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x00,0x5d,0x5a,0x80] + vminpd -2048(%rdx), %xmm19, %xmm27 + +// CHECK: vminpd -2064(%rdx), %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x00,0x5d,0x9a,0xf0,0xf7,0xff,0xff] + vminpd -2064(%rdx), %xmm19, %xmm27 + +// CHECK: vminpd 1016(%rdx){1to2}, %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x10,0x5d,0x5a,0x7f] + vminpd 1016(%rdx){1to2}, %xmm19, %xmm27 + +// CHECK: vminpd 1024(%rdx){1to2}, %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x10,0x5d,0x9a,0x00,0x04,0x00,0x00] + vminpd 1024(%rdx){1to2}, %xmm19, %xmm27 + +// CHECK: vminpd -1024(%rdx){1to2}, %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x10,0x5d,0x5a,0x80] + vminpd -1024(%rdx){1to2}, %xmm19, %xmm27 + +// CHECK: vminpd -1032(%rdx){1to2}, %xmm19, %xmm27 +// CHECK: encoding: [0x62,0x61,0xe5,0x10,0x5d,0x9a,0xf8,0xfb,0xff,0xff] + vminpd -1032(%rdx){1to2}, %xmm19, %xmm27 + +// CHECK: vminpd %ymm23, %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x21,0x95,0x20,0x5d,0xc7] + vminpd %ymm23, %ymm29, %ymm24 + +// CHECK: vminpd %ymm23, %ymm29, %ymm24 {%k6} +// CHECK: encoding: [0x62,0x21,0x95,0x26,0x5d,0xc7] + vminpd %ymm23, %ymm29, %ymm24 {%k6} + +// CHECK: vminpd %ymm23, %ymm29, %ymm24 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0x95,0xa6,0x5d,0xc7] + vminpd %ymm23, %ymm29, %ymm24 {%k6} {z} + +// CHECK: vminpd (%rcx), %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x20,0x5d,0x01] + vminpd (%rcx), %ymm29, %ymm24 + +// CHECK: vminpd 291(%rax,%r14,8), %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x21,0x95,0x20,0x5d,0x84,0xf0,0x23,0x01,0x00,0x00] + vminpd 291(%rax,%r14,8), %ymm29, %ymm24 + +// CHECK: vminpd (%rcx){1to4}, %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x30,0x5d,0x01] + vminpd (%rcx){1to4}, %ymm29, %ymm24 + +// CHECK: vminpd 4064(%rdx), %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x20,0x5d,0x42,0x7f] + vminpd 4064(%rdx), %ymm29, %ymm24 + +// CHECK: vminpd 4096(%rdx), %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x20,0x5d,0x82,0x00,0x10,0x00,0x00] + vminpd 4096(%rdx), %ymm29, %ymm24 + +// CHECK: vminpd -4096(%rdx), %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x20,0x5d,0x42,0x80] + vminpd -4096(%rdx), %ymm29, %ymm24 + +// CHECK: vminpd -4128(%rdx), %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x20,0x5d,0x82,0xe0,0xef,0xff,0xff] + vminpd -4128(%rdx), %ymm29, %ymm24 + +// CHECK: vminpd 1016(%rdx){1to4}, %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x30,0x5d,0x42,0x7f] + vminpd 1016(%rdx){1to4}, %ymm29, %ymm24 + +// CHECK: vminpd 1024(%rdx){1to4}, %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x30,0x5d,0x82,0x00,0x04,0x00,0x00] + vminpd 1024(%rdx){1to4}, %ymm29, %ymm24 + +// CHECK: vminpd -1024(%rdx){1to4}, %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x30,0x5d,0x42,0x80] + vminpd -1024(%rdx){1to4}, %ymm29, %ymm24 + +// CHECK: vminpd -1032(%rdx){1to4}, %ymm29, %ymm24 +// CHECK: encoding: [0x62,0x61,0x95,0x30,0x5d,0x82,0xf8,0xfb,0xff,0xff] + vminpd -1032(%rdx){1to4}, %ymm29, %ymm24 + +// CHECK: vminps %xmm23, %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x5c,0x00,0x5d,0xcf] + vminps %xmm23, %xmm20, %xmm17 + +// CHECK: vminps %xmm23, %xmm20, %xmm17 {%k1} +// CHECK: encoding: [0x62,0xa1,0x5c,0x01,0x5d,0xcf] + vminps %xmm23, %xmm20, %xmm17 {%k1} + +// CHECK: vminps %xmm23, %xmm20, %xmm17 {%k1} {z} +// CHECK: encoding: [0x62,0xa1,0x5c,0x81,0x5d,0xcf] + vminps %xmm23, %xmm20, %xmm17 {%k1} {z} + +// CHECK: vminps (%rcx), %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x00,0x5d,0x09] + vminps (%rcx), %xmm20, %xmm17 + +// CHECK: vminps 291(%rax,%r14,8), %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x5c,0x00,0x5d,0x8c,0xf0,0x23,0x01,0x00,0x00] + vminps 291(%rax,%r14,8), %xmm20, %xmm17 + +// CHECK: vminps (%rcx){1to4}, %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x10,0x5d,0x09] + vminps (%rcx){1to4}, %xmm20, %xmm17 + +// CHECK: vminps 2032(%rdx), %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x00,0x5d,0x4a,0x7f] + vminps 2032(%rdx), %xmm20, %xmm17 + +// CHECK: vminps 2048(%rdx), %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x00,0x5d,0x8a,0x00,0x08,0x00,0x00] + vminps 2048(%rdx), %xmm20, %xmm17 + +// CHECK: vminps -2048(%rdx), %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x00,0x5d,0x4a,0x80] + vminps -2048(%rdx), %xmm20, %xmm17 + +// CHECK: vminps -2064(%rdx), %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x00,0x5d,0x8a,0xf0,0xf7,0xff,0xff] + vminps -2064(%rdx), %xmm20, %xmm17 + +// CHECK: vminps 508(%rdx){1to4}, %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x10,0x5d,0x4a,0x7f] + vminps 508(%rdx){1to4}, %xmm20, %xmm17 + +// CHECK: vminps 512(%rdx){1to4}, %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x10,0x5d,0x8a,0x00,0x02,0x00,0x00] + vminps 512(%rdx){1to4}, %xmm20, %xmm17 + +// CHECK: vminps -512(%rdx){1to4}, %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x10,0x5d,0x4a,0x80] + vminps -512(%rdx){1to4}, %xmm20, %xmm17 + +// CHECK: vminps -516(%rdx){1to4}, %xmm20, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x5c,0x10,0x5d,0x8a,0xfc,0xfd,0xff,0xff] + vminps -516(%rdx){1to4}, %xmm20, %xmm17 + +// CHECK: vminps %ymm21, %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x21,0x3c,0x20,0x5d,0xc5] + vminps %ymm21, %ymm24, %ymm24 + +// CHECK: vminps %ymm21, %ymm24, %ymm24 {%k3} +// CHECK: encoding: [0x62,0x21,0x3c,0x23,0x5d,0xc5] + vminps %ymm21, %ymm24, %ymm24 {%k3} + +// CHECK: vminps %ymm21, %ymm24, %ymm24 {%k3} {z} +// CHECK: encoding: [0x62,0x21,0x3c,0xa3,0x5d,0xc5] + vminps %ymm21, %ymm24, %ymm24 {%k3} {z} + +// CHECK: vminps (%rcx), %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x20,0x5d,0x01] + vminps (%rcx), %ymm24, %ymm24 + +// CHECK: vminps 291(%rax,%r14,8), %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x21,0x3c,0x20,0x5d,0x84,0xf0,0x23,0x01,0x00,0x00] + vminps 291(%rax,%r14,8), %ymm24, %ymm24 + +// CHECK: vminps (%rcx){1to8}, %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x30,0x5d,0x01] + vminps (%rcx){1to8}, %ymm24, %ymm24 + +// CHECK: vminps 4064(%rdx), %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x20,0x5d,0x42,0x7f] + vminps 4064(%rdx), %ymm24, %ymm24 + +// CHECK: vminps 4096(%rdx), %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x20,0x5d,0x82,0x00,0x10,0x00,0x00] + vminps 4096(%rdx), %ymm24, %ymm24 + +// CHECK: vminps -4096(%rdx), %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x20,0x5d,0x42,0x80] + vminps -4096(%rdx), %ymm24, %ymm24 + +// CHECK: vminps -4128(%rdx), %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x20,0x5d,0x82,0xe0,0xef,0xff,0xff] + vminps -4128(%rdx), %ymm24, %ymm24 + +// CHECK: vminps 508(%rdx){1to8}, %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x30,0x5d,0x42,0x7f] + vminps 508(%rdx){1to8}, %ymm24, %ymm24 + +// CHECK: vminps 512(%rdx){1to8}, %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x30,0x5d,0x82,0x00,0x02,0x00,0x00] + vminps 512(%rdx){1to8}, %ymm24, %ymm24 + +// CHECK: vminps -512(%rdx){1to8}, %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x30,0x5d,0x42,0x80] + vminps -512(%rdx){1to8}, %ymm24, %ymm24 + +// CHECK: vminps -516(%rdx){1to8}, %ymm24, %ymm24 +// CHECK: encoding: [0x62,0x61,0x3c,0x30,0x5d,0x82,0xfc,0xfd,0xff,0xff] + vminps -516(%rdx){1to8}, %ymm24, %ymm24 + +// CHECK: vmovapd %xmm21, %xmm21 +// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x28,0xed] + vmovapd %xmm21, %xmm21 + +// CHECK: vmovapd %xmm21, %xmm21 {%k3} +// CHECK: encoding: [0x62,0xa1,0xfd,0x0b,0x28,0xed] + vmovapd %xmm21, %xmm21 {%k3} + +// CHECK: vmovapd %xmm21, %xmm21 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0xfd,0x8b,0x28,0xed] + vmovapd %xmm21, %xmm21 {%k3} {z} + +// CHECK: vmovapd (%rcx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x28,0x29] + vmovapd (%rcx), %xmm21 + +// CHECK: vmovapd 291(%rax,%r14,8), %xmm21 +// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x28,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovapd 291(%rax,%r14,8), %xmm21 + +// CHECK: vmovapd 2032(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x28,0x6a,0x7f] + vmovapd 2032(%rdx), %xmm21 + +// CHECK: vmovapd 2048(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x28,0xaa,0x00,0x08,0x00,0x00] + vmovapd 2048(%rdx), %xmm21 + +// CHECK: vmovapd -2048(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x28,0x6a,0x80] + vmovapd -2048(%rdx), %xmm21 + +// CHECK: vmovapd -2064(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x28,0xaa,0xf0,0xf7,0xff,0xff] + vmovapd -2064(%rdx), %xmm21 + +// CHECK: vmovapd %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x28,0xd1] + vmovapd %ymm17, %ymm18 + +// CHECK: vmovapd %ymm17, %ymm18 {%k2} +// CHECK: encoding: [0x62,0xa1,0xfd,0x2a,0x28,0xd1] + vmovapd %ymm17, %ymm18 {%k2} + +// CHECK: vmovapd %ymm17, %ymm18 {%k2} {z} +// CHECK: encoding: [0x62,0xa1,0xfd,0xaa,0x28,0xd1] + vmovapd %ymm17, %ymm18 {%k2} {z} + +// CHECK: vmovapd (%rcx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x28,0x11] + vmovapd (%rcx), %ymm18 + +// CHECK: vmovapd 291(%rax,%r14,8), %ymm18 +// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x28,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovapd 291(%rax,%r14,8), %ymm18 + +// CHECK: vmovapd 4064(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x28,0x52,0x7f] + vmovapd 4064(%rdx), %ymm18 + +// CHECK: vmovapd 4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x28,0x92,0x00,0x10,0x00,0x00] + vmovapd 4096(%rdx), %ymm18 + +// CHECK: vmovapd -4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x28,0x52,0x80] + vmovapd -4096(%rdx), %ymm18 + +// CHECK: vmovapd -4128(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x28,0x92,0xe0,0xef,0xff,0xff] + vmovapd -4128(%rdx), %ymm18 + +// CHECK: vmovaps %xmm29, %xmm22 +// CHECK: encoding: [0x62,0x81,0x7c,0x08,0x28,0xf5] + vmovaps %xmm29, %xmm22 + +// CHECK: vmovaps %xmm29, %xmm22 {%k1} +// CHECK: encoding: [0x62,0x81,0x7c,0x09,0x28,0xf5] + vmovaps %xmm29, %xmm22 {%k1} + +// CHECK: vmovaps %xmm29, %xmm22 {%k1} {z} +// CHECK: encoding: [0x62,0x81,0x7c,0x89,0x28,0xf5] + vmovaps %xmm29, %xmm22 {%k1} {z} + +// CHECK: vmovaps (%rcx), %xmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x28,0x31] + vmovaps (%rcx), %xmm22 + +// CHECK: vmovaps 291(%rax,%r14,8), %xmm22 +// CHECK: encoding: [0x62,0xa1,0x7c,0x08,0x28,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovaps 291(%rax,%r14,8), %xmm22 + +// CHECK: vmovaps 2032(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x28,0x72,0x7f] + vmovaps 2032(%rdx), %xmm22 + +// CHECK: vmovaps 2048(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x28,0xb2,0x00,0x08,0x00,0x00] + vmovaps 2048(%rdx), %xmm22 + +// CHECK: vmovaps -2048(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x28,0x72,0x80] + vmovaps -2048(%rdx), %xmm22 + +// CHECK: vmovaps -2064(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x28,0xb2,0xf0,0xf7,0xff,0xff] + vmovaps -2064(%rdx), %xmm22 + +// CHECK: vmovaps %ymm28, %ymm25 +// CHECK: encoding: [0x62,0x01,0x7c,0x28,0x28,0xcc] + vmovaps %ymm28, %ymm25 + +// CHECK: vmovaps %ymm28, %ymm25 {%k3} +// CHECK: encoding: [0x62,0x01,0x7c,0x2b,0x28,0xcc] + vmovaps %ymm28, %ymm25 {%k3} + +// CHECK: vmovaps %ymm28, %ymm25 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x7c,0xab,0x28,0xcc] + vmovaps %ymm28, %ymm25 {%k3} {z} + +// CHECK: vmovaps (%rcx), %ymm25 +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x28,0x09] + vmovaps (%rcx), %ymm25 + +// CHECK: vmovaps 291(%rax,%r14,8), %ymm25 +// CHECK: encoding: [0x62,0x21,0x7c,0x28,0x28,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovaps 291(%rax,%r14,8), %ymm25 + +// CHECK: vmovaps 4064(%rdx), %ymm25 +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x28,0x4a,0x7f] + vmovaps 4064(%rdx), %ymm25 + +// CHECK: vmovaps 4096(%rdx), %ymm25 +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x28,0x8a,0x00,0x10,0x00,0x00] + vmovaps 4096(%rdx), %ymm25 + +// CHECK: vmovaps -4096(%rdx), %ymm25 +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x28,0x4a,0x80] + vmovaps -4096(%rdx), %ymm25 + +// CHECK: vmovaps -4128(%rdx), %ymm25 +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x28,0x8a,0xe0,0xef,0xff,0xff] + vmovaps -4128(%rdx), %ymm25 + +// CHECK: vmovdqa32 %xmm24, %xmm21 +// CHECK: encoding: [0x62,0x81,0x7d,0x08,0x6f,0xe8] + vmovdqa32 %xmm24, %xmm21 + +// CHECK: vmovdqa32 %xmm24, %xmm21 {%k6} +// CHECK: encoding: [0x62,0x81,0x7d,0x0e,0x6f,0xe8] + vmovdqa32 %xmm24, %xmm21 {%k6} + +// CHECK: vmovdqa32 %xmm24, %xmm21 {%k6} {z} +// CHECK: encoding: [0x62,0x81,0x7d,0x8e,0x6f,0xe8] + vmovdqa32 %xmm24, %xmm21 {%k6} {z} + +// CHECK: vmovdqa32 (%rcx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x6f,0x29] + vmovdqa32 (%rcx), %xmm21 + +// CHECK: vmovdqa32 291(%rax,%r14,8), %xmm21 +// CHECK: encoding: [0x62,0xa1,0x7d,0x08,0x6f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqa32 291(%rax,%r14,8), %xmm21 + +// CHECK: vmovdqa32 2032(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x6f,0x6a,0x7f] + vmovdqa32 2032(%rdx), %xmm21 + +// CHECK: vmovdqa32 2048(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x6f,0xaa,0x00,0x08,0x00,0x00] + vmovdqa32 2048(%rdx), %xmm21 + +// CHECK: vmovdqa32 -2048(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x6f,0x6a,0x80] + vmovdqa32 -2048(%rdx), %xmm21 + +// CHECK: vmovdqa32 -2064(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x6f,0xaa,0xf0,0xf7,0xff,0xff] + vmovdqa32 -2064(%rdx), %xmm21 + +// CHECK: vmovdqa32 %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x01,0x7d,0x28,0x6f,0xc4] + vmovdqa32 %ymm28, %ymm24 + +// CHECK: vmovdqa32 %ymm28, %ymm24 {%k5} +// CHECK: encoding: [0x62,0x01,0x7d,0x2d,0x6f,0xc4] + vmovdqa32 %ymm28, %ymm24 {%k5} + +// CHECK: vmovdqa32 %ymm28, %ymm24 {%k5} {z} +// CHECK: encoding: [0x62,0x01,0x7d,0xad,0x6f,0xc4] + vmovdqa32 %ymm28, %ymm24 {%k5} {z} + +// CHECK: vmovdqa32 (%rcx), %ymm24 +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x6f,0x01] + vmovdqa32 (%rcx), %ymm24 + +// CHECK: vmovdqa32 291(%rax,%r14,8), %ymm24 +// CHECK: encoding: [0x62,0x21,0x7d,0x28,0x6f,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovdqa32 291(%rax,%r14,8), %ymm24 + +// CHECK: vmovdqa32 4064(%rdx), %ymm24 +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x6f,0x42,0x7f] + vmovdqa32 4064(%rdx), %ymm24 + +// CHECK: vmovdqa32 4096(%rdx), %ymm24 +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x6f,0x82,0x00,0x10,0x00,0x00] + vmovdqa32 4096(%rdx), %ymm24 + +// CHECK: vmovdqa32 -4096(%rdx), %ymm24 +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x6f,0x42,0x80] + vmovdqa32 -4096(%rdx), %ymm24 + +// CHECK: vmovdqa32 -4128(%rdx), %ymm24 +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x6f,0x82,0xe0,0xef,0xff,0xff] + vmovdqa32 -4128(%rdx), %ymm24 + +// CHECK: vmovdqa64 %xmm24, %xmm27 +// CHECK: encoding: [0x62,0x01,0xfd,0x08,0x6f,0xd8] + vmovdqa64 %xmm24, %xmm27 + +// CHECK: vmovdqa64 %xmm24, %xmm27 {%k5} +// CHECK: encoding: [0x62,0x01,0xfd,0x0d,0x6f,0xd8] + vmovdqa64 %xmm24, %xmm27 {%k5} + +// CHECK: vmovdqa64 %xmm24, %xmm27 {%k5} {z} +// CHECK: encoding: [0x62,0x01,0xfd,0x8d,0x6f,0xd8] + vmovdqa64 %xmm24, %xmm27 {%k5} {z} + +// CHECK: vmovdqa64 (%rcx), %xmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x6f,0x19] + vmovdqa64 (%rcx), %xmm27 + +// CHECK: vmovdqa64 291(%rax,%r14,8), %xmm27 +// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x6f,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmovdqa64 291(%rax,%r14,8), %xmm27 + +// CHECK: vmovdqa64 2032(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x6f,0x5a,0x7f] + vmovdqa64 2032(%rdx), %xmm27 + +// CHECK: vmovdqa64 2048(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x6f,0x9a,0x00,0x08,0x00,0x00] + vmovdqa64 2048(%rdx), %xmm27 + +// CHECK: vmovdqa64 -2048(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x6f,0x5a,0x80] + vmovdqa64 -2048(%rdx), %xmm27 + +// CHECK: vmovdqa64 -2064(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x6f,0x9a,0xf0,0xf7,0xff,0xff] + vmovdqa64 -2064(%rdx), %xmm27 + +// CHECK: vmovdqa64 %ymm29, %ymm30 +// CHECK: encoding: [0x62,0x01,0xfd,0x28,0x6f,0xf5] + vmovdqa64 %ymm29, %ymm30 + +// CHECK: vmovdqa64 %ymm29, %ymm30 {%k3} +// CHECK: encoding: [0x62,0x01,0xfd,0x2b,0x6f,0xf5] + vmovdqa64 %ymm29, %ymm30 {%k3} + +// CHECK: vmovdqa64 %ymm29, %ymm30 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0xfd,0xab,0x6f,0xf5] + vmovdqa64 %ymm29, %ymm30 {%k3} {z} + +// CHECK: vmovdqa64 (%rcx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x6f,0x31] + vmovdqa64 (%rcx), %ymm30 + +// CHECK: vmovdqa64 291(%rax,%r14,8), %ymm30 +// CHECK: encoding: [0x62,0x21,0xfd,0x28,0x6f,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovdqa64 291(%rax,%r14,8), %ymm30 + +// CHECK: vmovdqa64 4064(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x6f,0x72,0x7f] + vmovdqa64 4064(%rdx), %ymm30 + +// CHECK: vmovdqa64 4096(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x6f,0xb2,0x00,0x10,0x00,0x00] + vmovdqa64 4096(%rdx), %ymm30 + +// CHECK: vmovdqa64 -4096(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x6f,0x72,0x80] + vmovdqa64 -4096(%rdx), %ymm30 + +// CHECK: vmovdqa64 -4128(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x6f,0xb2,0xe0,0xef,0xff,0xff] + vmovdqa64 -4128(%rdx), %ymm30 + +// CHECK: vmovdqu32 %xmm19, %xmm29 +// CHECK: encoding: [0x62,0x21,0x7e,0x08,0x6f,0xeb] + vmovdqu32 %xmm19, %xmm29 + +// CHECK: vmovdqu32 %xmm19, %xmm29 {%k6} +// CHECK: encoding: [0x62,0x21,0x7e,0x0e,0x6f,0xeb] + vmovdqu32 %xmm19, %xmm29 {%k6} + +// CHECK: vmovdqu32 %xmm19, %xmm29 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0x7e,0x8e,0x6f,0xeb] + vmovdqu32 %xmm19, %xmm29 {%k6} {z} + +// CHECK: vmovdqu32 (%rcx), %xmm29 +// CHECK: encoding: [0x62,0x61,0x7e,0x08,0x6f,0x29] + vmovdqu32 (%rcx), %xmm29 + +// CHECK: vmovdqu32 291(%rax,%r14,8), %xmm29 +// CHECK: encoding: [0x62,0x21,0x7e,0x08,0x6f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu32 291(%rax,%r14,8), %xmm29 + +// CHECK: vmovdqu32 2032(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0x7e,0x08,0x6f,0x6a,0x7f] + vmovdqu32 2032(%rdx), %xmm29 + +// CHECK: vmovdqu32 2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0x7e,0x08,0x6f,0xaa,0x00,0x08,0x00,0x00] + vmovdqu32 2048(%rdx), %xmm29 + +// CHECK: vmovdqu32 -2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0x7e,0x08,0x6f,0x6a,0x80] + vmovdqu32 -2048(%rdx), %xmm29 + +// CHECK: vmovdqu32 -2064(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0x7e,0x08,0x6f,0xaa,0xf0,0xf7,0xff,0xff] + vmovdqu32 -2064(%rdx), %xmm29 + +// CHECK: vmovdqu32 %ymm18, %ymm17 +// CHECK: encoding: [0x62,0xa1,0x7e,0x28,0x6f,0xca] + vmovdqu32 %ymm18, %ymm17 + +// CHECK: vmovdqu32 %ymm18, %ymm17 {%k3} +// CHECK: encoding: [0x62,0xa1,0x7e,0x2b,0x6f,0xca] + vmovdqu32 %ymm18, %ymm17 {%k3} + +// CHECK: vmovdqu32 %ymm18, %ymm17 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0x7e,0xab,0x6f,0xca] + vmovdqu32 %ymm18, %ymm17 {%k3} {z} + +// CHECK: vmovdqu32 (%rcx), %ymm17 +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x6f,0x09] + vmovdqu32 (%rcx), %ymm17 + +// CHECK: vmovdqu32 291(%rax,%r14,8), %ymm17 +// CHECK: encoding: [0x62,0xa1,0x7e,0x28,0x6f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovdqu32 291(%rax,%r14,8), %ymm17 + +// CHECK: vmovdqu32 4064(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x6f,0x4a,0x7f] + vmovdqu32 4064(%rdx), %ymm17 + +// CHECK: vmovdqu32 4096(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x6f,0x8a,0x00,0x10,0x00,0x00] + vmovdqu32 4096(%rdx), %ymm17 + +// CHECK: vmovdqu32 -4096(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x6f,0x4a,0x80] + vmovdqu32 -4096(%rdx), %ymm17 + +// CHECK: vmovdqu32 -4128(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x6f,0x8a,0xe0,0xef,0xff,0xff] + vmovdqu32 -4128(%rdx), %ymm17 + +// CHECK: vmovdqu64 %xmm19, %xmm24 +// CHECK: encoding: [0x62,0x21,0xfe,0x08,0x6f,0xc3] + vmovdqu64 %xmm19, %xmm24 + +// CHECK: vmovdqu64 %xmm19, %xmm24 {%k5} +// CHECK: encoding: [0x62,0x21,0xfe,0x0d,0x6f,0xc3] + vmovdqu64 %xmm19, %xmm24 {%k5} + +// CHECK: vmovdqu64 %xmm19, %xmm24 {%k5} {z} +// CHECK: encoding: [0x62,0x21,0xfe,0x8d,0x6f,0xc3] + vmovdqu64 %xmm19, %xmm24 {%k5} {z} + +// CHECK: vmovdqu64 (%rcx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfe,0x08,0x6f,0x01] + vmovdqu64 (%rcx), %xmm24 + +// CHECK: vmovdqu64 291(%rax,%r14,8), %xmm24 +// CHECK: encoding: [0x62,0x21,0xfe,0x08,0x6f,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovdqu64 291(%rax,%r14,8), %xmm24 + +// CHECK: vmovdqu64 2032(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfe,0x08,0x6f,0x42,0x7f] + vmovdqu64 2032(%rdx), %xmm24 + +// CHECK: vmovdqu64 2048(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfe,0x08,0x6f,0x82,0x00,0x08,0x00,0x00] + vmovdqu64 2048(%rdx), %xmm24 + +// CHECK: vmovdqu64 -2048(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfe,0x08,0x6f,0x42,0x80] + vmovdqu64 -2048(%rdx), %xmm24 + +// CHECK: vmovdqu64 -2064(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfe,0x08,0x6f,0x82,0xf0,0xf7,0xff,0xff] + vmovdqu64 -2064(%rdx), %xmm24 + +// CHECK: vmovdqu64 %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x21,0xfe,0x28,0x6f,0xed] + vmovdqu64 %ymm21, %ymm29 + +// CHECK: vmovdqu64 %ymm21, %ymm29 {%k3} +// CHECK: encoding: [0x62,0x21,0xfe,0x2b,0x6f,0xed] + vmovdqu64 %ymm21, %ymm29 {%k3} + +// CHECK: vmovdqu64 %ymm21, %ymm29 {%k3} {z} +// CHECK: encoding: [0x62,0x21,0xfe,0xab,0x6f,0xed] + vmovdqu64 %ymm21, %ymm29 {%k3} {z} + +// CHECK: vmovdqu64 (%rcx), %ymm29 +// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0x29] + vmovdqu64 (%rcx), %ymm29 + +// CHECK: vmovdqu64 291(%rax,%r14,8), %ymm29 +// CHECK: encoding: [0x62,0x21,0xfe,0x28,0x6f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqu64 291(%rax,%r14,8), %ymm29 + +// CHECK: vmovdqu64 4064(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0x6a,0x7f] + vmovdqu64 4064(%rdx), %ymm29 + +// CHECK: vmovdqu64 4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0xaa,0x00,0x10,0x00,0x00] + vmovdqu64 4096(%rdx), %ymm29 + +// CHECK: vmovdqu64 -4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0x6a,0x80] + vmovdqu64 -4096(%rdx), %ymm29 + +// CHECK: vmovdqu64 -4128(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0xaa,0xe0,0xef,0xff,0xff] + vmovdqu64 -4128(%rdx), %ymm29 + +// CHECK: vmovntdq %xmm22, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0x31] + vmovntdq %xmm22, (%rcx) + +// CHECK: vmovntdq %xmm22, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7d,0x08,0xe7,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovntdq %xmm22, 291(%rax,%r14,8) + +// CHECK: vmovntdq %xmm22, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0x72,0x7f] + vmovntdq %xmm22, 2032(%rdx) + +// CHECK: vmovntdq %xmm22, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0xb2,0x00,0x08,0x00,0x00] + vmovntdq %xmm22, 2048(%rdx) + +// CHECK: vmovntdq %xmm22, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0x72,0x80] + vmovntdq %xmm22, -2048(%rdx) + +// CHECK: vmovntdq %xmm22, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0xb2,0xf0,0xf7,0xff,0xff] + vmovntdq %xmm22, -2064(%rdx) + +// CHECK: vmovntdq %ymm19, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x19] + vmovntdq %ymm19, (%rcx) + +// CHECK: vmovntdq %ymm19, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7d,0x28,0xe7,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmovntdq %ymm19, 291(%rax,%r14,8) + +// CHECK: vmovntdq %ymm19, 4064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x5a,0x7f] + vmovntdq %ymm19, 4064(%rdx) + +// CHECK: vmovntdq %ymm19, 4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x9a,0x00,0x10,0x00,0x00] + vmovntdq %ymm19, 4096(%rdx) + +// CHECK: vmovntdq %ymm19, -4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x5a,0x80] + vmovntdq %ymm19, -4096(%rdx) + +// CHECK: vmovntdq %ymm19, -4128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x9a,0xe0,0xef,0xff,0xff] + vmovntdq %ymm19, -4128(%rdx) + +// CHECK: vmovntdqa (%rcx), %xmm24 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x01] + vmovntdqa (%rcx), %xmm24 + +// CHECK: vmovntdqa 291(%rax,%r14,8), %xmm24 +// CHECK: encoding: [0x62,0x22,0x7d,0x08,0x2a,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovntdqa 291(%rax,%r14,8), %xmm24 + +// CHECK: vmovntdqa 2032(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x42,0x7f] + vmovntdqa 2032(%rdx), %xmm24 + +// CHECK: vmovntdqa 2048(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x82,0x00,0x08,0x00,0x00] + vmovntdqa 2048(%rdx), %xmm24 + +// CHECK: vmovntdqa -2048(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x42,0x80] + vmovntdqa -2048(%rdx), %xmm24 + +// CHECK: vmovntdqa -2064(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x82,0xf0,0xf7,0xff,0xff] + vmovntdqa -2064(%rdx), %xmm24 + +// CHECK: vmovntdqa (%rcx), %ymm28 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0x21] + vmovntdqa (%rcx), %ymm28 + +// CHECK: vmovntdqa 291(%rax,%r14,8), %ymm28 +// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x2a,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovntdqa 291(%rax,%r14,8), %ymm28 + +// CHECK: vmovntdqa 4064(%rdx), %ymm28 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0x62,0x7f] + vmovntdqa 4064(%rdx), %ymm28 + +// CHECK: vmovntdqa 4096(%rdx), %ymm28 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0xa2,0x00,0x10,0x00,0x00] + vmovntdqa 4096(%rdx), %ymm28 + +// CHECK: vmovntdqa -4096(%rdx), %ymm28 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0x62,0x80] + vmovntdqa -4096(%rdx), %ymm28 + +// CHECK: vmovntdqa -4128(%rdx), %ymm28 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0xa2,0xe0,0xef,0xff,0xff] + vmovntdqa -4128(%rdx), %ymm28 + +// CHECK: vmovntpd %xmm17, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x09] + vmovntpd %xmm17, (%rcx) + +// CHECK: vmovntpd %xmm17, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x2b,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovntpd %xmm17, 291(%rax,%r14,8) + +// CHECK: vmovntpd %xmm17, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x4a,0x7f] + vmovntpd %xmm17, 2032(%rdx) + +// CHECK: vmovntpd %xmm17, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x8a,0x00,0x08,0x00,0x00] + vmovntpd %xmm17, 2048(%rdx) + +// CHECK: vmovntpd %xmm17, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x4a,0x80] + vmovntpd %xmm17, -2048(%rdx) + +// CHECK: vmovntpd %xmm17, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x8a,0xf0,0xf7,0xff,0xff] + vmovntpd %xmm17, -2064(%rdx) + +// CHECK: vmovntpd %ymm27, (%rcx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x19] + vmovntpd %ymm27, (%rcx) + +// CHECK: vmovntpd %ymm27, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0xfd,0x28,0x2b,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmovntpd %ymm27, 291(%rax,%r14,8) + +// CHECK: vmovntpd %ymm27, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x5a,0x7f] + vmovntpd %ymm27, 4064(%rdx) + +// CHECK: vmovntpd %ymm27, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x9a,0x00,0x10,0x00,0x00] + vmovntpd %ymm27, 4096(%rdx) + +// CHECK: vmovntpd %ymm27, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x5a,0x80] + vmovntpd %ymm27, -4096(%rdx) + +// CHECK: vmovntpd %ymm27, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x9a,0xe0,0xef,0xff,0xff] + vmovntpd %ymm27, -4128(%rdx) + +// CHECK: vmovntps %xmm26, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x11] + vmovntps %xmm26, (%rcx) + +// CHECK: vmovntps %xmm26, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7c,0x08,0x2b,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovntps %xmm26, 291(%rax,%r14,8) + +// CHECK: vmovntps %xmm26, 2032(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x52,0x7f] + vmovntps %xmm26, 2032(%rdx) + +// CHECK: vmovntps %xmm26, 2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x92,0x00,0x08,0x00,0x00] + vmovntps %xmm26, 2048(%rdx) + +// CHECK: vmovntps %xmm26, -2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x52,0x80] + vmovntps %xmm26, -2048(%rdx) + +// CHECK: vmovntps %xmm26, -2064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x92,0xf0,0xf7,0xff,0xff] + vmovntps %xmm26, -2064(%rdx) + +// CHECK: vmovntps %ymm28, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0x21] + vmovntps %ymm28, (%rcx) + +// CHECK: vmovntps %ymm28, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7c,0x28,0x2b,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovntps %ymm28, 291(%rax,%r14,8) + +// CHECK: vmovntps %ymm28, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0x62,0x7f] + vmovntps %ymm28, 4064(%rdx) + +// CHECK: vmovntps %ymm28, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0xa2,0x00,0x10,0x00,0x00] + vmovntps %ymm28, 4096(%rdx) + +// CHECK: vmovntps %ymm28, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0x62,0x80] + vmovntps %ymm28, -4096(%rdx) + +// CHECK: vmovntps %ymm28, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0xa2,0xe0,0xef,0xff,0xff] + vmovntps %ymm28, -4128(%rdx) + +// CHECK: vmovupd %xmm22, %xmm24 +// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x10,0xc6] + vmovupd %xmm22, %xmm24 + +// CHECK: vmovupd %xmm22, %xmm24 {%k6} +// CHECK: encoding: [0x62,0x21,0xfd,0x0e,0x10,0xc6] + vmovupd %xmm22, %xmm24 {%k6} + +// CHECK: vmovupd %xmm22, %xmm24 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0xfd,0x8e,0x10,0xc6] + vmovupd %xmm22, %xmm24 {%k6} {z} + +// CHECK: vmovupd (%rcx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x10,0x01] + vmovupd (%rcx), %xmm24 + +// CHECK: vmovupd 291(%rax,%r14,8), %xmm24 +// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x10,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovupd 291(%rax,%r14,8), %xmm24 + +// CHECK: vmovupd 2032(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x10,0x42,0x7f] + vmovupd 2032(%rdx), %xmm24 + +// CHECK: vmovupd 2048(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x10,0x82,0x00,0x08,0x00,0x00] + vmovupd 2048(%rdx), %xmm24 + +// CHECK: vmovupd -2048(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x10,0x42,0x80] + vmovupd -2048(%rdx), %xmm24 + +// CHECK: vmovupd -2064(%rdx), %xmm24 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x10,0x82,0xf0,0xf7,0xff,0xff] + vmovupd -2064(%rdx), %xmm24 + +// CHECK: vmovupd %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x01,0xfd,0x28,0x10,0xf1] + vmovupd %ymm25, %ymm30 + +// CHECK: vmovupd %ymm25, %ymm30 {%k7} +// CHECK: encoding: [0x62,0x01,0xfd,0x2f,0x10,0xf1] + vmovupd %ymm25, %ymm30 {%k7} + +// CHECK: vmovupd %ymm25, %ymm30 {%k7} {z} +// CHECK: encoding: [0x62,0x01,0xfd,0xaf,0x10,0xf1] + vmovupd %ymm25, %ymm30 {%k7} {z} + +// CHECK: vmovupd (%rcx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x10,0x31] + vmovupd (%rcx), %ymm30 + +// CHECK: vmovupd 291(%rax,%r14,8), %ymm30 +// CHECK: encoding: [0x62,0x21,0xfd,0x28,0x10,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovupd 291(%rax,%r14,8), %ymm30 + +// CHECK: vmovupd 4064(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x10,0x72,0x7f] + vmovupd 4064(%rdx), %ymm30 + +// CHECK: vmovupd 4096(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x10,0xb2,0x00,0x10,0x00,0x00] + vmovupd 4096(%rdx), %ymm30 + +// CHECK: vmovupd -4096(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x10,0x72,0x80] + vmovupd -4096(%rdx), %ymm30 + +// CHECK: vmovupd -4128(%rdx), %ymm30 +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x10,0xb2,0xe0,0xef,0xff,0xff] + vmovupd -4128(%rdx), %ymm30 + +// CHECK: vmovups %xmm29, %xmm20 +// CHECK: encoding: [0x62,0x81,0x7c,0x08,0x10,0xe5] + vmovups %xmm29, %xmm20 + +// CHECK: vmovups %xmm29, %xmm20 {%k6} +// CHECK: encoding: [0x62,0x81,0x7c,0x0e,0x10,0xe5] + vmovups %xmm29, %xmm20 {%k6} + +// CHECK: vmovups %xmm29, %xmm20 {%k6} {z} +// CHECK: encoding: [0x62,0x81,0x7c,0x8e,0x10,0xe5] + vmovups %xmm29, %xmm20 {%k6} {z} + +// CHECK: vmovups (%rcx), %xmm20 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x10,0x21] + vmovups (%rcx), %xmm20 + +// CHECK: vmovups 291(%rax,%r14,8), %xmm20 +// CHECK: encoding: [0x62,0xa1,0x7c,0x08,0x10,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovups 291(%rax,%r14,8), %xmm20 + +// CHECK: vmovups 2032(%rdx), %xmm20 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x10,0x62,0x7f] + vmovups 2032(%rdx), %xmm20 + +// CHECK: vmovups 2048(%rdx), %xmm20 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x10,0xa2,0x00,0x08,0x00,0x00] + vmovups 2048(%rdx), %xmm20 + +// CHECK: vmovups -2048(%rdx), %xmm20 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x10,0x62,0x80] + vmovups -2048(%rdx), %xmm20 + +// CHECK: vmovups -2064(%rdx), %xmm20 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x10,0xa2,0xf0,0xf7,0xff,0xff] + vmovups -2064(%rdx), %xmm20 + +// CHECK: vmovups %ymm26, %ymm21 +// CHECK: encoding: [0x62,0x81,0x7c,0x28,0x10,0xea] + vmovups %ymm26, %ymm21 + +// CHECK: vmovups %ymm26, %ymm21 {%k6} +// CHECK: encoding: [0x62,0x81,0x7c,0x2e,0x10,0xea] + vmovups %ymm26, %ymm21 {%k6} + +// CHECK: vmovups %ymm26, %ymm21 {%k6} {z} +// CHECK: encoding: [0x62,0x81,0x7c,0xae,0x10,0xea] + vmovups %ymm26, %ymm21 {%k6} {z} + +// CHECK: vmovups (%rcx), %ymm21 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x10,0x29] + vmovups (%rcx), %ymm21 + +// CHECK: vmovups 291(%rax,%r14,8), %ymm21 +// CHECK: encoding: [0x62,0xa1,0x7c,0x28,0x10,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovups 291(%rax,%r14,8), %ymm21 + +// CHECK: vmovups 4064(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x10,0x6a,0x7f] + vmovups 4064(%rdx), %ymm21 + +// CHECK: vmovups 4096(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x10,0xaa,0x00,0x10,0x00,0x00] + vmovups 4096(%rdx), %ymm21 + +// CHECK: vmovups -4096(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x10,0x6a,0x80] + vmovups -4096(%rdx), %ymm21 + +// CHECK: vmovups -4128(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x10,0xaa,0xe0,0xef,0xff,0xff] + vmovups -4128(%rdx), %ymm21 + +// CHECK: vmulpd %xmm26, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0x81,0xf5,0x00,0x59,0xca] + vmulpd %xmm26, %xmm17, %xmm17 + +// CHECK: vmulpd %xmm26, %xmm17, %xmm17 {%k7} +// CHECK: encoding: [0x62,0x81,0xf5,0x07,0x59,0xca] + vmulpd %xmm26, %xmm17, %xmm17 {%k7} + +// CHECK: vmulpd %xmm26, %xmm17, %xmm17 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0xf5,0x87,0x59,0xca] + vmulpd %xmm26, %xmm17, %xmm17 {%k7} {z} + +// CHECK: vmulpd (%rcx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x00,0x59,0x09] + vmulpd (%rcx), %xmm17, %xmm17 + +// CHECK: vmulpd 291(%rax,%r14,8), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xa1,0xf5,0x00,0x59,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmulpd 291(%rax,%r14,8), %xmm17, %xmm17 + +// CHECK: vmulpd (%rcx){1to2}, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x10,0x59,0x09] + vmulpd (%rcx){1to2}, %xmm17, %xmm17 + +// CHECK: vmulpd 2032(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x00,0x59,0x4a,0x7f] + vmulpd 2032(%rdx), %xmm17, %xmm17 + +// CHECK: vmulpd 2048(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x00,0x59,0x8a,0x00,0x08,0x00,0x00] + vmulpd 2048(%rdx), %xmm17, %xmm17 + +// CHECK: vmulpd -2048(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x00,0x59,0x4a,0x80] + vmulpd -2048(%rdx), %xmm17, %xmm17 + +// CHECK: vmulpd -2064(%rdx), %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x00,0x59,0x8a,0xf0,0xf7,0xff,0xff] + vmulpd -2064(%rdx), %xmm17, %xmm17 + +// CHECK: vmulpd 1016(%rdx){1to2}, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x10,0x59,0x4a,0x7f] + vmulpd 1016(%rdx){1to2}, %xmm17, %xmm17 + +// CHECK: vmulpd 1024(%rdx){1to2}, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x10,0x59,0x8a,0x00,0x04,0x00,0x00] + vmulpd 1024(%rdx){1to2}, %xmm17, %xmm17 + +// CHECK: vmulpd -1024(%rdx){1to2}, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x10,0x59,0x4a,0x80] + vmulpd -1024(%rdx){1to2}, %xmm17, %xmm17 + +// CHECK: vmulpd -1032(%rdx){1to2}, %xmm17, %xmm17 +// CHECK: encoding: [0x62,0xe1,0xf5,0x10,0x59,0x8a,0xf8,0xfb,0xff,0xff] + vmulpd -1032(%rdx){1to2}, %xmm17, %xmm17 + +// CHECK: vmulpd %ymm27, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x01,0xa5,0x20,0x59,0xcb] + vmulpd %ymm27, %ymm27, %ymm25 + +// CHECK: vmulpd %ymm27, %ymm27, %ymm25 {%k3} +// CHECK: encoding: [0x62,0x01,0xa5,0x23,0x59,0xcb] + vmulpd %ymm27, %ymm27, %ymm25 {%k3} + +// CHECK: vmulpd %ymm27, %ymm27, %ymm25 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0xa5,0xa3,0x59,0xcb] + vmulpd %ymm27, %ymm27, %ymm25 {%k3} {z} + +// CHECK: vmulpd (%rcx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x20,0x59,0x09] + vmulpd (%rcx), %ymm27, %ymm25 + +// CHECK: vmulpd 291(%rax,%r14,8), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x21,0xa5,0x20,0x59,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmulpd 291(%rax,%r14,8), %ymm27, %ymm25 + +// CHECK: vmulpd (%rcx){1to4}, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x30,0x59,0x09] + vmulpd (%rcx){1to4}, %ymm27, %ymm25 + +// CHECK: vmulpd 4064(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x20,0x59,0x4a,0x7f] + vmulpd 4064(%rdx), %ymm27, %ymm25 + +// CHECK: vmulpd 4096(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x20,0x59,0x8a,0x00,0x10,0x00,0x00] + vmulpd 4096(%rdx), %ymm27, %ymm25 + +// CHECK: vmulpd -4096(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x20,0x59,0x4a,0x80] + vmulpd -4096(%rdx), %ymm27, %ymm25 + +// CHECK: vmulpd -4128(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x20,0x59,0x8a,0xe0,0xef,0xff,0xff] + vmulpd -4128(%rdx), %ymm27, %ymm25 + +// CHECK: vmulpd 1016(%rdx){1to4}, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x30,0x59,0x4a,0x7f] + vmulpd 1016(%rdx){1to4}, %ymm27, %ymm25 + +// CHECK: vmulpd 1024(%rdx){1to4}, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x30,0x59,0x8a,0x00,0x04,0x00,0x00] + vmulpd 1024(%rdx){1to4}, %ymm27, %ymm25 + +// CHECK: vmulpd -1024(%rdx){1to4}, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x30,0x59,0x4a,0x80] + vmulpd -1024(%rdx){1to4}, %ymm27, %ymm25 + +// CHECK: vmulpd -1032(%rdx){1to4}, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0xa5,0x30,0x59,0x8a,0xf8,0xfb,0xff,0xff] + vmulpd -1032(%rdx){1to4}, %ymm27, %ymm25 + +// CHECK: vmulps %xmm21, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x21,0x74,0x00,0x59,0xed] + vmulps %xmm21, %xmm17, %xmm29 + +// CHECK: vmulps %xmm21, %xmm17, %xmm29 {%k2} +// CHECK: encoding: [0x62,0x21,0x74,0x02,0x59,0xed] + vmulps %xmm21, %xmm17, %xmm29 {%k2} + +// CHECK: vmulps %xmm21, %xmm17, %xmm29 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0x74,0x82,0x59,0xed] + vmulps %xmm21, %xmm17, %xmm29 {%k2} {z} + +// CHECK: vmulps (%rcx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x00,0x59,0x29] + vmulps (%rcx), %xmm17, %xmm29 + +// CHECK: vmulps 291(%rax,%r14,8), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x21,0x74,0x00,0x59,0xac,0xf0,0x23,0x01,0x00,0x00] + vmulps 291(%rax,%r14,8), %xmm17, %xmm29 + +// CHECK: vmulps (%rcx){1to4}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x10,0x59,0x29] + vmulps (%rcx){1to4}, %xmm17, %xmm29 + +// CHECK: vmulps 2032(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x00,0x59,0x6a,0x7f] + vmulps 2032(%rdx), %xmm17, %xmm29 + +// CHECK: vmulps 2048(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x00,0x59,0xaa,0x00,0x08,0x00,0x00] + vmulps 2048(%rdx), %xmm17, %xmm29 + +// CHECK: vmulps -2048(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x00,0x59,0x6a,0x80] + vmulps -2048(%rdx), %xmm17, %xmm29 + +// CHECK: vmulps -2064(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x00,0x59,0xaa,0xf0,0xf7,0xff,0xff] + vmulps -2064(%rdx), %xmm17, %xmm29 + +// CHECK: vmulps 508(%rdx){1to4}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x10,0x59,0x6a,0x7f] + vmulps 508(%rdx){1to4}, %xmm17, %xmm29 + +// CHECK: vmulps 512(%rdx){1to4}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x10,0x59,0xaa,0x00,0x02,0x00,0x00] + vmulps 512(%rdx){1to4}, %xmm17, %xmm29 + +// CHECK: vmulps -512(%rdx){1to4}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x10,0x59,0x6a,0x80] + vmulps -512(%rdx){1to4}, %xmm17, %xmm29 + +// CHECK: vmulps -516(%rdx){1to4}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0x74,0x10,0x59,0xaa,0xfc,0xfd,0xff,0xff] + vmulps -516(%rdx){1to4}, %xmm17, %xmm29 + +// CHECK: vmulps %ymm28, %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x01,0x2c,0x20,0x59,0xf4] + vmulps %ymm28, %ymm26, %ymm30 + +// CHECK: vmulps %ymm28, %ymm26, %ymm30 {%k3} +// CHECK: encoding: [0x62,0x01,0x2c,0x23,0x59,0xf4] + vmulps %ymm28, %ymm26, %ymm30 {%k3} + +// CHECK: vmulps %ymm28, %ymm26, %ymm30 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0x2c,0xa3,0x59,0xf4] + vmulps %ymm28, %ymm26, %ymm30 {%k3} {z} + +// CHECK: vmulps (%rcx), %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x59,0x31] + vmulps (%rcx), %ymm26, %ymm30 + +// CHECK: vmulps 291(%rax,%r14,8), %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x21,0x2c,0x20,0x59,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmulps 291(%rax,%r14,8), %ymm26, %ymm30 + +// CHECK: vmulps (%rcx){1to8}, %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x59,0x31] + vmulps (%rcx){1to8}, %ymm26, %ymm30 + +// CHECK: vmulps 4064(%rdx), %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x59,0x72,0x7f] + vmulps 4064(%rdx), %ymm26, %ymm30 + +// CHECK: vmulps 4096(%rdx), %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x59,0xb2,0x00,0x10,0x00,0x00] + vmulps 4096(%rdx), %ymm26, %ymm30 + +// CHECK: vmulps -4096(%rdx), %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x59,0x72,0x80] + vmulps -4096(%rdx), %ymm26, %ymm30 + +// CHECK: vmulps -4128(%rdx), %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x20,0x59,0xb2,0xe0,0xef,0xff,0xff] + vmulps -4128(%rdx), %ymm26, %ymm30 + +// CHECK: vmulps 508(%rdx){1to8}, %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x59,0x72,0x7f] + vmulps 508(%rdx){1to8}, %ymm26, %ymm30 + +// CHECK: vmulps 512(%rdx){1to8}, %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x59,0xb2,0x00,0x02,0x00,0x00] + vmulps 512(%rdx){1to8}, %ymm26, %ymm30 + +// CHECK: vmulps -512(%rdx){1to8}, %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x59,0x72,0x80] + vmulps -512(%rdx){1to8}, %ymm26, %ymm30 + +// CHECK: vmulps -516(%rdx){1to8}, %ymm26, %ymm30 +// CHECK: encoding: [0x62,0x61,0x2c,0x30,0x59,0xb2,0xfc,0xfd,0xff,0xff] + vmulps -516(%rdx){1to8}, %ymm26, %ymm30 + +// CHECK: vpaddd %xmm26, %xmm19, %xmm21 +// CHECK: encoding: [0x62,0x81,0x65,0x00,0xfe,0xea] + vpaddd %xmm26, %xmm19, %xmm21 + +// CHECK: vpaddd %xmm26, %xmm19, %xmm21 {%k5} +// CHECK: encoding: [0x62,0x81,0x65,0x05,0xfe,0xea] + vpaddd %xmm26, %xmm19, %xmm21 {%k5} + +// CHECK: vpaddd %xmm26, %xmm19, %xmm21 {%k5} {z} +// CHECK: encoding: [0x62,0x81,0x65,0x85,0xfe,0xea] + vpaddd %xmm26, %xmm19, %xmm21 {%k5} {z} + +// CHECK: vpaddd (%rcx), %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xfe,0x29] + vpaddd (%rcx), %xmm19, %xmm21 + +// CHECK: vpaddd 291(%rax,%r14,8), %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xa1,0x65,0x00,0xfe,0xac,0xf0,0x23,0x01,0x00,0x00] + vpaddd 291(%rax,%r14,8), %xmm19, %xmm21 + +// CHECK: vpaddd (%rcx){1to4}, %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x10,0xfe,0x29] + vpaddd (%rcx){1to4}, %xmm19, %xmm21 + +// CHECK: vpaddd 2032(%rdx), %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xfe,0x6a,0x7f] + vpaddd 2032(%rdx), %xmm19, %xmm21 + +// CHECK: vpaddd 2048(%rdx), %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xfe,0xaa,0x00,0x08,0x00,0x00] + vpaddd 2048(%rdx), %xmm19, %xmm21 + +// CHECK: vpaddd -2048(%rdx), %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xfe,0x6a,0x80] + vpaddd -2048(%rdx), %xmm19, %xmm21 + +// CHECK: vpaddd -2064(%rdx), %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xfe,0xaa,0xf0,0xf7,0xff,0xff] + vpaddd -2064(%rdx), %xmm19, %xmm21 + +// CHECK: vpaddd 508(%rdx){1to4}, %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x10,0xfe,0x6a,0x7f] + vpaddd 508(%rdx){1to4}, %xmm19, %xmm21 + +// CHECK: vpaddd 512(%rdx){1to4}, %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x10,0xfe,0xaa,0x00,0x02,0x00,0x00] + vpaddd 512(%rdx){1to4}, %xmm19, %xmm21 + +// CHECK: vpaddd -512(%rdx){1to4}, %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x10,0xfe,0x6a,0x80] + vpaddd -512(%rdx){1to4}, %xmm19, %xmm21 + +// CHECK: vpaddd -516(%rdx){1to4}, %xmm19, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x65,0x10,0xfe,0xaa,0xfc,0xfd,0xff,0xff] + vpaddd -516(%rdx){1to4}, %xmm19, %xmm21 + +// CHECK: vpaddd %ymm17, %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x21,0x45,0x20,0xfe,0xe9] + vpaddd %ymm17, %ymm23, %ymm29 + +// CHECK: vpaddd %ymm17, %ymm23, %ymm29 {%k5} +// CHECK: encoding: [0x62,0x21,0x45,0x25,0xfe,0xe9] + vpaddd %ymm17, %ymm23, %ymm29 {%k5} + +// CHECK: vpaddd %ymm17, %ymm23, %ymm29 {%k5} {z} +// CHECK: encoding: [0x62,0x21,0x45,0xa5,0xfe,0xe9] + vpaddd %ymm17, %ymm23, %ymm29 {%k5} {z} + +// CHECK: vpaddd (%rcx), %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x20,0xfe,0x29] + vpaddd (%rcx), %ymm23, %ymm29 + +// CHECK: vpaddd 291(%rax,%r14,8), %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x21,0x45,0x20,0xfe,0xac,0xf0,0x23,0x01,0x00,0x00] + vpaddd 291(%rax,%r14,8), %ymm23, %ymm29 + +// CHECK: vpaddd (%rcx){1to8}, %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x30,0xfe,0x29] + vpaddd (%rcx){1to8}, %ymm23, %ymm29 + +// CHECK: vpaddd 4064(%rdx), %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x20,0xfe,0x6a,0x7f] + vpaddd 4064(%rdx), %ymm23, %ymm29 + +// CHECK: vpaddd 4096(%rdx), %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x20,0xfe,0xaa,0x00,0x10,0x00,0x00] + vpaddd 4096(%rdx), %ymm23, %ymm29 + +// CHECK: vpaddd -4096(%rdx), %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x20,0xfe,0x6a,0x80] + vpaddd -4096(%rdx), %ymm23, %ymm29 + +// CHECK: vpaddd -4128(%rdx), %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x20,0xfe,0xaa,0xe0,0xef,0xff,0xff] + vpaddd -4128(%rdx), %ymm23, %ymm29 + +// CHECK: vpaddd 508(%rdx){1to8}, %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x30,0xfe,0x6a,0x7f] + vpaddd 508(%rdx){1to8}, %ymm23, %ymm29 + +// CHECK: vpaddd 512(%rdx){1to8}, %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x30,0xfe,0xaa,0x00,0x02,0x00,0x00] + vpaddd 512(%rdx){1to8}, %ymm23, %ymm29 + +// CHECK: vpaddd -512(%rdx){1to8}, %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x30,0xfe,0x6a,0x80] + vpaddd -512(%rdx){1to8}, %ymm23, %ymm29 + +// CHECK: vpaddd -516(%rdx){1to8}, %ymm23, %ymm29 +// CHECK: encoding: [0x62,0x61,0x45,0x30,0xfe,0xaa,0xfc,0xfd,0xff,0xff] + vpaddd -516(%rdx){1to8}, %ymm23, %ymm29 + +// CHECK: vpaddq %xmm26, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x01,0xf5,0x00,0xd4,0xea] + vpaddq %xmm26, %xmm17, %xmm29 + +// CHECK: vpaddq %xmm26, %xmm17, %xmm29 {%k2} +// CHECK: encoding: [0x62,0x01,0xf5,0x02,0xd4,0xea] + vpaddq %xmm26, %xmm17, %xmm29 {%k2} + +// CHECK: vpaddq %xmm26, %xmm17, %xmm29 {%k2} {z} +// CHECK: encoding: [0x62,0x01,0xf5,0x82,0xd4,0xea] + vpaddq %xmm26, %xmm17, %xmm29 {%k2} {z} + +// CHECK: vpaddq (%rcx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xd4,0x29] + vpaddq (%rcx), %xmm17, %xmm29 + +// CHECK: vpaddq 291(%rax,%r14,8), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x21,0xf5,0x00,0xd4,0xac,0xf0,0x23,0x01,0x00,0x00] + vpaddq 291(%rax,%r14,8), %xmm17, %xmm29 + +// CHECK: vpaddq (%rcx){1to2}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xd4,0x29] + vpaddq (%rcx){1to2}, %xmm17, %xmm29 + +// CHECK: vpaddq 2032(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xd4,0x6a,0x7f] + vpaddq 2032(%rdx), %xmm17, %xmm29 + +// CHECK: vpaddq 2048(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xd4,0xaa,0x00,0x08,0x00,0x00] + vpaddq 2048(%rdx), %xmm17, %xmm29 + +// CHECK: vpaddq -2048(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xd4,0x6a,0x80] + vpaddq -2048(%rdx), %xmm17, %xmm29 + +// CHECK: vpaddq -2064(%rdx), %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xd4,0xaa,0xf0,0xf7,0xff,0xff] + vpaddq -2064(%rdx), %xmm17, %xmm29 + +// CHECK: vpaddq 1016(%rdx){1to2}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xd4,0x6a,0x7f] + vpaddq 1016(%rdx){1to2}, %xmm17, %xmm29 + +// CHECK: vpaddq 1024(%rdx){1to2}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xd4,0xaa,0x00,0x04,0x00,0x00] + vpaddq 1024(%rdx){1to2}, %xmm17, %xmm29 + +// CHECK: vpaddq -1024(%rdx){1to2}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xd4,0x6a,0x80] + vpaddq -1024(%rdx){1to2}, %xmm17, %xmm29 + +// CHECK: vpaddq -1032(%rdx){1to2}, %xmm17, %xmm29 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xd4,0xaa,0xf8,0xfb,0xff,0xff] + vpaddq -1032(%rdx){1to2}, %xmm17, %xmm29 + +// CHECK: vpaddq %ymm18, %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xa1,0xb5,0x20,0xd4,0xe2] + vpaddq %ymm18, %ymm25, %ymm20 + +// CHECK: vpaddq %ymm18, %ymm25, %ymm20 {%k6} +// CHECK: encoding: [0x62,0xa1,0xb5,0x26,0xd4,0xe2] + vpaddq %ymm18, %ymm25, %ymm20 {%k6} + +// CHECK: vpaddq %ymm18, %ymm25, %ymm20 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0xb5,0xa6,0xd4,0xe2] + vpaddq %ymm18, %ymm25, %ymm20 {%k6} {z} + +// CHECK: vpaddq (%rcx), %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x20,0xd4,0x21] + vpaddq (%rcx), %ymm25, %ymm20 + +// CHECK: vpaddq 291(%rax,%r14,8), %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xa1,0xb5,0x20,0xd4,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpaddq 291(%rax,%r14,8), %ymm25, %ymm20 + +// CHECK: vpaddq (%rcx){1to4}, %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x30,0xd4,0x21] + vpaddq (%rcx){1to4}, %ymm25, %ymm20 + +// CHECK: vpaddq 4064(%rdx), %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x20,0xd4,0x62,0x7f] + vpaddq 4064(%rdx), %ymm25, %ymm20 + +// CHECK: vpaddq 4096(%rdx), %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x20,0xd4,0xa2,0x00,0x10,0x00,0x00] + vpaddq 4096(%rdx), %ymm25, %ymm20 + +// CHECK: vpaddq -4096(%rdx), %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x20,0xd4,0x62,0x80] + vpaddq -4096(%rdx), %ymm25, %ymm20 + +// CHECK: vpaddq -4128(%rdx), %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x20,0xd4,0xa2,0xe0,0xef,0xff,0xff] + vpaddq -4128(%rdx), %ymm25, %ymm20 + +// CHECK: vpaddq 1016(%rdx){1to4}, %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x30,0xd4,0x62,0x7f] + vpaddq 1016(%rdx){1to4}, %ymm25, %ymm20 + +// CHECK: vpaddq 1024(%rdx){1to4}, %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x30,0xd4,0xa2,0x00,0x04,0x00,0x00] + vpaddq 1024(%rdx){1to4}, %ymm25, %ymm20 + +// CHECK: vpaddq -1024(%rdx){1to4}, %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x30,0xd4,0x62,0x80] + vpaddq -1024(%rdx){1to4}, %ymm25, %ymm20 + +// CHECK: vpaddq -1032(%rdx){1to4}, %ymm25, %ymm20 +// CHECK: encoding: [0x62,0xe1,0xb5,0x30,0xd4,0xa2,0xf8,0xfb,0xff,0xff] + vpaddq -1032(%rdx){1to4}, %ymm25, %ymm20 + +// CHECK: vpandd %xmm18, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x21,0x2d,0x00,0xdb,0xc2] + vpandd %xmm18, %xmm26, %xmm24 + +// CHECK: vpandd %xmm18, %xmm26, %xmm24 {%k2} +// CHECK: encoding: [0x62,0x21,0x2d,0x02,0xdb,0xc2] + vpandd %xmm18, %xmm26, %xmm24 {%k2} + +// CHECK: vpandd %xmm18, %xmm26, %xmm24 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0x2d,0x82,0xdb,0xc2] + vpandd %xmm18, %xmm26, %xmm24 {%k2} {z} + +// CHECK: vpandd (%rcx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xdb,0x01] + vpandd (%rcx), %xmm26, %xmm24 + +// CHECK: vpandd 291(%rax,%r14,8), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x21,0x2d,0x00,0xdb,0x84,0xf0,0x23,0x01,0x00,0x00] + vpandd 291(%rax,%r14,8), %xmm26, %xmm24 + +// CHECK: vpandd (%rcx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x10,0xdb,0x01] + vpandd (%rcx){1to4}, %xmm26, %xmm24 + +// CHECK: vpandd 2032(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xdb,0x42,0x7f] + vpandd 2032(%rdx), %xmm26, %xmm24 + +// CHECK: vpandd 2048(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xdb,0x82,0x00,0x08,0x00,0x00] + vpandd 2048(%rdx), %xmm26, %xmm24 + +// CHECK: vpandd -2048(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xdb,0x42,0x80] + vpandd -2048(%rdx), %xmm26, %xmm24 + +// CHECK: vpandd -2064(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x00,0xdb,0x82,0xf0,0xf7,0xff,0xff] + vpandd -2064(%rdx), %xmm26, %xmm24 + +// CHECK: vpandd 508(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x10,0xdb,0x42,0x7f] + vpandd 508(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpandd 512(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x10,0xdb,0x82,0x00,0x02,0x00,0x00] + vpandd 512(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpandd -512(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x10,0xdb,0x42,0x80] + vpandd -512(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpandd -516(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x10,0xdb,0x82,0xfc,0xfd,0xff,0xff] + vpandd -516(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpandd %ymm20, %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xa1,0x55,0x20,0xdb,0xd4] + vpandd %ymm20, %ymm21, %ymm18 + +// CHECK: vpandd %ymm20, %ymm21, %ymm18 {%k3} +// CHECK: encoding: [0x62,0xa1,0x55,0x23,0xdb,0xd4] + vpandd %ymm20, %ymm21, %ymm18 {%k3} + +// CHECK: vpandd %ymm20, %ymm21, %ymm18 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0x55,0xa3,0xdb,0xd4] + vpandd %ymm20, %ymm21, %ymm18 {%k3} {z} + +// CHECK: vpandd (%rcx), %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xdb,0x11] + vpandd (%rcx), %ymm21, %ymm18 + +// CHECK: vpandd 291(%rax,%r14,8), %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xa1,0x55,0x20,0xdb,0x94,0xf0,0x23,0x01,0x00,0x00] + vpandd 291(%rax,%r14,8), %ymm21, %ymm18 + +// CHECK: vpandd (%rcx){1to8}, %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x30,0xdb,0x11] + vpandd (%rcx){1to8}, %ymm21, %ymm18 + +// CHECK: vpandd 4064(%rdx), %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xdb,0x52,0x7f] + vpandd 4064(%rdx), %ymm21, %ymm18 + +// CHECK: vpandd 4096(%rdx), %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xdb,0x92,0x00,0x10,0x00,0x00] + vpandd 4096(%rdx), %ymm21, %ymm18 + +// CHECK: vpandd -4096(%rdx), %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xdb,0x52,0x80] + vpandd -4096(%rdx), %ymm21, %ymm18 + +// CHECK: vpandd -4128(%rdx), %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xdb,0x92,0xe0,0xef,0xff,0xff] + vpandd -4128(%rdx), %ymm21, %ymm18 + +// CHECK: vpandd 508(%rdx){1to8}, %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x30,0xdb,0x52,0x7f] + vpandd 508(%rdx){1to8}, %ymm21, %ymm18 + +// CHECK: vpandd 512(%rdx){1to8}, %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x30,0xdb,0x92,0x00,0x02,0x00,0x00] + vpandd 512(%rdx){1to8}, %ymm21, %ymm18 + +// CHECK: vpandd -512(%rdx){1to8}, %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x30,0xdb,0x52,0x80] + vpandd -512(%rdx){1to8}, %ymm21, %ymm18 + +// CHECK: vpandd -516(%rdx){1to8}, %ymm21, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x30,0xdb,0x92,0xfc,0xfd,0xff,0xff] + vpandd -516(%rdx){1to8}, %ymm21, %ymm18 + +// CHECK: vpandnd %xmm22, %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x21,0x75,0x00,0xdf,0xc6] + vpandnd %xmm22, %xmm17, %xmm24 + +// CHECK: vpandnd %xmm22, %xmm17, %xmm24 {%k2} +// CHECK: encoding: [0x62,0x21,0x75,0x02,0xdf,0xc6] + vpandnd %xmm22, %xmm17, %xmm24 {%k2} + +// CHECK: vpandnd %xmm22, %xmm17, %xmm24 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0x75,0x82,0xdf,0xc6] + vpandnd %xmm22, %xmm17, %xmm24 {%k2} {z} + +// CHECK: vpandnd (%rcx), %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xdf,0x01] + vpandnd (%rcx), %xmm17, %xmm24 + +// CHECK: vpandnd 291(%rax,%r14,8), %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x21,0x75,0x00,0xdf,0x84,0xf0,0x23,0x01,0x00,0x00] + vpandnd 291(%rax,%r14,8), %xmm17, %xmm24 + +// CHECK: vpandnd (%rcx){1to4}, %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x10,0xdf,0x01] + vpandnd (%rcx){1to4}, %xmm17, %xmm24 + +// CHECK: vpandnd 2032(%rdx), %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xdf,0x42,0x7f] + vpandnd 2032(%rdx), %xmm17, %xmm24 + +// CHECK: vpandnd 2048(%rdx), %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xdf,0x82,0x00,0x08,0x00,0x00] + vpandnd 2048(%rdx), %xmm17, %xmm24 + +// CHECK: vpandnd -2048(%rdx), %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xdf,0x42,0x80] + vpandnd -2048(%rdx), %xmm17, %xmm24 + +// CHECK: vpandnd -2064(%rdx), %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x00,0xdf,0x82,0xf0,0xf7,0xff,0xff] + vpandnd -2064(%rdx), %xmm17, %xmm24 + +// CHECK: vpandnd 508(%rdx){1to4}, %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x10,0xdf,0x42,0x7f] + vpandnd 508(%rdx){1to4}, %xmm17, %xmm24 + +// CHECK: vpandnd 512(%rdx){1to4}, %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x10,0xdf,0x82,0x00,0x02,0x00,0x00] + vpandnd 512(%rdx){1to4}, %xmm17, %xmm24 + +// CHECK: vpandnd -512(%rdx){1to4}, %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x10,0xdf,0x42,0x80] + vpandnd -512(%rdx){1to4}, %xmm17, %xmm24 + +// CHECK: vpandnd -516(%rdx){1to4}, %xmm17, %xmm24 +// CHECK: encoding: [0x62,0x61,0x75,0x10,0xdf,0x82,0xfc,0xfd,0xff,0xff] + vpandnd -516(%rdx){1to4}, %xmm17, %xmm24 + +// CHECK: vpandnd %ymm17, %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xa1,0x25,0x20,0xdf,0xd9] + vpandnd %ymm17, %ymm27, %ymm19 + +// CHECK: vpandnd %ymm17, %ymm27, %ymm19 {%k2} +// CHECK: encoding: [0x62,0xa1,0x25,0x22,0xdf,0xd9] + vpandnd %ymm17, %ymm27, %ymm19 {%k2} + +// CHECK: vpandnd %ymm17, %ymm27, %ymm19 {%k2} {z} +// CHECK: encoding: [0x62,0xa1,0x25,0xa2,0xdf,0xd9] + vpandnd %ymm17, %ymm27, %ymm19 {%k2} {z} + +// CHECK: vpandnd (%rcx), %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x20,0xdf,0x19] + vpandnd (%rcx), %ymm27, %ymm19 + +// CHECK: vpandnd 291(%rax,%r14,8), %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xa1,0x25,0x20,0xdf,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpandnd 291(%rax,%r14,8), %ymm27, %ymm19 + +// CHECK: vpandnd (%rcx){1to8}, %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x30,0xdf,0x19] + vpandnd (%rcx){1to8}, %ymm27, %ymm19 + +// CHECK: vpandnd 4064(%rdx), %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x20,0xdf,0x5a,0x7f] + vpandnd 4064(%rdx), %ymm27, %ymm19 + +// CHECK: vpandnd 4096(%rdx), %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x20,0xdf,0x9a,0x00,0x10,0x00,0x00] + vpandnd 4096(%rdx), %ymm27, %ymm19 + +// CHECK: vpandnd -4096(%rdx), %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x20,0xdf,0x5a,0x80] + vpandnd -4096(%rdx), %ymm27, %ymm19 + +// CHECK: vpandnd -4128(%rdx), %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x20,0xdf,0x9a,0xe0,0xef,0xff,0xff] + vpandnd -4128(%rdx), %ymm27, %ymm19 + +// CHECK: vpandnd 508(%rdx){1to8}, %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x30,0xdf,0x5a,0x7f] + vpandnd 508(%rdx){1to8}, %ymm27, %ymm19 + +// CHECK: vpandnd 512(%rdx){1to8}, %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x30,0xdf,0x9a,0x00,0x02,0x00,0x00] + vpandnd 512(%rdx){1to8}, %ymm27, %ymm19 + +// CHECK: vpandnd -512(%rdx){1to8}, %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x30,0xdf,0x5a,0x80] + vpandnd -512(%rdx){1to8}, %ymm27, %ymm19 + +// CHECK: vpandnd -516(%rdx){1to8}, %ymm27, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x30,0xdf,0x9a,0xfc,0xfd,0xff,0xff] + vpandnd -516(%rdx){1to8}, %ymm27, %ymm19 + +// CHECK: vpandnq %xmm20, %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xa1,0x9d,0x00,0xdf,0xfc] + vpandnq %xmm20, %xmm28, %xmm23 + +// CHECK: vpandnq %xmm20, %xmm28, %xmm23 {%k7} +// CHECK: encoding: [0x62,0xa1,0x9d,0x07,0xdf,0xfc] + vpandnq %xmm20, %xmm28, %xmm23 {%k7} + +// CHECK: vpandnq %xmm20, %xmm28, %xmm23 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x9d,0x87,0xdf,0xfc] + vpandnq %xmm20, %xmm28, %xmm23 {%k7} {z} + +// CHECK: vpandnq (%rcx), %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xdf,0x39] + vpandnq (%rcx), %xmm28, %xmm23 + +// CHECK: vpandnq 291(%rax,%r14,8), %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xa1,0x9d,0x00,0xdf,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpandnq 291(%rax,%r14,8), %xmm28, %xmm23 + +// CHECK: vpandnq (%rcx){1to2}, %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xdf,0x39] + vpandnq (%rcx){1to2}, %xmm28, %xmm23 + +// CHECK: vpandnq 2032(%rdx), %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xdf,0x7a,0x7f] + vpandnq 2032(%rdx), %xmm28, %xmm23 + +// CHECK: vpandnq 2048(%rdx), %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xdf,0xba,0x00,0x08,0x00,0x00] + vpandnq 2048(%rdx), %xmm28, %xmm23 + +// CHECK: vpandnq -2048(%rdx), %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xdf,0x7a,0x80] + vpandnq -2048(%rdx), %xmm28, %xmm23 + +// CHECK: vpandnq -2064(%rdx), %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xdf,0xba,0xf0,0xf7,0xff,0xff] + vpandnq -2064(%rdx), %xmm28, %xmm23 + +// CHECK: vpandnq 1016(%rdx){1to2}, %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xdf,0x7a,0x7f] + vpandnq 1016(%rdx){1to2}, %xmm28, %xmm23 + +// CHECK: vpandnq 1024(%rdx){1to2}, %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xdf,0xba,0x00,0x04,0x00,0x00] + vpandnq 1024(%rdx){1to2}, %xmm28, %xmm23 + +// CHECK: vpandnq -1024(%rdx){1to2}, %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xdf,0x7a,0x80] + vpandnq -1024(%rdx){1to2}, %xmm28, %xmm23 + +// CHECK: vpandnq -1032(%rdx){1to2}, %xmm28, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xdf,0xba,0xf8,0xfb,0xff,0xff] + vpandnq -1032(%rdx){1to2}, %xmm28, %xmm23 + +// CHECK: vpandnq %ymm28, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x01,0xdd,0x20,0xdf,0xec] + vpandnq %ymm28, %ymm20, %ymm29 + +// CHECK: vpandnq %ymm28, %ymm20, %ymm29 {%k1} +// CHECK: encoding: [0x62,0x01,0xdd,0x21,0xdf,0xec] + vpandnq %ymm28, %ymm20, %ymm29 {%k1} + +// CHECK: vpandnq %ymm28, %ymm20, %ymm29 {%k1} {z} +// CHECK: encoding: [0x62,0x01,0xdd,0xa1,0xdf,0xec] + vpandnq %ymm28, %ymm20, %ymm29 {%k1} {z} + +// CHECK: vpandnq (%rcx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xdf,0x29] + vpandnq (%rcx), %ymm20, %ymm29 + +// CHECK: vpandnq 291(%rax,%r14,8), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x21,0xdd,0x20,0xdf,0xac,0xf0,0x23,0x01,0x00,0x00] + vpandnq 291(%rax,%r14,8), %ymm20, %ymm29 + +// CHECK: vpandnq (%rcx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xdf,0x29] + vpandnq (%rcx){1to4}, %ymm20, %ymm29 + +// CHECK: vpandnq 4064(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xdf,0x6a,0x7f] + vpandnq 4064(%rdx), %ymm20, %ymm29 + +// CHECK: vpandnq 4096(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xdf,0xaa,0x00,0x10,0x00,0x00] + vpandnq 4096(%rdx), %ymm20, %ymm29 + +// CHECK: vpandnq -4096(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xdf,0x6a,0x80] + vpandnq -4096(%rdx), %ymm20, %ymm29 + +// CHECK: vpandnq -4128(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xdf,0xaa,0xe0,0xef,0xff,0xff] + vpandnq -4128(%rdx), %ymm20, %ymm29 + +// CHECK: vpandnq 1016(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xdf,0x6a,0x7f] + vpandnq 1016(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpandnq 1024(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xdf,0xaa,0x00,0x04,0x00,0x00] + vpandnq 1024(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpandnq -1024(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xdf,0x6a,0x80] + vpandnq -1024(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpandnq -1032(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xdf,0xaa,0xf8,0xfb,0xff,0xff] + vpandnq -1032(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpandq %xmm25, %xmm19, %xmm22 +// CHECK: encoding: [0x62,0x81,0xe5,0x00,0xdb,0xf1] + vpandq %xmm25, %xmm19, %xmm22 + +// CHECK: vpandq %xmm25, %xmm19, %xmm22 {%k5} +// CHECK: encoding: [0x62,0x81,0xe5,0x05,0xdb,0xf1] + vpandq %xmm25, %xmm19, %xmm22 {%k5} + +// CHECK: vpandq %xmm25, %xmm19, %xmm22 {%k5} {z} +// CHECK: encoding: [0x62,0x81,0xe5,0x85,0xdb,0xf1] + vpandq %xmm25, %xmm19, %xmm22 {%k5} {z} + +// CHECK: vpandq (%rcx), %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x00,0xdb,0x31] + vpandq (%rcx), %xmm19, %xmm22 + +// CHECK: vpandq 291(%rax,%r14,8), %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xa1,0xe5,0x00,0xdb,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpandq 291(%rax,%r14,8), %xmm19, %xmm22 + +// CHECK: vpandq (%rcx){1to2}, %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x10,0xdb,0x31] + vpandq (%rcx){1to2}, %xmm19, %xmm22 + +// CHECK: vpandq 2032(%rdx), %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x00,0xdb,0x72,0x7f] + vpandq 2032(%rdx), %xmm19, %xmm22 + +// CHECK: vpandq 2048(%rdx), %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x00,0xdb,0xb2,0x00,0x08,0x00,0x00] + vpandq 2048(%rdx), %xmm19, %xmm22 + +// CHECK: vpandq -2048(%rdx), %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x00,0xdb,0x72,0x80] + vpandq -2048(%rdx), %xmm19, %xmm22 + +// CHECK: vpandq -2064(%rdx), %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x00,0xdb,0xb2,0xf0,0xf7,0xff,0xff] + vpandq -2064(%rdx), %xmm19, %xmm22 + +// CHECK: vpandq 1016(%rdx){1to2}, %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x10,0xdb,0x72,0x7f] + vpandq 1016(%rdx){1to2}, %xmm19, %xmm22 + +// CHECK: vpandq 1024(%rdx){1to2}, %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x10,0xdb,0xb2,0x00,0x04,0x00,0x00] + vpandq 1024(%rdx){1to2}, %xmm19, %xmm22 + +// CHECK: vpandq -1024(%rdx){1to2}, %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x10,0xdb,0x72,0x80] + vpandq -1024(%rdx){1to2}, %xmm19, %xmm22 + +// CHECK: vpandq -1032(%rdx){1to2}, %xmm19, %xmm22 +// CHECK: encoding: [0x62,0xe1,0xe5,0x10,0xdb,0xb2,0xf8,0xfb,0xff,0xff] + vpandq -1032(%rdx){1to2}, %xmm19, %xmm22 + +// CHECK: vpandq %ymm24, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x01,0xad,0x20,0xdb,0xc8] + vpandq %ymm24, %ymm26, %ymm25 + +// CHECK: vpandq %ymm24, %ymm26, %ymm25 {%k7} +// CHECK: encoding: [0x62,0x01,0xad,0x27,0xdb,0xc8] + vpandq %ymm24, %ymm26, %ymm25 {%k7} + +// CHECK: vpandq %ymm24, %ymm26, %ymm25 {%k7} {z} +// CHECK: encoding: [0x62,0x01,0xad,0xa7,0xdb,0xc8] + vpandq %ymm24, %ymm26, %ymm25 {%k7} {z} + +// CHECK: vpandq (%rcx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xdb,0x09] + vpandq (%rcx), %ymm26, %ymm25 + +// CHECK: vpandq 291(%rax,%r14,8), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x21,0xad,0x20,0xdb,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpandq 291(%rax,%r14,8), %ymm26, %ymm25 + +// CHECK: vpandq (%rcx){1to4}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0xdb,0x09] + vpandq (%rcx){1to4}, %ymm26, %ymm25 + +// CHECK: vpandq 4064(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xdb,0x4a,0x7f] + vpandq 4064(%rdx), %ymm26, %ymm25 + +// CHECK: vpandq 4096(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xdb,0x8a,0x00,0x10,0x00,0x00] + vpandq 4096(%rdx), %ymm26, %ymm25 + +// CHECK: vpandq -4096(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xdb,0x4a,0x80] + vpandq -4096(%rdx), %ymm26, %ymm25 + +// CHECK: vpandq -4128(%rdx), %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xdb,0x8a,0xe0,0xef,0xff,0xff] + vpandq -4128(%rdx), %ymm26, %ymm25 + +// CHECK: vpandq 1016(%rdx){1to4}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0xdb,0x4a,0x7f] + vpandq 1016(%rdx){1to4}, %ymm26, %ymm25 + +// CHECK: vpandq 1024(%rdx){1to4}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0xdb,0x8a,0x00,0x04,0x00,0x00] + vpandq 1024(%rdx){1to4}, %ymm26, %ymm25 + +// CHECK: vpandq -1024(%rdx){1to4}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0xdb,0x4a,0x80] + vpandq -1024(%rdx){1to4}, %ymm26, %ymm25 + +// CHECK: vpandq -1032(%rdx){1to4}, %ymm26, %ymm25 +// CHECK: encoding: [0x62,0x61,0xad,0x30,0xdb,0x8a,0xf8,0xfb,0xff,0xff] + vpandq -1032(%rdx){1to4}, %ymm26, %ymm25 + +// CHECK: vpcmpd $171, %xmm20, %xmm23, %k4 +// CHECK: encoding: [0x62,0xb3,0x45,0x00,0x1f,0xe4,0xab] + vpcmpd $171, %xmm20, %xmm23, %k4 + +// CHECK: vpcmpd $171, %xmm20, %xmm23, %k4 {%k1} +// CHECK: encoding: [0x62,0xb3,0x45,0x01,0x1f,0xe4,0xab] + vpcmpd $171, %xmm20, %xmm23, %k4 {%k1} + +// CHECK: vpcmpd $123, %xmm20, %xmm23, %k4 +// CHECK: encoding: [0x62,0xb3,0x45,0x00,0x1f,0xe4,0x7b] + vpcmpd $123, %xmm20, %xmm23, %k4 + +// CHECK: vpcmpd $123, (%rcx), %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x00,0x1f,0x21,0x7b] + vpcmpd $123, (%rcx), %xmm23, %k4 + +// CHECK: vpcmpd $123, 291(%rax,%r14,8), %xmm23, %k4 +// CHECK: encoding: [0x62,0xb3,0x45,0x00,0x1f,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpd $123, 291(%rax,%r14,8), %xmm23, %k4 + +// CHECK: vpcmpd $123, (%rcx){1to4}, %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x10,0x1f,0x21,0x7b] + vpcmpd $123, (%rcx){1to4}, %xmm23, %k4 + +// CHECK: vpcmpd $123, 2032(%rdx), %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x00,0x1f,0x62,0x7f,0x7b] + vpcmpd $123, 2032(%rdx), %xmm23, %k4 + +// CHECK: vpcmpd $123, 2048(%rdx), %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x00,0x1f,0xa2,0x00,0x08,0x00,0x00,0x7b] + vpcmpd $123, 2048(%rdx), %xmm23, %k4 + +// CHECK: vpcmpd $123, -2048(%rdx), %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x00,0x1f,0x62,0x80,0x7b] + vpcmpd $123, -2048(%rdx), %xmm23, %k4 + +// CHECK: vpcmpd $123, -2064(%rdx), %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x00,0x1f,0xa2,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpd $123, -2064(%rdx), %xmm23, %k4 + +// CHECK: vpcmpd $123, 508(%rdx){1to4}, %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x10,0x1f,0x62,0x7f,0x7b] + vpcmpd $123, 508(%rdx){1to4}, %xmm23, %k4 + +// CHECK: vpcmpd $123, 512(%rdx){1to4}, %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x10,0x1f,0xa2,0x00,0x02,0x00,0x00,0x7b] + vpcmpd $123, 512(%rdx){1to4}, %xmm23, %k4 + +// CHECK: vpcmpd $123, -512(%rdx){1to4}, %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x10,0x1f,0x62,0x80,0x7b] + vpcmpd $123, -512(%rdx){1to4}, %xmm23, %k4 + +// CHECK: vpcmpd $123, -516(%rdx){1to4}, %xmm23, %k4 +// CHECK: encoding: [0x62,0xf3,0x45,0x10,0x1f,0xa2,0xfc,0xfd,0xff,0xff,0x7b] + vpcmpd $123, -516(%rdx){1to4}, %xmm23, %k4 + +// CHECK: vpcmpd $171, %ymm19, %ymm24, %k4 +// CHECK: encoding: [0x62,0xb3,0x3d,0x20,0x1f,0xe3,0xab] + vpcmpd $171, %ymm19, %ymm24, %k4 + +// CHECK: vpcmpd $171, %ymm19, %ymm24, %k4 {%k3} +// CHECK: encoding: [0x62,0xb3,0x3d,0x23,0x1f,0xe3,0xab] + vpcmpd $171, %ymm19, %ymm24, %k4 {%k3} + +// CHECK: vpcmpd $123, %ymm19, %ymm24, %k4 +// CHECK: encoding: [0x62,0xb3,0x3d,0x20,0x1f,0xe3,0x7b] + vpcmpd $123, %ymm19, %ymm24, %k4 + +// CHECK: vpcmpd $123, (%rcx), %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x20,0x1f,0x21,0x7b] + vpcmpd $123, (%rcx), %ymm24, %k4 + +// CHECK: vpcmpd $123, 291(%rax,%r14,8), %ymm24, %k4 +// CHECK: encoding: [0x62,0xb3,0x3d,0x20,0x1f,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpd $123, 291(%rax,%r14,8), %ymm24, %k4 + +// CHECK: vpcmpd $123, (%rcx){1to8}, %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x30,0x1f,0x21,0x7b] + vpcmpd $123, (%rcx){1to8}, %ymm24, %k4 + +// CHECK: vpcmpd $123, 4064(%rdx), %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x20,0x1f,0x62,0x7f,0x7b] + vpcmpd $123, 4064(%rdx), %ymm24, %k4 + +// CHECK: vpcmpd $123, 4096(%rdx), %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x20,0x1f,0xa2,0x00,0x10,0x00,0x00,0x7b] + vpcmpd $123, 4096(%rdx), %ymm24, %k4 + +// CHECK: vpcmpd $123, -4096(%rdx), %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x20,0x1f,0x62,0x80,0x7b] + vpcmpd $123, -4096(%rdx), %ymm24, %k4 + +// CHECK: vpcmpd $123, -4128(%rdx), %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x20,0x1f,0xa2,0xe0,0xef,0xff,0xff,0x7b] + vpcmpd $123, -4128(%rdx), %ymm24, %k4 + +// CHECK: vpcmpd $123, 508(%rdx){1to8}, %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x30,0x1f,0x62,0x7f,0x7b] + vpcmpd $123, 508(%rdx){1to8}, %ymm24, %k4 + +// CHECK: vpcmpd $123, 512(%rdx){1to8}, %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x30,0x1f,0xa2,0x00,0x02,0x00,0x00,0x7b] + vpcmpd $123, 512(%rdx){1to8}, %ymm24, %k4 + +// CHECK: vpcmpd $123, -512(%rdx){1to8}, %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x30,0x1f,0x62,0x80,0x7b] + vpcmpd $123, -512(%rdx){1to8}, %ymm24, %k4 + +// CHECK: vpcmpd $123, -516(%rdx){1to8}, %ymm24, %k4 +// CHECK: encoding: [0x62,0xf3,0x3d,0x30,0x1f,0xa2,0xfc,0xfd,0xff,0xff,0x7b] + vpcmpd $123, -516(%rdx){1to8}, %ymm24, %k4 + +// CHECK: vpcmpeqd %xmm24, %xmm29, %k3 +// CHECK: encoding: [0x62,0x91,0x15,0x00,0x76,0xd8] + vpcmpeqd %xmm24, %xmm29, %k3 + +// CHECK: vpcmpeqd %xmm24, %xmm29, %k3 {%k5} +// CHECK: encoding: [0x62,0x91,0x15,0x05,0x76,0xd8] + vpcmpeqd %xmm24, %xmm29, %k3 {%k5} + +// CHECK: vpcmpeqd (%rcx), %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x76,0x19] + vpcmpeqd (%rcx), %xmm29, %k3 + +// CHECK: vpcmpeqd 291(%rax,%r14,8), %xmm29, %k3 +// CHECK: encoding: [0x62,0xb1,0x15,0x00,0x76,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqd 291(%rax,%r14,8), %xmm29, %k3 + +// CHECK: vpcmpeqd (%rcx){1to4}, %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x76,0x19] + vpcmpeqd (%rcx){1to4}, %xmm29, %k3 + +// CHECK: vpcmpeqd 2032(%rdx), %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x76,0x5a,0x7f] + vpcmpeqd 2032(%rdx), %xmm29, %k3 + +// CHECK: vpcmpeqd 2048(%rdx), %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x76,0x9a,0x00,0x08,0x00,0x00] + vpcmpeqd 2048(%rdx), %xmm29, %k3 + +// CHECK: vpcmpeqd -2048(%rdx), %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x76,0x5a,0x80] + vpcmpeqd -2048(%rdx), %xmm29, %k3 + +// CHECK: vpcmpeqd -2064(%rdx), %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x76,0x9a,0xf0,0xf7,0xff,0xff] + vpcmpeqd -2064(%rdx), %xmm29, %k3 + +// CHECK: vpcmpeqd 508(%rdx){1to4}, %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x76,0x5a,0x7f] + vpcmpeqd 508(%rdx){1to4}, %xmm29, %k3 + +// CHECK: vpcmpeqd 512(%rdx){1to4}, %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x76,0x9a,0x00,0x02,0x00,0x00] + vpcmpeqd 512(%rdx){1to4}, %xmm29, %k3 + +// CHECK: vpcmpeqd -512(%rdx){1to4}, %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x76,0x5a,0x80] + vpcmpeqd -512(%rdx){1to4}, %xmm29, %k3 + +// CHECK: vpcmpeqd -516(%rdx){1to4}, %xmm29, %k3 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x76,0x9a,0xfc,0xfd,0xff,0xff] + vpcmpeqd -516(%rdx){1to4}, %xmm29, %k3 + +// CHECK: vpcmpeqd %ymm20, %ymm26, %k5 +// CHECK: encoding: [0x62,0xb1,0x2d,0x20,0x76,0xec] + vpcmpeqd %ymm20, %ymm26, %k5 + +// CHECK: vpcmpeqd %ymm20, %ymm26, %k5 {%k5} +// CHECK: encoding: [0x62,0xb1,0x2d,0x25,0x76,0xec] + vpcmpeqd %ymm20, %ymm26, %k5 {%k5} + +// CHECK: vpcmpeqd (%rcx), %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x20,0x76,0x29] + vpcmpeqd (%rcx), %ymm26, %k5 + +// CHECK: vpcmpeqd 291(%rax,%r14,8), %ymm26, %k5 +// CHECK: encoding: [0x62,0xb1,0x2d,0x20,0x76,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqd 291(%rax,%r14,8), %ymm26, %k5 + +// CHECK: vpcmpeqd (%rcx){1to8}, %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x30,0x76,0x29] + vpcmpeqd (%rcx){1to8}, %ymm26, %k5 + +// CHECK: vpcmpeqd 4064(%rdx), %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x20,0x76,0x6a,0x7f] + vpcmpeqd 4064(%rdx), %ymm26, %k5 + +// CHECK: vpcmpeqd 4096(%rdx), %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x20,0x76,0xaa,0x00,0x10,0x00,0x00] + vpcmpeqd 4096(%rdx), %ymm26, %k5 + +// CHECK: vpcmpeqd -4096(%rdx), %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x20,0x76,0x6a,0x80] + vpcmpeqd -4096(%rdx), %ymm26, %k5 + +// CHECK: vpcmpeqd -4128(%rdx), %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x20,0x76,0xaa,0xe0,0xef,0xff,0xff] + vpcmpeqd -4128(%rdx), %ymm26, %k5 + +// CHECK: vpcmpeqd 508(%rdx){1to8}, %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x30,0x76,0x6a,0x7f] + vpcmpeqd 508(%rdx){1to8}, %ymm26, %k5 + +// CHECK: vpcmpeqd 512(%rdx){1to8}, %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x30,0x76,0xaa,0x00,0x02,0x00,0x00] + vpcmpeqd 512(%rdx){1to8}, %ymm26, %k5 + +// CHECK: vpcmpeqd -512(%rdx){1to8}, %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x30,0x76,0x6a,0x80] + vpcmpeqd -512(%rdx){1to8}, %ymm26, %k5 + +// CHECK: vpcmpeqd -516(%rdx){1to8}, %ymm26, %k5 +// CHECK: encoding: [0x62,0xf1,0x2d,0x30,0x76,0xaa,0xfc,0xfd,0xff,0xff] + vpcmpeqd -516(%rdx){1to8}, %ymm26, %k5 + +// CHECK: vpcmpeqq %xmm29, %xmm20, %k3 +// CHECK: encoding: [0x62,0x92,0xdd,0x00,0x29,0xdd] + vpcmpeqq %xmm29, %xmm20, %k3 + +// CHECK: vpcmpeqq %xmm29, %xmm20, %k3 {%k3} +// CHECK: encoding: [0x62,0x92,0xdd,0x03,0x29,0xdd] + vpcmpeqq %xmm29, %xmm20, %k3 {%k3} + +// CHECK: vpcmpeqq (%rcx), %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x00,0x29,0x19] + vpcmpeqq (%rcx), %xmm20, %k3 + +// CHECK: vpcmpeqq 291(%rax,%r14,8), %xmm20, %k3 +// CHECK: encoding: [0x62,0xb2,0xdd,0x00,0x29,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqq 291(%rax,%r14,8), %xmm20, %k3 + +// CHECK: vpcmpeqq (%rcx){1to2}, %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x10,0x29,0x19] + vpcmpeqq (%rcx){1to2}, %xmm20, %k3 + +// CHECK: vpcmpeqq 2032(%rdx), %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x00,0x29,0x5a,0x7f] + vpcmpeqq 2032(%rdx), %xmm20, %k3 + +// CHECK: vpcmpeqq 2048(%rdx), %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x00,0x29,0x9a,0x00,0x08,0x00,0x00] + vpcmpeqq 2048(%rdx), %xmm20, %k3 + +// CHECK: vpcmpeqq -2048(%rdx), %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x00,0x29,0x5a,0x80] + vpcmpeqq -2048(%rdx), %xmm20, %k3 + +// CHECK: vpcmpeqq -2064(%rdx), %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x00,0x29,0x9a,0xf0,0xf7,0xff,0xff] + vpcmpeqq -2064(%rdx), %xmm20, %k3 + +// CHECK: vpcmpeqq 1016(%rdx){1to2}, %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x10,0x29,0x5a,0x7f] + vpcmpeqq 1016(%rdx){1to2}, %xmm20, %k3 + +// CHECK: vpcmpeqq 1024(%rdx){1to2}, %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x10,0x29,0x9a,0x00,0x04,0x00,0x00] + vpcmpeqq 1024(%rdx){1to2}, %xmm20, %k3 + +// CHECK: vpcmpeqq -1024(%rdx){1to2}, %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x10,0x29,0x5a,0x80] + vpcmpeqq -1024(%rdx){1to2}, %xmm20, %k3 + +// CHECK: vpcmpeqq -1032(%rdx){1to2}, %xmm20, %k3 +// CHECK: encoding: [0x62,0xf2,0xdd,0x10,0x29,0x9a,0xf8,0xfb,0xff,0xff] + vpcmpeqq -1032(%rdx){1to2}, %xmm20, %k3 + +// CHECK: vpcmpeqq %ymm23, %ymm30, %k5 +// CHECK: encoding: [0x62,0xb2,0x8d,0x20,0x29,0xef] + vpcmpeqq %ymm23, %ymm30, %k5 + +// CHECK: vpcmpeqq %ymm23, %ymm30, %k5 {%k6} +// CHECK: encoding: [0x62,0xb2,0x8d,0x26,0x29,0xef] + vpcmpeqq %ymm23, %ymm30, %k5 {%k6} + +// CHECK: vpcmpeqq (%rcx), %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x20,0x29,0x29] + vpcmpeqq (%rcx), %ymm30, %k5 + +// CHECK: vpcmpeqq 291(%rax,%r14,8), %ymm30, %k5 +// CHECK: encoding: [0x62,0xb2,0x8d,0x20,0x29,0xac,0xf0,0x23,0x01,0x00,0x00] + vpcmpeqq 291(%rax,%r14,8), %ymm30, %k5 + +// CHECK: vpcmpeqq (%rcx){1to4}, %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x30,0x29,0x29] + vpcmpeqq (%rcx){1to4}, %ymm30, %k5 + +// CHECK: vpcmpeqq 4064(%rdx), %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x20,0x29,0x6a,0x7f] + vpcmpeqq 4064(%rdx), %ymm30, %k5 + +// CHECK: vpcmpeqq 4096(%rdx), %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x20,0x29,0xaa,0x00,0x10,0x00,0x00] + vpcmpeqq 4096(%rdx), %ymm30, %k5 + +// CHECK: vpcmpeqq -4096(%rdx), %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x20,0x29,0x6a,0x80] + vpcmpeqq -4096(%rdx), %ymm30, %k5 + +// CHECK: vpcmpeqq -4128(%rdx), %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x20,0x29,0xaa,0xe0,0xef,0xff,0xff] + vpcmpeqq -4128(%rdx), %ymm30, %k5 + +// CHECK: vpcmpeqq 1016(%rdx){1to4}, %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x30,0x29,0x6a,0x7f] + vpcmpeqq 1016(%rdx){1to4}, %ymm30, %k5 + +// CHECK: vpcmpeqq 1024(%rdx){1to4}, %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x30,0x29,0xaa,0x00,0x04,0x00,0x00] + vpcmpeqq 1024(%rdx){1to4}, %ymm30, %k5 + +// CHECK: vpcmpeqq -1024(%rdx){1to4}, %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x30,0x29,0x6a,0x80] + vpcmpeqq -1024(%rdx){1to4}, %ymm30, %k5 + +// CHECK: vpcmpeqq -1032(%rdx){1to4}, %ymm30, %k5 +// CHECK: encoding: [0x62,0xf2,0x8d,0x30,0x29,0xaa,0xf8,0xfb,0xff,0xff] + vpcmpeqq -1032(%rdx){1to4}, %ymm30, %k5 + +// CHECK: vpcmpgtd %xmm20, %xmm29, %k4 +// CHECK: encoding: [0x62,0xb1,0x15,0x00,0x66,0xe4] + vpcmpgtd %xmm20, %xmm29, %k4 + +// CHECK: vpcmpgtd %xmm20, %xmm29, %k4 {%k2} +// CHECK: encoding: [0x62,0xb1,0x15,0x02,0x66,0xe4] + vpcmpgtd %xmm20, %xmm29, %k4 {%k2} + +// CHECK: vpcmpgtd (%rcx), %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x66,0x21] + vpcmpgtd (%rcx), %xmm29, %k4 + +// CHECK: vpcmpgtd 291(%rax,%r14,8), %xmm29, %k4 +// CHECK: encoding: [0x62,0xb1,0x15,0x00,0x66,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtd 291(%rax,%r14,8), %xmm29, %k4 + +// CHECK: vpcmpgtd (%rcx){1to4}, %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x66,0x21] + vpcmpgtd (%rcx){1to4}, %xmm29, %k4 + +// CHECK: vpcmpgtd 2032(%rdx), %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x66,0x62,0x7f] + vpcmpgtd 2032(%rdx), %xmm29, %k4 + +// CHECK: vpcmpgtd 2048(%rdx), %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x66,0xa2,0x00,0x08,0x00,0x00] + vpcmpgtd 2048(%rdx), %xmm29, %k4 + +// CHECK: vpcmpgtd -2048(%rdx), %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x66,0x62,0x80] + vpcmpgtd -2048(%rdx), %xmm29, %k4 + +// CHECK: vpcmpgtd -2064(%rdx), %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x66,0xa2,0xf0,0xf7,0xff,0xff] + vpcmpgtd -2064(%rdx), %xmm29, %k4 + +// CHECK: vpcmpgtd 508(%rdx){1to4}, %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x66,0x62,0x7f] + vpcmpgtd 508(%rdx){1to4}, %xmm29, %k4 + +// CHECK: vpcmpgtd 512(%rdx){1to4}, %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x66,0xa2,0x00,0x02,0x00,0x00] + vpcmpgtd 512(%rdx){1to4}, %xmm29, %k4 + +// CHECK: vpcmpgtd -512(%rdx){1to4}, %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x66,0x62,0x80] + vpcmpgtd -512(%rdx){1to4}, %xmm29, %k4 + +// CHECK: vpcmpgtd -516(%rdx){1to4}, %xmm29, %k4 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x66,0xa2,0xfc,0xfd,0xff,0xff] + vpcmpgtd -516(%rdx){1to4}, %xmm29, %k4 + +// CHECK: vpcmpgtd %ymm17, %ymm22, %k2 +// CHECK: encoding: [0x62,0xb1,0x4d,0x20,0x66,0xd1] + vpcmpgtd %ymm17, %ymm22, %k2 + +// CHECK: vpcmpgtd %ymm17, %ymm22, %k2 {%k1} +// CHECK: encoding: [0x62,0xb1,0x4d,0x21,0x66,0xd1] + vpcmpgtd %ymm17, %ymm22, %k2 {%k1} + +// CHECK: vpcmpgtd (%rcx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x66,0x11] + vpcmpgtd (%rcx), %ymm22, %k2 + +// CHECK: vpcmpgtd 291(%rax,%r14,8), %ymm22, %k2 +// CHECK: encoding: [0x62,0xb1,0x4d,0x20,0x66,0x94,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtd 291(%rax,%r14,8), %ymm22, %k2 + +// CHECK: vpcmpgtd (%rcx){1to8}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x66,0x11] + vpcmpgtd (%rcx){1to8}, %ymm22, %k2 + +// CHECK: vpcmpgtd 4064(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x66,0x52,0x7f] + vpcmpgtd 4064(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtd 4096(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x66,0x92,0x00,0x10,0x00,0x00] + vpcmpgtd 4096(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtd -4096(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x66,0x52,0x80] + vpcmpgtd -4096(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtd -4128(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x66,0x92,0xe0,0xef,0xff,0xff] + vpcmpgtd -4128(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtd 508(%rdx){1to8}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x66,0x52,0x7f] + vpcmpgtd 508(%rdx){1to8}, %ymm22, %k2 + +// CHECK: vpcmpgtd 512(%rdx){1to8}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x66,0x92,0x00,0x02,0x00,0x00] + vpcmpgtd 512(%rdx){1to8}, %ymm22, %k2 + +// CHECK: vpcmpgtd -512(%rdx){1to8}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x66,0x52,0x80] + vpcmpgtd -512(%rdx){1to8}, %ymm22, %k2 + +// CHECK: vpcmpgtd -516(%rdx){1to8}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x66,0x92,0xfc,0xfd,0xff,0xff] + vpcmpgtd -516(%rdx){1to8}, %ymm22, %k2 + +// CHECK: vpcmpgtq %xmm25, %xmm30, %k3 +// CHECK: encoding: [0x62,0x92,0x8d,0x00,0x37,0xd9] + vpcmpgtq %xmm25, %xmm30, %k3 + +// CHECK: vpcmpgtq %xmm25, %xmm30, %k3 {%k6} +// CHECK: encoding: [0x62,0x92,0x8d,0x06,0x37,0xd9] + vpcmpgtq %xmm25, %xmm30, %k3 {%k6} + +// CHECK: vpcmpgtq (%rcx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x00,0x37,0x19] + vpcmpgtq (%rcx), %xmm30, %k3 + +// CHECK: vpcmpgtq 291(%rax,%r14,8), %xmm30, %k3 +// CHECK: encoding: [0x62,0xb2,0x8d,0x00,0x37,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtq 291(%rax,%r14,8), %xmm30, %k3 + +// CHECK: vpcmpgtq (%rcx){1to2}, %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x10,0x37,0x19] + vpcmpgtq (%rcx){1to2}, %xmm30, %k3 + +// CHECK: vpcmpgtq 2032(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x00,0x37,0x5a,0x7f] + vpcmpgtq 2032(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtq 2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x00,0x37,0x9a,0x00,0x08,0x00,0x00] + vpcmpgtq 2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtq -2048(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x00,0x37,0x5a,0x80] + vpcmpgtq -2048(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtq -2064(%rdx), %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x00,0x37,0x9a,0xf0,0xf7,0xff,0xff] + vpcmpgtq -2064(%rdx), %xmm30, %k3 + +// CHECK: vpcmpgtq 1016(%rdx){1to2}, %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x10,0x37,0x5a,0x7f] + vpcmpgtq 1016(%rdx){1to2}, %xmm30, %k3 + +// CHECK: vpcmpgtq 1024(%rdx){1to2}, %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x10,0x37,0x9a,0x00,0x04,0x00,0x00] + vpcmpgtq 1024(%rdx){1to2}, %xmm30, %k3 + +// CHECK: vpcmpgtq -1024(%rdx){1to2}, %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x10,0x37,0x5a,0x80] + vpcmpgtq -1024(%rdx){1to2}, %xmm30, %k3 + +// CHECK: vpcmpgtq -1032(%rdx){1to2}, %xmm30, %k3 +// CHECK: encoding: [0x62,0xf2,0x8d,0x10,0x37,0x9a,0xf8,0xfb,0xff,0xff] + vpcmpgtq -1032(%rdx){1to2}, %xmm30, %k3 + +// CHECK: vpcmpgtq %ymm20, %ymm22, %k2 +// CHECK: encoding: [0x62,0xb2,0xcd,0x20,0x37,0xd4] + vpcmpgtq %ymm20, %ymm22, %k2 + +// CHECK: vpcmpgtq %ymm20, %ymm22, %k2 {%k1} +// CHECK: encoding: [0x62,0xb2,0xcd,0x21,0x37,0xd4] + vpcmpgtq %ymm20, %ymm22, %k2 {%k1} + +// CHECK: vpcmpgtq (%rcx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x20,0x37,0x11] + vpcmpgtq (%rcx), %ymm22, %k2 + +// CHECK: vpcmpgtq 291(%rax,%r14,8), %ymm22, %k2 +// CHECK: encoding: [0x62,0xb2,0xcd,0x20,0x37,0x94,0xf0,0x23,0x01,0x00,0x00] + vpcmpgtq 291(%rax,%r14,8), %ymm22, %k2 + +// CHECK: vpcmpgtq (%rcx){1to4}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x30,0x37,0x11] + vpcmpgtq (%rcx){1to4}, %ymm22, %k2 + +// CHECK: vpcmpgtq 4064(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x20,0x37,0x52,0x7f] + vpcmpgtq 4064(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtq 4096(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x20,0x37,0x92,0x00,0x10,0x00,0x00] + vpcmpgtq 4096(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtq -4096(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x20,0x37,0x52,0x80] + vpcmpgtq -4096(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtq -4128(%rdx), %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x20,0x37,0x92,0xe0,0xef,0xff,0xff] + vpcmpgtq -4128(%rdx), %ymm22, %k2 + +// CHECK: vpcmpgtq 1016(%rdx){1to4}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x30,0x37,0x52,0x7f] + vpcmpgtq 1016(%rdx){1to4}, %ymm22, %k2 + +// CHECK: vpcmpgtq 1024(%rdx){1to4}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x30,0x37,0x92,0x00,0x04,0x00,0x00] + vpcmpgtq 1024(%rdx){1to4}, %ymm22, %k2 + +// CHECK: vpcmpgtq -1024(%rdx){1to4}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x30,0x37,0x52,0x80] + vpcmpgtq -1024(%rdx){1to4}, %ymm22, %k2 + +// CHECK: vpcmpgtq -1032(%rdx){1to4}, %ymm22, %k2 +// CHECK: encoding: [0x62,0xf2,0xcd,0x30,0x37,0x92,0xf8,0xfb,0xff,0xff] + vpcmpgtq -1032(%rdx){1to4}, %ymm22, %k2 + +// CHECK: vpcmpq $171, %xmm24, %xmm27, %k5 +// CHECK: encoding: [0x62,0x93,0xa5,0x00,0x1f,0xe8,0xab] + vpcmpq $171, %xmm24, %xmm27, %k5 + +// CHECK: vpcmpq $171, %xmm24, %xmm27, %k5 {%k7} +// CHECK: encoding: [0x62,0x93,0xa5,0x07,0x1f,0xe8,0xab] + vpcmpq $171, %xmm24, %xmm27, %k5 {%k7} + +// CHECK: vpcmpq $123, %xmm24, %xmm27, %k5 +// CHECK: encoding: [0x62,0x93,0xa5,0x00,0x1f,0xe8,0x7b] + vpcmpq $123, %xmm24, %xmm27, %k5 + +// CHECK: vpcmpq $123, (%rcx), %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x00,0x1f,0x29,0x7b] + vpcmpq $123, (%rcx), %xmm27, %k5 + +// CHECK: vpcmpq $123, 291(%rax,%r14,8), %xmm27, %k5 +// CHECK: encoding: [0x62,0xb3,0xa5,0x00,0x1f,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpq $123, 291(%rax,%r14,8), %xmm27, %k5 + +// CHECK: vpcmpq $123, (%rcx){1to2}, %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x10,0x1f,0x29,0x7b] + vpcmpq $123, (%rcx){1to2}, %xmm27, %k5 + +// CHECK: vpcmpq $123, 2032(%rdx), %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x00,0x1f,0x6a,0x7f,0x7b] + vpcmpq $123, 2032(%rdx), %xmm27, %k5 + +// CHECK: vpcmpq $123, 2048(%rdx), %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x00,0x1f,0xaa,0x00,0x08,0x00,0x00,0x7b] + vpcmpq $123, 2048(%rdx), %xmm27, %k5 + +// CHECK: vpcmpq $123, -2048(%rdx), %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x00,0x1f,0x6a,0x80,0x7b] + vpcmpq $123, -2048(%rdx), %xmm27, %k5 + +// CHECK: vpcmpq $123, -2064(%rdx), %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x00,0x1f,0xaa,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpq $123, -2064(%rdx), %xmm27, %k5 + +// CHECK: vpcmpq $123, 1016(%rdx){1to2}, %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x10,0x1f,0x6a,0x7f,0x7b] + vpcmpq $123, 1016(%rdx){1to2}, %xmm27, %k5 + +// CHECK: vpcmpq $123, 1024(%rdx){1to2}, %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x10,0x1f,0xaa,0x00,0x04,0x00,0x00,0x7b] + vpcmpq $123, 1024(%rdx){1to2}, %xmm27, %k5 + +// CHECK: vpcmpq $123, -1024(%rdx){1to2}, %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x10,0x1f,0x6a,0x80,0x7b] + vpcmpq $123, -1024(%rdx){1to2}, %xmm27, %k5 + +// CHECK: vpcmpq $123, -1032(%rdx){1to2}, %xmm27, %k5 +// CHECK: encoding: [0x62,0xf3,0xa5,0x10,0x1f,0xaa,0xf8,0xfb,0xff,0xff,0x7b] + vpcmpq $123, -1032(%rdx){1to2}, %xmm27, %k5 + +// CHECK: vpcmpq $171, %ymm19, %ymm26, %k4 +// CHECK: encoding: [0x62,0xb3,0xad,0x20,0x1f,0xe3,0xab] + vpcmpq $171, %ymm19, %ymm26, %k4 + +// CHECK: vpcmpq $171, %ymm19, %ymm26, %k4 {%k6} +// CHECK: encoding: [0x62,0xb3,0xad,0x26,0x1f,0xe3,0xab] + vpcmpq $171, %ymm19, %ymm26, %k4 {%k6} + +// CHECK: vpcmpq $123, %ymm19, %ymm26, %k4 +// CHECK: encoding: [0x62,0xb3,0xad,0x20,0x1f,0xe3,0x7b] + vpcmpq $123, %ymm19, %ymm26, %k4 + +// CHECK: vpcmpq $123, (%rcx), %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x1f,0x21,0x7b] + vpcmpq $123, (%rcx), %ymm26, %k4 + +// CHECK: vpcmpq $123, 291(%rax,%r14,8), %ymm26, %k4 +// CHECK: encoding: [0x62,0xb3,0xad,0x20,0x1f,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpq $123, 291(%rax,%r14,8), %ymm26, %k4 + +// CHECK: vpcmpq $123, (%rcx){1to4}, %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x30,0x1f,0x21,0x7b] + vpcmpq $123, (%rcx){1to4}, %ymm26, %k4 + +// CHECK: vpcmpq $123, 4064(%rdx), %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x1f,0x62,0x7f,0x7b] + vpcmpq $123, 4064(%rdx), %ymm26, %k4 + +// CHECK: vpcmpq $123, 4096(%rdx), %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x1f,0xa2,0x00,0x10,0x00,0x00,0x7b] + vpcmpq $123, 4096(%rdx), %ymm26, %k4 + +// CHECK: vpcmpq $123, -4096(%rdx), %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x1f,0x62,0x80,0x7b] + vpcmpq $123, -4096(%rdx), %ymm26, %k4 + +// CHECK: vpcmpq $123, -4128(%rdx), %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x20,0x1f,0xa2,0xe0,0xef,0xff,0xff,0x7b] + vpcmpq $123, -4128(%rdx), %ymm26, %k4 + +// CHECK: vpcmpq $123, 1016(%rdx){1to4}, %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x30,0x1f,0x62,0x7f,0x7b] + vpcmpq $123, 1016(%rdx){1to4}, %ymm26, %k4 + +// CHECK: vpcmpq $123, 1024(%rdx){1to4}, %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x30,0x1f,0xa2,0x00,0x04,0x00,0x00,0x7b] + vpcmpq $123, 1024(%rdx){1to4}, %ymm26, %k4 + +// CHECK: vpcmpq $123, -1024(%rdx){1to4}, %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x30,0x1f,0x62,0x80,0x7b] + vpcmpq $123, -1024(%rdx){1to4}, %ymm26, %k4 + +// CHECK: vpcmpq $123, -1032(%rdx){1to4}, %ymm26, %k4 +// CHECK: encoding: [0x62,0xf3,0xad,0x30,0x1f,0xa2,0xf8,0xfb,0xff,0xff,0x7b] + vpcmpq $123, -1032(%rdx){1to4}, %ymm26, %k4 + +// CHECK: vpcmpud $171, %xmm21, %xmm22, %k3 +// CHECK: encoding: [0x62,0xb3,0x4d,0x00,0x1e,0xdd,0xab] + vpcmpud $171, %xmm21, %xmm22, %k3 + +// CHECK: vpcmpud $171, %xmm21, %xmm22, %k3 {%k1} +// CHECK: encoding: [0x62,0xb3,0x4d,0x01,0x1e,0xdd,0xab] + vpcmpud $171, %xmm21, %xmm22, %k3 {%k1} + +// CHECK: vpcmpud $123, %xmm21, %xmm22, %k3 +// CHECK: encoding: [0x62,0xb3,0x4d,0x00,0x1e,0xdd,0x7b] + vpcmpud $123, %xmm21, %xmm22, %k3 + +// CHECK: vpcmpud $123, (%rcx), %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x1e,0x19,0x7b] + vpcmpud $123, (%rcx), %xmm22, %k3 + +// CHECK: vpcmpud $123, 291(%rax,%r14,8), %xmm22, %k3 +// CHECK: encoding: [0x62,0xb3,0x4d,0x00,0x1e,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpud $123, 291(%rax,%r14,8), %xmm22, %k3 + +// CHECK: vpcmpud $123, (%rcx){1to4}, %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x10,0x1e,0x19,0x7b] + vpcmpud $123, (%rcx){1to4}, %xmm22, %k3 + +// CHECK: vpcmpud $123, 2032(%rdx), %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x1e,0x5a,0x7f,0x7b] + vpcmpud $123, 2032(%rdx), %xmm22, %k3 + +// CHECK: vpcmpud $123, 2048(%rdx), %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x1e,0x9a,0x00,0x08,0x00,0x00,0x7b] + vpcmpud $123, 2048(%rdx), %xmm22, %k3 + +// CHECK: vpcmpud $123, -2048(%rdx), %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x1e,0x5a,0x80,0x7b] + vpcmpud $123, -2048(%rdx), %xmm22, %k3 + +// CHECK: vpcmpud $123, -2064(%rdx), %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x00,0x1e,0x9a,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpud $123, -2064(%rdx), %xmm22, %k3 + +// CHECK: vpcmpud $123, 508(%rdx){1to4}, %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x10,0x1e,0x5a,0x7f,0x7b] + vpcmpud $123, 508(%rdx){1to4}, %xmm22, %k3 + +// CHECK: vpcmpud $123, 512(%rdx){1to4}, %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x10,0x1e,0x9a,0x00,0x02,0x00,0x00,0x7b] + vpcmpud $123, 512(%rdx){1to4}, %xmm22, %k3 + +// CHECK: vpcmpud $123, -512(%rdx){1to4}, %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x10,0x1e,0x5a,0x80,0x7b] + vpcmpud $123, -512(%rdx){1to4}, %xmm22, %k3 + +// CHECK: vpcmpud $123, -516(%rdx){1to4}, %xmm22, %k3 +// CHECK: encoding: [0x62,0xf3,0x4d,0x10,0x1e,0x9a,0xfc,0xfd,0xff,0xff,0x7b] + vpcmpud $123, -516(%rdx){1to4}, %xmm22, %k3 + +// CHECK: vpcmpud $171, %ymm20, %ymm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x0d,0x20,0x1e,0xdc,0xab] + vpcmpud $171, %ymm20, %ymm30, %k3 + +// CHECK: vpcmpud $171, %ymm20, %ymm30, %k3 {%k6} +// CHECK: encoding: [0x62,0xb3,0x0d,0x26,0x1e,0xdc,0xab] + vpcmpud $171, %ymm20, %ymm30, %k3 {%k6} + +// CHECK: vpcmpud $123, %ymm20, %ymm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x0d,0x20,0x1e,0xdc,0x7b] + vpcmpud $123, %ymm20, %ymm30, %k3 + +// CHECK: vpcmpud $123, (%rcx), %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x20,0x1e,0x19,0x7b] + vpcmpud $123, (%rcx), %ymm30, %k3 + +// CHECK: vpcmpud $123, 291(%rax,%r14,8), %ymm30, %k3 +// CHECK: encoding: [0x62,0xb3,0x0d,0x20,0x1e,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpud $123, 291(%rax,%r14,8), %ymm30, %k3 + +// CHECK: vpcmpud $123, (%rcx){1to8}, %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x30,0x1e,0x19,0x7b] + vpcmpud $123, (%rcx){1to8}, %ymm30, %k3 + +// CHECK: vpcmpud $123, 4064(%rdx), %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x20,0x1e,0x5a,0x7f,0x7b] + vpcmpud $123, 4064(%rdx), %ymm30, %k3 + +// CHECK: vpcmpud $123, 4096(%rdx), %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x20,0x1e,0x9a,0x00,0x10,0x00,0x00,0x7b] + vpcmpud $123, 4096(%rdx), %ymm30, %k3 + +// CHECK: vpcmpud $123, -4096(%rdx), %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x20,0x1e,0x5a,0x80,0x7b] + vpcmpud $123, -4096(%rdx), %ymm30, %k3 + +// CHECK: vpcmpud $123, -4128(%rdx), %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x20,0x1e,0x9a,0xe0,0xef,0xff,0xff,0x7b] + vpcmpud $123, -4128(%rdx), %ymm30, %k3 + +// CHECK: vpcmpud $123, 508(%rdx){1to8}, %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x30,0x1e,0x5a,0x7f,0x7b] + vpcmpud $123, 508(%rdx){1to8}, %ymm30, %k3 + +// CHECK: vpcmpud $123, 512(%rdx){1to8}, %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x30,0x1e,0x9a,0x00,0x02,0x00,0x00,0x7b] + vpcmpud $123, 512(%rdx){1to8}, %ymm30, %k3 + +// CHECK: vpcmpud $123, -512(%rdx){1to8}, %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x30,0x1e,0x5a,0x80,0x7b] + vpcmpud $123, -512(%rdx){1to8}, %ymm30, %k3 + +// CHECK: vpcmpud $123, -516(%rdx){1to8}, %ymm30, %k3 +// CHECK: encoding: [0x62,0xf3,0x0d,0x30,0x1e,0x9a,0xfc,0xfd,0xff,0xff,0x7b] + vpcmpud $123, -516(%rdx){1to8}, %ymm30, %k3 + +// CHECK: vpcmpuq $171, %xmm28, %xmm28, %k5 +// CHECK: encoding: [0x62,0x93,0x9d,0x00,0x1e,0xec,0xab] + vpcmpuq $171, %xmm28, %xmm28, %k5 + +// CHECK: vpcmpuq $171, %xmm28, %xmm28, %k5 {%k4} +// CHECK: encoding: [0x62,0x93,0x9d,0x04,0x1e,0xec,0xab] + vpcmpuq $171, %xmm28, %xmm28, %k5 {%k4} + +// CHECK: vpcmpuq $123, %xmm28, %xmm28, %k5 +// CHECK: encoding: [0x62,0x93,0x9d,0x00,0x1e,0xec,0x7b] + vpcmpuq $123, %xmm28, %xmm28, %k5 + +// CHECK: vpcmpuq $123, (%rcx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x1e,0x29,0x7b] + vpcmpuq $123, (%rcx), %xmm28, %k5 + +// CHECK: vpcmpuq $123, 291(%rax,%r14,8), %xmm28, %k5 +// CHECK: encoding: [0x62,0xb3,0x9d,0x00,0x1e,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpuq $123, 291(%rax,%r14,8), %xmm28, %k5 + +// CHECK: vpcmpuq $123, (%rcx){1to2}, %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x10,0x1e,0x29,0x7b] + vpcmpuq $123, (%rcx){1to2}, %xmm28, %k5 + +// CHECK: vpcmpuq $123, 2032(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x1e,0x6a,0x7f,0x7b] + vpcmpuq $123, 2032(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuq $123, 2048(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x1e,0xaa,0x00,0x08,0x00,0x00,0x7b] + vpcmpuq $123, 2048(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuq $123, -2048(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x1e,0x6a,0x80,0x7b] + vpcmpuq $123, -2048(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuq $123, -2064(%rdx), %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x00,0x1e,0xaa,0xf0,0xf7,0xff,0xff,0x7b] + vpcmpuq $123, -2064(%rdx), %xmm28, %k5 + +// CHECK: vpcmpuq $123, 1016(%rdx){1to2}, %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x10,0x1e,0x6a,0x7f,0x7b] + vpcmpuq $123, 1016(%rdx){1to2}, %xmm28, %k5 + +// CHECK: vpcmpuq $123, 1024(%rdx){1to2}, %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x10,0x1e,0xaa,0x00,0x04,0x00,0x00,0x7b] + vpcmpuq $123, 1024(%rdx){1to2}, %xmm28, %k5 + +// CHECK: vpcmpuq $123, -1024(%rdx){1to2}, %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x10,0x1e,0x6a,0x80,0x7b] + vpcmpuq $123, -1024(%rdx){1to2}, %xmm28, %k5 + +// CHECK: vpcmpuq $123, -1032(%rdx){1to2}, %xmm28, %k5 +// CHECK: encoding: [0x62,0xf3,0x9d,0x10,0x1e,0xaa,0xf8,0xfb,0xff,0xff,0x7b] + vpcmpuq $123, -1032(%rdx){1to2}, %xmm28, %k5 + +// CHECK: vpcmpuq $171, %ymm26, %ymm22, %k3 +// CHECK: encoding: [0x62,0x93,0xcd,0x20,0x1e,0xda,0xab] + vpcmpuq $171, %ymm26, %ymm22, %k3 + +// CHECK: vpcmpuq $171, %ymm26, %ymm22, %k3 {%k3} +// CHECK: encoding: [0x62,0x93,0xcd,0x23,0x1e,0xda,0xab] + vpcmpuq $171, %ymm26, %ymm22, %k3 {%k3} + +// CHECK: vpcmpuq $123, %ymm26, %ymm22, %k3 +// CHECK: encoding: [0x62,0x93,0xcd,0x20,0x1e,0xda,0x7b] + vpcmpuq $123, %ymm26, %ymm22, %k3 + +// CHECK: vpcmpuq $123, (%rcx), %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x20,0x1e,0x19,0x7b] + vpcmpuq $123, (%rcx), %ymm22, %k3 + +// CHECK: vpcmpuq $123, 291(%rax,%r14,8), %ymm22, %k3 +// CHECK: encoding: [0x62,0xb3,0xcd,0x20,0x1e,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpcmpuq $123, 291(%rax,%r14,8), %ymm22, %k3 + +// CHECK: vpcmpuq $123, (%rcx){1to4}, %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x30,0x1e,0x19,0x7b] + vpcmpuq $123, (%rcx){1to4}, %ymm22, %k3 + +// CHECK: vpcmpuq $123, 4064(%rdx), %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x20,0x1e,0x5a,0x7f,0x7b] + vpcmpuq $123, 4064(%rdx), %ymm22, %k3 + +// CHECK: vpcmpuq $123, 4096(%rdx), %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x20,0x1e,0x9a,0x00,0x10,0x00,0x00,0x7b] + vpcmpuq $123, 4096(%rdx), %ymm22, %k3 + +// CHECK: vpcmpuq $123, -4096(%rdx), %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x20,0x1e,0x5a,0x80,0x7b] + vpcmpuq $123, -4096(%rdx), %ymm22, %k3 + +// CHECK: vpcmpuq $123, -4128(%rdx), %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x20,0x1e,0x9a,0xe0,0xef,0xff,0xff,0x7b] + vpcmpuq $123, -4128(%rdx), %ymm22, %k3 + +// CHECK: vpcmpuq $123, 1016(%rdx){1to4}, %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x30,0x1e,0x5a,0x7f,0x7b] + vpcmpuq $123, 1016(%rdx){1to4}, %ymm22, %k3 + +// CHECK: vpcmpuq $123, 1024(%rdx){1to4}, %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x30,0x1e,0x9a,0x00,0x04,0x00,0x00,0x7b] + vpcmpuq $123, 1024(%rdx){1to4}, %ymm22, %k3 + +// CHECK: vpcmpuq $123, -1024(%rdx){1to4}, %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x30,0x1e,0x5a,0x80,0x7b] + vpcmpuq $123, -1024(%rdx){1to4}, %ymm22, %k3 + +// CHECK: vpcmpuq $123, -1032(%rdx){1to4}, %ymm22, %k3 +// CHECK: encoding: [0x62,0xf3,0xcd,0x30,0x1e,0x9a,0xf8,0xfb,0xff,0xff,0x7b] + vpcmpuq $123, -1032(%rdx){1to4}, %ymm22, %k3 + +// CHECK: vpmaxsd %xmm26, %xmm22, %xmm19 +// CHECK: encoding: [0x62,0x82,0x4d,0x00,0x3d,0xda] + vpmaxsd %xmm26, %xmm22, %xmm19 + +// CHECK: vpmaxsd %xmm26, %xmm22, %xmm19 {%k2} +// CHECK: encoding: [0x62,0x82,0x4d,0x02,0x3d,0xda] + vpmaxsd %xmm26, %xmm22, %xmm19 {%k2} + +// CHECK: vpmaxsd %xmm26, %xmm22, %xmm19 {%k2} {z} +// CHECK: encoding: [0x62,0x82,0x4d,0x82,0x3d,0xda] + vpmaxsd %xmm26, %xmm22, %xmm19 {%k2} {z} + +// CHECK: vpmaxsd (%rcx), %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x00,0x3d,0x19] + vpmaxsd (%rcx), %xmm22, %xmm19 + +// CHECK: vpmaxsd 291(%rax,%r14,8), %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xa2,0x4d,0x00,0x3d,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpmaxsd 291(%rax,%r14,8), %xmm22, %xmm19 + +// CHECK: vpmaxsd (%rcx){1to4}, %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x10,0x3d,0x19] + vpmaxsd (%rcx){1to4}, %xmm22, %xmm19 + +// CHECK: vpmaxsd 2032(%rdx), %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x00,0x3d,0x5a,0x7f] + vpmaxsd 2032(%rdx), %xmm22, %xmm19 + +// CHECK: vpmaxsd 2048(%rdx), %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x00,0x3d,0x9a,0x00,0x08,0x00,0x00] + vpmaxsd 2048(%rdx), %xmm22, %xmm19 + +// CHECK: vpmaxsd -2048(%rdx), %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x00,0x3d,0x5a,0x80] + vpmaxsd -2048(%rdx), %xmm22, %xmm19 + +// CHECK: vpmaxsd -2064(%rdx), %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x00,0x3d,0x9a,0xf0,0xf7,0xff,0xff] + vpmaxsd -2064(%rdx), %xmm22, %xmm19 + +// CHECK: vpmaxsd 508(%rdx){1to4}, %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x10,0x3d,0x5a,0x7f] + vpmaxsd 508(%rdx){1to4}, %xmm22, %xmm19 + +// CHECK: vpmaxsd 512(%rdx){1to4}, %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x10,0x3d,0x9a,0x00,0x02,0x00,0x00] + vpmaxsd 512(%rdx){1to4}, %xmm22, %xmm19 + +// CHECK: vpmaxsd -512(%rdx){1to4}, %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x10,0x3d,0x5a,0x80] + vpmaxsd -512(%rdx){1to4}, %xmm22, %xmm19 + +// CHECK: vpmaxsd -516(%rdx){1to4}, %xmm22, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x10,0x3d,0x9a,0xfc,0xfd,0xff,0xff] + vpmaxsd -516(%rdx){1to4}, %xmm22, %xmm19 + +// CHECK: vpmaxsd %ymm23, %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x22,0x3d,0x20,0x3d,0xdf] + vpmaxsd %ymm23, %ymm24, %ymm27 + +// CHECK: vpmaxsd %ymm23, %ymm24, %ymm27 {%k6} +// CHECK: encoding: [0x62,0x22,0x3d,0x26,0x3d,0xdf] + vpmaxsd %ymm23, %ymm24, %ymm27 {%k6} + +// CHECK: vpmaxsd %ymm23, %ymm24, %ymm27 {%k6} {z} +// CHECK: encoding: [0x62,0x22,0x3d,0xa6,0x3d,0xdf] + vpmaxsd %ymm23, %ymm24, %ymm27 {%k6} {z} + +// CHECK: vpmaxsd (%rcx), %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x20,0x3d,0x19] + vpmaxsd (%rcx), %ymm24, %ymm27 + +// CHECK: vpmaxsd 291(%rax,%r14,8), %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x22,0x3d,0x20,0x3d,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpmaxsd 291(%rax,%r14,8), %ymm24, %ymm27 + +// CHECK: vpmaxsd (%rcx){1to8}, %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x30,0x3d,0x19] + vpmaxsd (%rcx){1to8}, %ymm24, %ymm27 + +// CHECK: vpmaxsd 4064(%rdx), %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x20,0x3d,0x5a,0x7f] + vpmaxsd 4064(%rdx), %ymm24, %ymm27 + +// CHECK: vpmaxsd 4096(%rdx), %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x20,0x3d,0x9a,0x00,0x10,0x00,0x00] + vpmaxsd 4096(%rdx), %ymm24, %ymm27 + +// CHECK: vpmaxsd -4096(%rdx), %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x20,0x3d,0x5a,0x80] + vpmaxsd -4096(%rdx), %ymm24, %ymm27 + +// CHECK: vpmaxsd -4128(%rdx), %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x20,0x3d,0x9a,0xe0,0xef,0xff,0xff] + vpmaxsd -4128(%rdx), %ymm24, %ymm27 + +// CHECK: vpmaxsd 508(%rdx){1to8}, %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x30,0x3d,0x5a,0x7f] + vpmaxsd 508(%rdx){1to8}, %ymm24, %ymm27 + +// CHECK: vpmaxsd 512(%rdx){1to8}, %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x30,0x3d,0x9a,0x00,0x02,0x00,0x00] + vpmaxsd 512(%rdx){1to8}, %ymm24, %ymm27 + +// CHECK: vpmaxsd -512(%rdx){1to8}, %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x30,0x3d,0x5a,0x80] + vpmaxsd -512(%rdx){1to8}, %ymm24, %ymm27 + +// CHECK: vpmaxsd -516(%rdx){1to8}, %ymm24, %ymm27 +// CHECK: encoding: [0x62,0x62,0x3d,0x30,0x3d,0x9a,0xfc,0xfd,0xff,0xff] + vpmaxsd -516(%rdx){1to8}, %ymm24, %ymm27 + +// CHECK: vpmaxsq %xmm25, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0x82,0xc5,0x00,0x3d,0xf9] + vpmaxsq %xmm25, %xmm23, %xmm23 + +// CHECK: vpmaxsq %xmm25, %xmm23, %xmm23 {%k2} +// CHECK: encoding: [0x62,0x82,0xc5,0x02,0x3d,0xf9] + vpmaxsq %xmm25, %xmm23, %xmm23 {%k2} + +// CHECK: vpmaxsq %xmm25, %xmm23, %xmm23 {%k2} {z} +// CHECK: encoding: [0x62,0x82,0xc5,0x82,0x3d,0xf9] + vpmaxsq %xmm25, %xmm23, %xmm23 {%k2} {z} + +// CHECK: vpmaxsq (%rcx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x00,0x3d,0x39] + vpmaxsq (%rcx), %xmm23, %xmm23 + +// CHECK: vpmaxsq 291(%rax,%r14,8), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xa2,0xc5,0x00,0x3d,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpmaxsq 291(%rax,%r14,8), %xmm23, %xmm23 + +// CHECK: vpmaxsq (%rcx){1to2}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x10,0x3d,0x39] + vpmaxsq (%rcx){1to2}, %xmm23, %xmm23 + +// CHECK: vpmaxsq 2032(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x00,0x3d,0x7a,0x7f] + vpmaxsq 2032(%rdx), %xmm23, %xmm23 + +// CHECK: vpmaxsq 2048(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x00,0x3d,0xba,0x00,0x08,0x00,0x00] + vpmaxsq 2048(%rdx), %xmm23, %xmm23 + +// CHECK: vpmaxsq -2048(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x00,0x3d,0x7a,0x80] + vpmaxsq -2048(%rdx), %xmm23, %xmm23 + +// CHECK: vpmaxsq -2064(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x00,0x3d,0xba,0xf0,0xf7,0xff,0xff] + vpmaxsq -2064(%rdx), %xmm23, %xmm23 + +// CHECK: vpmaxsq 1016(%rdx){1to2}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x10,0x3d,0x7a,0x7f] + vpmaxsq 1016(%rdx){1to2}, %xmm23, %xmm23 + +// CHECK: vpmaxsq 1024(%rdx){1to2}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x10,0x3d,0xba,0x00,0x04,0x00,0x00] + vpmaxsq 1024(%rdx){1to2}, %xmm23, %xmm23 + +// CHECK: vpmaxsq -1024(%rdx){1to2}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x10,0x3d,0x7a,0x80] + vpmaxsq -1024(%rdx){1to2}, %xmm23, %xmm23 + +// CHECK: vpmaxsq -1032(%rdx){1to2}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0xc5,0x10,0x3d,0xba,0xf8,0xfb,0xff,0xff] + vpmaxsq -1032(%rdx){1to2}, %xmm23, %xmm23 + +// CHECK: vpmaxsq %ymm25, %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x02,0xdd,0x20,0x3d,0xf1] + vpmaxsq %ymm25, %ymm20, %ymm30 + +// CHECK: vpmaxsq %ymm25, %ymm20, %ymm30 {%k6} +// CHECK: encoding: [0x62,0x02,0xdd,0x26,0x3d,0xf1] + vpmaxsq %ymm25, %ymm20, %ymm30 {%k6} + +// CHECK: vpmaxsq %ymm25, %ymm20, %ymm30 {%k6} {z} +// CHECK: encoding: [0x62,0x02,0xdd,0xa6,0x3d,0xf1] + vpmaxsq %ymm25, %ymm20, %ymm30 {%k6} {z} + +// CHECK: vpmaxsq (%rcx), %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x3d,0x31] + vpmaxsq (%rcx), %ymm20, %ymm30 + +// CHECK: vpmaxsq 291(%rax,%r14,8), %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x22,0xdd,0x20,0x3d,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpmaxsq 291(%rax,%r14,8), %ymm20, %ymm30 + +// CHECK: vpmaxsq (%rcx){1to4}, %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x3d,0x31] + vpmaxsq (%rcx){1to4}, %ymm20, %ymm30 + +// CHECK: vpmaxsq 4064(%rdx), %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x3d,0x72,0x7f] + vpmaxsq 4064(%rdx), %ymm20, %ymm30 + +// CHECK: vpmaxsq 4096(%rdx), %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x3d,0xb2,0x00,0x10,0x00,0x00] + vpmaxsq 4096(%rdx), %ymm20, %ymm30 + +// CHECK: vpmaxsq -4096(%rdx), %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x3d,0x72,0x80] + vpmaxsq -4096(%rdx), %ymm20, %ymm30 + +// CHECK: vpmaxsq -4128(%rdx), %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x3d,0xb2,0xe0,0xef,0xff,0xff] + vpmaxsq -4128(%rdx), %ymm20, %ymm30 + +// CHECK: vpmaxsq 1016(%rdx){1to4}, %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x3d,0x72,0x7f] + vpmaxsq 1016(%rdx){1to4}, %ymm20, %ymm30 + +// CHECK: vpmaxsq 1024(%rdx){1to4}, %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x3d,0xb2,0x00,0x04,0x00,0x00] + vpmaxsq 1024(%rdx){1to4}, %ymm20, %ymm30 + +// CHECK: vpmaxsq -1024(%rdx){1to4}, %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x3d,0x72,0x80] + vpmaxsq -1024(%rdx){1to4}, %ymm20, %ymm30 + +// CHECK: vpmaxsq -1032(%rdx){1to4}, %ymm20, %ymm30 +// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x3d,0xb2,0xf8,0xfb,0xff,0xff] + vpmaxsq -1032(%rdx){1to4}, %ymm20, %ymm30 + +// CHECK: vpmaxud %xmm19, %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xa2,0x75,0x00,0x3f,0xeb] + vpmaxud %xmm19, %xmm17, %xmm21 + +// CHECK: vpmaxud %xmm19, %xmm17, %xmm21 {%k7} +// CHECK: encoding: [0x62,0xa2,0x75,0x07,0x3f,0xeb] + vpmaxud %xmm19, %xmm17, %xmm21 {%k7} + +// CHECK: vpmaxud %xmm19, %xmm17, %xmm21 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x75,0x87,0x3f,0xeb] + vpmaxud %xmm19, %xmm17, %xmm21 {%k7} {z} + +// CHECK: vpmaxud (%rcx), %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x00,0x3f,0x29] + vpmaxud (%rcx), %xmm17, %xmm21 + +// CHECK: vpmaxud 291(%rax,%r14,8), %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xa2,0x75,0x00,0x3f,0xac,0xf0,0x23,0x01,0x00,0x00] + vpmaxud 291(%rax,%r14,8), %xmm17, %xmm21 + +// CHECK: vpmaxud (%rcx){1to4}, %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x10,0x3f,0x29] + vpmaxud (%rcx){1to4}, %xmm17, %xmm21 + +// CHECK: vpmaxud 2032(%rdx), %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x00,0x3f,0x6a,0x7f] + vpmaxud 2032(%rdx), %xmm17, %xmm21 + +// CHECK: vpmaxud 2048(%rdx), %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x00,0x3f,0xaa,0x00,0x08,0x00,0x00] + vpmaxud 2048(%rdx), %xmm17, %xmm21 + +// CHECK: vpmaxud -2048(%rdx), %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x00,0x3f,0x6a,0x80] + vpmaxud -2048(%rdx), %xmm17, %xmm21 + +// CHECK: vpmaxud -2064(%rdx), %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x00,0x3f,0xaa,0xf0,0xf7,0xff,0xff] + vpmaxud -2064(%rdx), %xmm17, %xmm21 + +// CHECK: vpmaxud 508(%rdx){1to4}, %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x10,0x3f,0x6a,0x7f] + vpmaxud 508(%rdx){1to4}, %xmm17, %xmm21 + +// CHECK: vpmaxud 512(%rdx){1to4}, %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x10,0x3f,0xaa,0x00,0x02,0x00,0x00] + vpmaxud 512(%rdx){1to4}, %xmm17, %xmm21 + +// CHECK: vpmaxud -512(%rdx){1to4}, %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x10,0x3f,0x6a,0x80] + vpmaxud -512(%rdx){1to4}, %xmm17, %xmm21 + +// CHECK: vpmaxud -516(%rdx){1to4}, %xmm17, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x75,0x10,0x3f,0xaa,0xfc,0xfd,0xff,0xff] + vpmaxud -516(%rdx){1to4}, %xmm17, %xmm21 + +// CHECK: vpmaxud %ymm23, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x22,0x45,0x20,0x3f,0xe7] + vpmaxud %ymm23, %ymm23, %ymm28 + +// CHECK: vpmaxud %ymm23, %ymm23, %ymm28 {%k7} +// CHECK: encoding: [0x62,0x22,0x45,0x27,0x3f,0xe7] + vpmaxud %ymm23, %ymm23, %ymm28 {%k7} + +// CHECK: vpmaxud %ymm23, %ymm23, %ymm28 {%k7} {z} +// CHECK: encoding: [0x62,0x22,0x45,0xa7,0x3f,0xe7] + vpmaxud %ymm23, %ymm23, %ymm28 {%k7} {z} + +// CHECK: vpmaxud (%rcx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x3f,0x21] + vpmaxud (%rcx), %ymm23, %ymm28 + +// CHECK: vpmaxud 291(%rax,%r14,8), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x22,0x45,0x20,0x3f,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpmaxud 291(%rax,%r14,8), %ymm23, %ymm28 + +// CHECK: vpmaxud (%rcx){1to8}, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x3f,0x21] + vpmaxud (%rcx){1to8}, %ymm23, %ymm28 + +// CHECK: vpmaxud 4064(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x3f,0x62,0x7f] + vpmaxud 4064(%rdx), %ymm23, %ymm28 + +// CHECK: vpmaxud 4096(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x3f,0xa2,0x00,0x10,0x00,0x00] + vpmaxud 4096(%rdx), %ymm23, %ymm28 + +// CHECK: vpmaxud -4096(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x3f,0x62,0x80] + vpmaxud -4096(%rdx), %ymm23, %ymm28 + +// CHECK: vpmaxud -4128(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x3f,0xa2,0xe0,0xef,0xff,0xff] + vpmaxud -4128(%rdx), %ymm23, %ymm28 + +// CHECK: vpmaxud 508(%rdx){1to8}, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x3f,0x62,0x7f] + vpmaxud 508(%rdx){1to8}, %ymm23, %ymm28 + +// CHECK: vpmaxud 512(%rdx){1to8}, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x3f,0xa2,0x00,0x02,0x00,0x00] + vpmaxud 512(%rdx){1to8}, %ymm23, %ymm28 + +// CHECK: vpmaxud -512(%rdx){1to8}, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x3f,0x62,0x80] + vpmaxud -512(%rdx){1to8}, %ymm23, %ymm28 + +// CHECK: vpmaxud -516(%rdx){1to8}, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x3f,0xa2,0xfc,0xfd,0xff,0xff] + vpmaxud -516(%rdx){1to8}, %ymm23, %ymm28 + +// CHECK: vpmaxuq %xmm25, %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x02,0xad,0x00,0x3f,0xd1] + vpmaxuq %xmm25, %xmm26, %xmm26 + +// CHECK: vpmaxuq %xmm25, %xmm26, %xmm26 {%k7} +// CHECK: encoding: [0x62,0x02,0xad,0x07,0x3f,0xd1] + vpmaxuq %xmm25, %xmm26, %xmm26 {%k7} + +// CHECK: vpmaxuq %xmm25, %xmm26, %xmm26 {%k7} {z} +// CHECK: encoding: [0x62,0x02,0xad,0x87,0x3f,0xd1] + vpmaxuq %xmm25, %xmm26, %xmm26 {%k7} {z} + +// CHECK: vpmaxuq (%rcx), %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x00,0x3f,0x11] + vpmaxuq (%rcx), %xmm26, %xmm26 + +// CHECK: vpmaxuq 291(%rax,%r14,8), %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x22,0xad,0x00,0x3f,0x94,0xf0,0x23,0x01,0x00,0x00] + vpmaxuq 291(%rax,%r14,8), %xmm26, %xmm26 + +// CHECK: vpmaxuq (%rcx){1to2}, %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x10,0x3f,0x11] + vpmaxuq (%rcx){1to2}, %xmm26, %xmm26 + +// CHECK: vpmaxuq 2032(%rdx), %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x00,0x3f,0x52,0x7f] + vpmaxuq 2032(%rdx), %xmm26, %xmm26 + +// CHECK: vpmaxuq 2048(%rdx), %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x00,0x3f,0x92,0x00,0x08,0x00,0x00] + vpmaxuq 2048(%rdx), %xmm26, %xmm26 + +// CHECK: vpmaxuq -2048(%rdx), %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x00,0x3f,0x52,0x80] + vpmaxuq -2048(%rdx), %xmm26, %xmm26 + +// CHECK: vpmaxuq -2064(%rdx), %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x00,0x3f,0x92,0xf0,0xf7,0xff,0xff] + vpmaxuq -2064(%rdx), %xmm26, %xmm26 + +// CHECK: vpmaxuq 1016(%rdx){1to2}, %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x10,0x3f,0x52,0x7f] + vpmaxuq 1016(%rdx){1to2}, %xmm26, %xmm26 + +// CHECK: vpmaxuq 1024(%rdx){1to2}, %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x10,0x3f,0x92,0x00,0x04,0x00,0x00] + vpmaxuq 1024(%rdx){1to2}, %xmm26, %xmm26 + +// CHECK: vpmaxuq -1024(%rdx){1to2}, %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x10,0x3f,0x52,0x80] + vpmaxuq -1024(%rdx){1to2}, %xmm26, %xmm26 + +// CHECK: vpmaxuq -1032(%rdx){1to2}, %xmm26, %xmm26 +// CHECK: encoding: [0x62,0x62,0xad,0x10,0x3f,0x92,0xf8,0xfb,0xff,0xff] + vpmaxuq -1032(%rdx){1to2}, %xmm26, %xmm26 + +// CHECK: vpmaxuq %ymm20, %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x22,0xf5,0x20,0x3f,0xf4] + vpmaxuq %ymm20, %ymm17, %ymm30 + +// CHECK: vpmaxuq %ymm20, %ymm17, %ymm30 {%k4} +// CHECK: encoding: [0x62,0x22,0xf5,0x24,0x3f,0xf4] + vpmaxuq %ymm20, %ymm17, %ymm30 {%k4} + +// CHECK: vpmaxuq %ymm20, %ymm17, %ymm30 {%k4} {z} +// CHECK: encoding: [0x62,0x22,0xf5,0xa4,0x3f,0xf4] + vpmaxuq %ymm20, %ymm17, %ymm30 {%k4} {z} + +// CHECK: vpmaxuq (%rcx), %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x20,0x3f,0x31] + vpmaxuq (%rcx), %ymm17, %ymm30 + +// CHECK: vpmaxuq 291(%rax,%r14,8), %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x22,0xf5,0x20,0x3f,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpmaxuq 291(%rax,%r14,8), %ymm17, %ymm30 + +// CHECK: vpmaxuq (%rcx){1to4}, %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x30,0x3f,0x31] + vpmaxuq (%rcx){1to4}, %ymm17, %ymm30 + +// CHECK: vpmaxuq 4064(%rdx), %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x20,0x3f,0x72,0x7f] + vpmaxuq 4064(%rdx), %ymm17, %ymm30 + +// CHECK: vpmaxuq 4096(%rdx), %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x20,0x3f,0xb2,0x00,0x10,0x00,0x00] + vpmaxuq 4096(%rdx), %ymm17, %ymm30 + +// CHECK: vpmaxuq -4096(%rdx), %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x20,0x3f,0x72,0x80] + vpmaxuq -4096(%rdx), %ymm17, %ymm30 + +// CHECK: vpmaxuq -4128(%rdx), %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x20,0x3f,0xb2,0xe0,0xef,0xff,0xff] + vpmaxuq -4128(%rdx), %ymm17, %ymm30 + +// CHECK: vpmaxuq 1016(%rdx){1to4}, %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x30,0x3f,0x72,0x7f] + vpmaxuq 1016(%rdx){1to4}, %ymm17, %ymm30 + +// CHECK: vpmaxuq 1024(%rdx){1to4}, %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x30,0x3f,0xb2,0x00,0x04,0x00,0x00] + vpmaxuq 1024(%rdx){1to4}, %ymm17, %ymm30 + +// CHECK: vpmaxuq -1024(%rdx){1to4}, %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x30,0x3f,0x72,0x80] + vpmaxuq -1024(%rdx){1to4}, %ymm17, %ymm30 + +// CHECK: vpmaxuq -1032(%rdx){1to4}, %ymm17, %ymm30 +// CHECK: encoding: [0x62,0x62,0xf5,0x30,0x3f,0xb2,0xf8,0xfb,0xff,0xff] + vpmaxuq -1032(%rdx){1to4}, %ymm17, %ymm30 + +// CHECK: vpminsd %xmm17, %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x22,0x55,0x00,0x39,0xe9] + vpminsd %xmm17, %xmm21, %xmm29 + +// CHECK: vpminsd %xmm17, %xmm21, %xmm29 {%k4} +// CHECK: encoding: [0x62,0x22,0x55,0x04,0x39,0xe9] + vpminsd %xmm17, %xmm21, %xmm29 {%k4} + +// CHECK: vpminsd %xmm17, %xmm21, %xmm29 {%k4} {z} +// CHECK: encoding: [0x62,0x22,0x55,0x84,0x39,0xe9] + vpminsd %xmm17, %xmm21, %xmm29 {%k4} {z} + +// CHECK: vpminsd (%rcx), %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x00,0x39,0x29] + vpminsd (%rcx), %xmm21, %xmm29 + +// CHECK: vpminsd 291(%rax,%r14,8), %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x22,0x55,0x00,0x39,0xac,0xf0,0x23,0x01,0x00,0x00] + vpminsd 291(%rax,%r14,8), %xmm21, %xmm29 + +// CHECK: vpminsd (%rcx){1to4}, %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x10,0x39,0x29] + vpminsd (%rcx){1to4}, %xmm21, %xmm29 + +// CHECK: vpminsd 2032(%rdx), %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x00,0x39,0x6a,0x7f] + vpminsd 2032(%rdx), %xmm21, %xmm29 + +// CHECK: vpminsd 2048(%rdx), %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x00,0x39,0xaa,0x00,0x08,0x00,0x00] + vpminsd 2048(%rdx), %xmm21, %xmm29 + +// CHECK: vpminsd -2048(%rdx), %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x00,0x39,0x6a,0x80] + vpminsd -2048(%rdx), %xmm21, %xmm29 + +// CHECK: vpminsd -2064(%rdx), %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x00,0x39,0xaa,0xf0,0xf7,0xff,0xff] + vpminsd -2064(%rdx), %xmm21, %xmm29 + +// CHECK: vpminsd 508(%rdx){1to4}, %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x10,0x39,0x6a,0x7f] + vpminsd 508(%rdx){1to4}, %xmm21, %xmm29 + +// CHECK: vpminsd 512(%rdx){1to4}, %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x10,0x39,0xaa,0x00,0x02,0x00,0x00] + vpminsd 512(%rdx){1to4}, %xmm21, %xmm29 + +// CHECK: vpminsd -512(%rdx){1to4}, %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x10,0x39,0x6a,0x80] + vpminsd -512(%rdx){1to4}, %xmm21, %xmm29 + +// CHECK: vpminsd -516(%rdx){1to4}, %xmm21, %xmm29 +// CHECK: encoding: [0x62,0x62,0x55,0x10,0x39,0xaa,0xfc,0xfd,0xff,0xff] + vpminsd -516(%rdx){1to4}, %xmm21, %xmm29 + +// CHECK: vpminsd %ymm25, %ymm26, %ymm19 +// CHECK: encoding: [0x62,0x82,0x2d,0x20,0x39,0xd9] + vpminsd %ymm25, %ymm26, %ymm19 + +// CHECK: vpminsd %ymm25, %ymm26, %ymm19 {%k7} +// CHECK: encoding: [0x62,0x82,0x2d,0x27,0x39,0xd9] + vpminsd %ymm25, %ymm26, %ymm19 {%k7} + +// CHECK: vpminsd %ymm25, %ymm26, %ymm19 {%k7} {z} +// CHECK: encoding: [0x62,0x82,0x2d,0xa7,0x39,0xd9] + vpminsd %ymm25, %ymm26, %ymm19 {%k7} {z} + +// CHECK: vpminsd (%rcx), %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x39,0x19] + vpminsd (%rcx), %ymm26, %ymm19 + +// CHECK: vpminsd 291(%rax,%r14,8), %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xa2,0x2d,0x20,0x39,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminsd 291(%rax,%r14,8), %ymm26, %ymm19 + +// CHECK: vpminsd (%rcx){1to8}, %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x39,0x19] + vpminsd (%rcx){1to8}, %ymm26, %ymm19 + +// CHECK: vpminsd 4064(%rdx), %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x39,0x5a,0x7f] + vpminsd 4064(%rdx), %ymm26, %ymm19 + +// CHECK: vpminsd 4096(%rdx), %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x39,0x9a,0x00,0x10,0x00,0x00] + vpminsd 4096(%rdx), %ymm26, %ymm19 + +// CHECK: vpminsd -4096(%rdx), %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x39,0x5a,0x80] + vpminsd -4096(%rdx), %ymm26, %ymm19 + +// CHECK: vpminsd -4128(%rdx), %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x39,0x9a,0xe0,0xef,0xff,0xff] + vpminsd -4128(%rdx), %ymm26, %ymm19 + +// CHECK: vpminsd 508(%rdx){1to8}, %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x39,0x5a,0x7f] + vpminsd 508(%rdx){1to8}, %ymm26, %ymm19 + +// CHECK: vpminsd 512(%rdx){1to8}, %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x39,0x9a,0x00,0x02,0x00,0x00] + vpminsd 512(%rdx){1to8}, %ymm26, %ymm19 + +// CHECK: vpminsd -512(%rdx){1to8}, %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x39,0x5a,0x80] + vpminsd -512(%rdx){1to8}, %ymm26, %ymm19 + +// CHECK: vpminsd -516(%rdx){1to8}, %ymm26, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x39,0x9a,0xfc,0xfd,0xff,0xff] + vpminsd -516(%rdx){1to8}, %ymm26, %ymm19 + +// CHECK: vpminsq %xmm18, %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xa2,0xbd,0x00,0x39,0xda] + vpminsq %xmm18, %xmm24, %xmm19 + +// CHECK: vpminsq %xmm18, %xmm24, %xmm19 {%k6} +// CHECK: encoding: [0x62,0xa2,0xbd,0x06,0x39,0xda] + vpminsq %xmm18, %xmm24, %xmm19 {%k6} + +// CHECK: vpminsq %xmm18, %xmm24, %xmm19 {%k6} {z} +// CHECK: encoding: [0x62,0xa2,0xbd,0x86,0x39,0xda] + vpminsq %xmm18, %xmm24, %xmm19 {%k6} {z} + +// CHECK: vpminsq (%rcx), %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x00,0x39,0x19] + vpminsq (%rcx), %xmm24, %xmm19 + +// CHECK: vpminsq 291(%rax,%r14,8), %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xa2,0xbd,0x00,0x39,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminsq 291(%rax,%r14,8), %xmm24, %xmm19 + +// CHECK: vpminsq (%rcx){1to2}, %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x10,0x39,0x19] + vpminsq (%rcx){1to2}, %xmm24, %xmm19 + +// CHECK: vpminsq 2032(%rdx), %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x00,0x39,0x5a,0x7f] + vpminsq 2032(%rdx), %xmm24, %xmm19 + +// CHECK: vpminsq 2048(%rdx), %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x00,0x39,0x9a,0x00,0x08,0x00,0x00] + vpminsq 2048(%rdx), %xmm24, %xmm19 + +// CHECK: vpminsq -2048(%rdx), %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x00,0x39,0x5a,0x80] + vpminsq -2048(%rdx), %xmm24, %xmm19 + +// CHECK: vpminsq -2064(%rdx), %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x00,0x39,0x9a,0xf0,0xf7,0xff,0xff] + vpminsq -2064(%rdx), %xmm24, %xmm19 + +// CHECK: vpminsq 1016(%rdx){1to2}, %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x10,0x39,0x5a,0x7f] + vpminsq 1016(%rdx){1to2}, %xmm24, %xmm19 + +// CHECK: vpminsq 1024(%rdx){1to2}, %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x10,0x39,0x9a,0x00,0x04,0x00,0x00] + vpminsq 1024(%rdx){1to2}, %xmm24, %xmm19 + +// CHECK: vpminsq -1024(%rdx){1to2}, %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x10,0x39,0x5a,0x80] + vpminsq -1024(%rdx){1to2}, %xmm24, %xmm19 + +// CHECK: vpminsq -1032(%rdx){1to2}, %xmm24, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xbd,0x10,0x39,0x9a,0xf8,0xfb,0xff,0xff] + vpminsq -1032(%rdx){1to2}, %xmm24, %xmm19 + +// CHECK: vpminsq %ymm28, %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x02,0x95,0x20,0x39,0xcc] + vpminsq %ymm28, %ymm29, %ymm25 + +// CHECK: vpminsq %ymm28, %ymm29, %ymm25 {%k6} +// CHECK: encoding: [0x62,0x02,0x95,0x26,0x39,0xcc] + vpminsq %ymm28, %ymm29, %ymm25 {%k6} + +// CHECK: vpminsq %ymm28, %ymm29, %ymm25 {%k6} {z} +// CHECK: encoding: [0x62,0x02,0x95,0xa6,0x39,0xcc] + vpminsq %ymm28, %ymm29, %ymm25 {%k6} {z} + +// CHECK: vpminsq (%rcx), %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x20,0x39,0x09] + vpminsq (%rcx), %ymm29, %ymm25 + +// CHECK: vpminsq 291(%rax,%r14,8), %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x22,0x95,0x20,0x39,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpminsq 291(%rax,%r14,8), %ymm29, %ymm25 + +// CHECK: vpminsq (%rcx){1to4}, %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x30,0x39,0x09] + vpminsq (%rcx){1to4}, %ymm29, %ymm25 + +// CHECK: vpminsq 4064(%rdx), %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x20,0x39,0x4a,0x7f] + vpminsq 4064(%rdx), %ymm29, %ymm25 + +// CHECK: vpminsq 4096(%rdx), %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x20,0x39,0x8a,0x00,0x10,0x00,0x00] + vpminsq 4096(%rdx), %ymm29, %ymm25 + +// CHECK: vpminsq -4096(%rdx), %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x20,0x39,0x4a,0x80] + vpminsq -4096(%rdx), %ymm29, %ymm25 + +// CHECK: vpminsq -4128(%rdx), %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x20,0x39,0x8a,0xe0,0xef,0xff,0xff] + vpminsq -4128(%rdx), %ymm29, %ymm25 + +// CHECK: vpminsq 1016(%rdx){1to4}, %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x30,0x39,0x4a,0x7f] + vpminsq 1016(%rdx){1to4}, %ymm29, %ymm25 + +// CHECK: vpminsq 1024(%rdx){1to4}, %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x30,0x39,0x8a,0x00,0x04,0x00,0x00] + vpminsq 1024(%rdx){1to4}, %ymm29, %ymm25 + +// CHECK: vpminsq -1024(%rdx){1to4}, %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x30,0x39,0x4a,0x80] + vpminsq -1024(%rdx){1to4}, %ymm29, %ymm25 + +// CHECK: vpminsq -1032(%rdx){1to4}, %ymm29, %ymm25 +// CHECK: encoding: [0x62,0x62,0x95,0x30,0x39,0x8a,0xf8,0xfb,0xff,0xff] + vpminsq -1032(%rdx){1to4}, %ymm29, %ymm25 + +// CHECK: vpminud %xmm17, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x3b,0xd1] + vpminud %xmm17, %xmm23, %xmm18 + +// CHECK: vpminud %xmm17, %xmm23, %xmm18 {%k3} +// CHECK: encoding: [0x62,0xa2,0x45,0x03,0x3b,0xd1] + vpminud %xmm17, %xmm23, %xmm18 {%k3} + +// CHECK: vpminud %xmm17, %xmm23, %xmm18 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0x45,0x83,0x3b,0xd1] + vpminud %xmm17, %xmm23, %xmm18 {%k3} {z} + +// CHECK: vpminud (%rcx), %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x3b,0x11] + vpminud (%rcx), %xmm23, %xmm18 + +// CHECK: vpminud 291(%rax,%r14,8), %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x3b,0x94,0xf0,0x23,0x01,0x00,0x00] + vpminud 291(%rax,%r14,8), %xmm23, %xmm18 + +// CHECK: vpminud (%rcx){1to4}, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x3b,0x11] + vpminud (%rcx){1to4}, %xmm23, %xmm18 + +// CHECK: vpminud 2032(%rdx), %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x3b,0x52,0x7f] + vpminud 2032(%rdx), %xmm23, %xmm18 + +// CHECK: vpminud 2048(%rdx), %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x3b,0x92,0x00,0x08,0x00,0x00] + vpminud 2048(%rdx), %xmm23, %xmm18 + +// CHECK: vpminud -2048(%rdx), %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x3b,0x52,0x80] + vpminud -2048(%rdx), %xmm23, %xmm18 + +// CHECK: vpminud -2064(%rdx), %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x3b,0x92,0xf0,0xf7,0xff,0xff] + vpminud -2064(%rdx), %xmm23, %xmm18 + +// CHECK: vpminud 508(%rdx){1to4}, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x3b,0x52,0x7f] + vpminud 508(%rdx){1to4}, %xmm23, %xmm18 + +// CHECK: vpminud 512(%rdx){1to4}, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x3b,0x92,0x00,0x02,0x00,0x00] + vpminud 512(%rdx){1to4}, %xmm23, %xmm18 + +// CHECK: vpminud -512(%rdx){1to4}, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x3b,0x52,0x80] + vpminud -512(%rdx){1to4}, %xmm23, %xmm18 + +// CHECK: vpminud -516(%rdx){1to4}, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x3b,0x92,0xfc,0xfd,0xff,0xff] + vpminud -516(%rdx){1to4}, %xmm23, %xmm18 + +// CHECK: vpminud %ymm19, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xa2,0x4d,0x20,0x3b,0xdb] + vpminud %ymm19, %ymm22, %ymm19 + +// CHECK: vpminud %ymm19, %ymm22, %ymm19 {%k3} +// CHECK: encoding: [0x62,0xa2,0x4d,0x23,0x3b,0xdb] + vpminud %ymm19, %ymm22, %ymm19 {%k3} + +// CHECK: vpminud %ymm19, %ymm22, %ymm19 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0x4d,0xa3,0x3b,0xdb] + vpminud %ymm19, %ymm22, %ymm19 {%k3} {z} + +// CHECK: vpminud (%rcx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3b,0x19] + vpminud (%rcx), %ymm22, %ymm19 + +// CHECK: vpminud 291(%rax,%r14,8), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xa2,0x4d,0x20,0x3b,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpminud 291(%rax,%r14,8), %ymm22, %ymm19 + +// CHECK: vpminud (%rcx){1to8}, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x3b,0x19] + vpminud (%rcx){1to8}, %ymm22, %ymm19 + +// CHECK: vpminud 4064(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3b,0x5a,0x7f] + vpminud 4064(%rdx), %ymm22, %ymm19 + +// CHECK: vpminud 4096(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3b,0x9a,0x00,0x10,0x00,0x00] + vpminud 4096(%rdx), %ymm22, %ymm19 + +// CHECK: vpminud -4096(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3b,0x5a,0x80] + vpminud -4096(%rdx), %ymm22, %ymm19 + +// CHECK: vpminud -4128(%rdx), %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x3b,0x9a,0xe0,0xef,0xff,0xff] + vpminud -4128(%rdx), %ymm22, %ymm19 + +// CHECK: vpminud 508(%rdx){1to8}, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x3b,0x5a,0x7f] + vpminud 508(%rdx){1to8}, %ymm22, %ymm19 + +// CHECK: vpminud 512(%rdx){1to8}, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x3b,0x9a,0x00,0x02,0x00,0x00] + vpminud 512(%rdx){1to8}, %ymm22, %ymm19 + +// CHECK: vpminud -512(%rdx){1to8}, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x3b,0x5a,0x80] + vpminud -512(%rdx){1to8}, %ymm22, %ymm19 + +// CHECK: vpminud -516(%rdx){1to8}, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x3b,0x9a,0xfc,0xfd,0xff,0xff] + vpminud -516(%rdx){1to8}, %ymm22, %ymm19 + +// CHECK: vpminuq %xmm23, %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x22,0xcd,0x00,0x3b,0xe7] + vpminuq %xmm23, %xmm22, %xmm28 + +// CHECK: vpminuq %xmm23, %xmm22, %xmm28 {%k4} +// CHECK: encoding: [0x62,0x22,0xcd,0x04,0x3b,0xe7] + vpminuq %xmm23, %xmm22, %xmm28 {%k4} + +// CHECK: vpminuq %xmm23, %xmm22, %xmm28 {%k4} {z} +// CHECK: encoding: [0x62,0x22,0xcd,0x84,0x3b,0xe7] + vpminuq %xmm23, %xmm22, %xmm28 {%k4} {z} + +// CHECK: vpminuq (%rcx), %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x3b,0x21] + vpminuq (%rcx), %xmm22, %xmm28 + +// CHECK: vpminuq 291(%rax,%r14,8), %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x22,0xcd,0x00,0x3b,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpminuq 291(%rax,%r14,8), %xmm22, %xmm28 + +// CHECK: vpminuq (%rcx){1to2}, %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x3b,0x21] + vpminuq (%rcx){1to2}, %xmm22, %xmm28 + +// CHECK: vpminuq 2032(%rdx), %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x3b,0x62,0x7f] + vpminuq 2032(%rdx), %xmm22, %xmm28 + +// CHECK: vpminuq 2048(%rdx), %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x3b,0xa2,0x00,0x08,0x00,0x00] + vpminuq 2048(%rdx), %xmm22, %xmm28 + +// CHECK: vpminuq -2048(%rdx), %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x3b,0x62,0x80] + vpminuq -2048(%rdx), %xmm22, %xmm28 + +// CHECK: vpminuq -2064(%rdx), %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x3b,0xa2,0xf0,0xf7,0xff,0xff] + vpminuq -2064(%rdx), %xmm22, %xmm28 + +// CHECK: vpminuq 1016(%rdx){1to2}, %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x3b,0x62,0x7f] + vpminuq 1016(%rdx){1to2}, %xmm22, %xmm28 + +// CHECK: vpminuq 1024(%rdx){1to2}, %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x3b,0xa2,0x00,0x04,0x00,0x00] + vpminuq 1024(%rdx){1to2}, %xmm22, %xmm28 + +// CHECK: vpminuq -1024(%rdx){1to2}, %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x3b,0x62,0x80] + vpminuq -1024(%rdx){1to2}, %xmm22, %xmm28 + +// CHECK: vpminuq -1032(%rdx){1to2}, %xmm22, %xmm28 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x3b,0xa2,0xf8,0xfb,0xff,0xff] + vpminuq -1032(%rdx){1to2}, %xmm22, %xmm28 + +// CHECK: vpminuq %ymm23, %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x22,0xd5,0x20,0x3b,0xef] + vpminuq %ymm23, %ymm21, %ymm29 + +// CHECK: vpminuq %ymm23, %ymm21, %ymm29 {%k5} +// CHECK: encoding: [0x62,0x22,0xd5,0x25,0x3b,0xef] + vpminuq %ymm23, %ymm21, %ymm29 {%k5} + +// CHECK: vpminuq %ymm23, %ymm21, %ymm29 {%k5} {z} +// CHECK: encoding: [0x62,0x22,0xd5,0xa5,0x3b,0xef] + vpminuq %ymm23, %ymm21, %ymm29 {%k5} {z} + +// CHECK: vpminuq (%rcx), %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x20,0x3b,0x29] + vpminuq (%rcx), %ymm21, %ymm29 + +// CHECK: vpminuq 291(%rax,%r14,8), %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x22,0xd5,0x20,0x3b,0xac,0xf0,0x23,0x01,0x00,0x00] + vpminuq 291(%rax,%r14,8), %ymm21, %ymm29 + +// CHECK: vpminuq (%rcx){1to4}, %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x30,0x3b,0x29] + vpminuq (%rcx){1to4}, %ymm21, %ymm29 + +// CHECK: vpminuq 4064(%rdx), %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x20,0x3b,0x6a,0x7f] + vpminuq 4064(%rdx), %ymm21, %ymm29 + +// CHECK: vpminuq 4096(%rdx), %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x20,0x3b,0xaa,0x00,0x10,0x00,0x00] + vpminuq 4096(%rdx), %ymm21, %ymm29 + +// CHECK: vpminuq -4096(%rdx), %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x20,0x3b,0x6a,0x80] + vpminuq -4096(%rdx), %ymm21, %ymm29 + +// CHECK: vpminuq -4128(%rdx), %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x20,0x3b,0xaa,0xe0,0xef,0xff,0xff] + vpminuq -4128(%rdx), %ymm21, %ymm29 + +// CHECK: vpminuq 1016(%rdx){1to4}, %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x30,0x3b,0x6a,0x7f] + vpminuq 1016(%rdx){1to4}, %ymm21, %ymm29 + +// CHECK: vpminuq 1024(%rdx){1to4}, %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x30,0x3b,0xaa,0x00,0x04,0x00,0x00] + vpminuq 1024(%rdx){1to4}, %ymm21, %ymm29 + +// CHECK: vpminuq -1024(%rdx){1to4}, %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x30,0x3b,0x6a,0x80] + vpminuq -1024(%rdx){1to4}, %ymm21, %ymm29 + +// CHECK: vpminuq -1032(%rdx){1to4}, %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x62,0xd5,0x30,0x3b,0xaa,0xf8,0xfb,0xff,0xff] + vpminuq -1032(%rdx){1to4}, %ymm21, %ymm29 + +// CHECK: vpmulld %xmm24, %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x02,0x65,0x00,0x40,0xc8] + vpmulld %xmm24, %xmm19, %xmm25 + +// CHECK: vpmulld %xmm24, %xmm19, %xmm25 {%k6} +// CHECK: encoding: [0x62,0x02,0x65,0x06,0x40,0xc8] + vpmulld %xmm24, %xmm19, %xmm25 {%k6} + +// CHECK: vpmulld %xmm24, %xmm19, %xmm25 {%k6} {z} +// CHECK: encoding: [0x62,0x02,0x65,0x86,0x40,0xc8] + vpmulld %xmm24, %xmm19, %xmm25 {%k6} {z} + +// CHECK: vpmulld (%rcx), %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x00,0x40,0x09] + vpmulld (%rcx), %xmm19, %xmm25 + +// CHECK: vpmulld 291(%rax,%r14,8), %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x22,0x65,0x00,0x40,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpmulld 291(%rax,%r14,8), %xmm19, %xmm25 + +// CHECK: vpmulld (%rcx){1to4}, %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x10,0x40,0x09] + vpmulld (%rcx){1to4}, %xmm19, %xmm25 + +// CHECK: vpmulld 2032(%rdx), %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x00,0x40,0x4a,0x7f] + vpmulld 2032(%rdx), %xmm19, %xmm25 + +// CHECK: vpmulld 2048(%rdx), %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x00,0x40,0x8a,0x00,0x08,0x00,0x00] + vpmulld 2048(%rdx), %xmm19, %xmm25 + +// CHECK: vpmulld -2048(%rdx), %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x00,0x40,0x4a,0x80] + vpmulld -2048(%rdx), %xmm19, %xmm25 + +// CHECK: vpmulld -2064(%rdx), %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x00,0x40,0x8a,0xf0,0xf7,0xff,0xff] + vpmulld -2064(%rdx), %xmm19, %xmm25 + +// CHECK: vpmulld 508(%rdx){1to4}, %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x10,0x40,0x4a,0x7f] + vpmulld 508(%rdx){1to4}, %xmm19, %xmm25 + +// CHECK: vpmulld 512(%rdx){1to4}, %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x10,0x40,0x8a,0x00,0x02,0x00,0x00] + vpmulld 512(%rdx){1to4}, %xmm19, %xmm25 + +// CHECK: vpmulld -512(%rdx){1to4}, %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x10,0x40,0x4a,0x80] + vpmulld -512(%rdx){1to4}, %xmm19, %xmm25 + +// CHECK: vpmulld -516(%rdx){1to4}, %xmm19, %xmm25 +// CHECK: encoding: [0x62,0x62,0x65,0x10,0x40,0x8a,0xfc,0xfd,0xff,0xff] + vpmulld -516(%rdx){1to4}, %xmm19, %xmm25 + +// CHECK: vpmulld %ymm26, %ymm26, %ymm23 +// CHECK: encoding: [0x62,0x82,0x2d,0x20,0x40,0xfa] + vpmulld %ymm26, %ymm26, %ymm23 + +// CHECK: vpmulld %ymm26, %ymm26, %ymm23 {%k2} +// CHECK: encoding: [0x62,0x82,0x2d,0x22,0x40,0xfa] + vpmulld %ymm26, %ymm26, %ymm23 {%k2} + +// CHECK: vpmulld %ymm26, %ymm26, %ymm23 {%k2} {z} +// CHECK: encoding: [0x62,0x82,0x2d,0xa2,0x40,0xfa] + vpmulld %ymm26, %ymm26, %ymm23 {%k2} {z} + +// CHECK: vpmulld (%rcx), %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x40,0x39] + vpmulld (%rcx), %ymm26, %ymm23 + +// CHECK: vpmulld 291(%rax,%r14,8), %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xa2,0x2d,0x20,0x40,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpmulld 291(%rax,%r14,8), %ymm26, %ymm23 + +// CHECK: vpmulld (%rcx){1to8}, %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x40,0x39] + vpmulld (%rcx){1to8}, %ymm26, %ymm23 + +// CHECK: vpmulld 4064(%rdx), %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x40,0x7a,0x7f] + vpmulld 4064(%rdx), %ymm26, %ymm23 + +// CHECK: vpmulld 4096(%rdx), %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x40,0xba,0x00,0x10,0x00,0x00] + vpmulld 4096(%rdx), %ymm26, %ymm23 + +// CHECK: vpmulld -4096(%rdx), %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x40,0x7a,0x80] + vpmulld -4096(%rdx), %ymm26, %ymm23 + +// CHECK: vpmulld -4128(%rdx), %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x40,0xba,0xe0,0xef,0xff,0xff] + vpmulld -4128(%rdx), %ymm26, %ymm23 + +// CHECK: vpmulld 508(%rdx){1to8}, %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x40,0x7a,0x7f] + vpmulld 508(%rdx){1to8}, %ymm26, %ymm23 + +// CHECK: vpmulld 512(%rdx){1to8}, %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x40,0xba,0x00,0x02,0x00,0x00] + vpmulld 512(%rdx){1to8}, %ymm26, %ymm23 + +// CHECK: vpmulld -512(%rdx){1to8}, %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x40,0x7a,0x80] + vpmulld -512(%rdx){1to8}, %ymm26, %ymm23 + +// CHECK: vpmulld -516(%rdx){1to8}, %ymm26, %ymm23 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x40,0xba,0xfc,0xfd,0xff,0xff] + vpmulld -516(%rdx){1to8}, %ymm26, %ymm23 + +// CHECK: vpord %xmm28, %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x01,0x15,0x00,0xeb,0xe4] + vpord %xmm28, %xmm29, %xmm28 + +// CHECK: vpord %xmm28, %xmm29, %xmm28 {%k2} +// CHECK: encoding: [0x62,0x01,0x15,0x02,0xeb,0xe4] + vpord %xmm28, %xmm29, %xmm28 {%k2} + +// CHECK: vpord %xmm28, %xmm29, %xmm28 {%k2} {z} +// CHECK: encoding: [0x62,0x01,0x15,0x82,0xeb,0xe4] + vpord %xmm28, %xmm29, %xmm28 {%k2} {z} + +// CHECK: vpord (%rcx), %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xeb,0x21] + vpord (%rcx), %xmm29, %xmm28 + +// CHECK: vpord 291(%rax,%r14,8), %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x21,0x15,0x00,0xeb,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpord 291(%rax,%r14,8), %xmm29, %xmm28 + +// CHECK: vpord (%rcx){1to4}, %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x10,0xeb,0x21] + vpord (%rcx){1to4}, %xmm29, %xmm28 + +// CHECK: vpord 2032(%rdx), %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xeb,0x62,0x7f] + vpord 2032(%rdx), %xmm29, %xmm28 + +// CHECK: vpord 2048(%rdx), %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xeb,0xa2,0x00,0x08,0x00,0x00] + vpord 2048(%rdx), %xmm29, %xmm28 + +// CHECK: vpord -2048(%rdx), %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xeb,0x62,0x80] + vpord -2048(%rdx), %xmm29, %xmm28 + +// CHECK: vpord -2064(%rdx), %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xeb,0xa2,0xf0,0xf7,0xff,0xff] + vpord -2064(%rdx), %xmm29, %xmm28 + +// CHECK: vpord 508(%rdx){1to4}, %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x10,0xeb,0x62,0x7f] + vpord 508(%rdx){1to4}, %xmm29, %xmm28 + +// CHECK: vpord 512(%rdx){1to4}, %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x10,0xeb,0xa2,0x00,0x02,0x00,0x00] + vpord 512(%rdx){1to4}, %xmm29, %xmm28 + +// CHECK: vpord -512(%rdx){1to4}, %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x10,0xeb,0x62,0x80] + vpord -512(%rdx){1to4}, %xmm29, %xmm28 + +// CHECK: vpord -516(%rdx){1to4}, %xmm29, %xmm28 +// CHECK: encoding: [0x62,0x61,0x15,0x10,0xeb,0xa2,0xfc,0xfd,0xff,0xff] + vpord -516(%rdx){1to4}, %xmm29, %xmm28 + +// CHECK: vpord %ymm22, %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x35,0x20,0xeb,0xee] + vpord %ymm22, %ymm25, %ymm21 + +// CHECK: vpord %ymm22, %ymm25, %ymm21 {%k6} +// CHECK: encoding: [0x62,0xa1,0x35,0x26,0xeb,0xee] + vpord %ymm22, %ymm25, %ymm21 {%k6} + +// CHECK: vpord %ymm22, %ymm25, %ymm21 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0x35,0xa6,0xeb,0xee] + vpord %ymm22, %ymm25, %ymm21 {%k6} {z} + +// CHECK: vpord (%rcx), %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x20,0xeb,0x29] + vpord (%rcx), %ymm25, %ymm21 + +// CHECK: vpord 291(%rax,%r14,8), %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x35,0x20,0xeb,0xac,0xf0,0x23,0x01,0x00,0x00] + vpord 291(%rax,%r14,8), %ymm25, %ymm21 + +// CHECK: vpord (%rcx){1to8}, %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x30,0xeb,0x29] + vpord (%rcx){1to8}, %ymm25, %ymm21 + +// CHECK: vpord 4064(%rdx), %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x20,0xeb,0x6a,0x7f] + vpord 4064(%rdx), %ymm25, %ymm21 + +// CHECK: vpord 4096(%rdx), %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x20,0xeb,0xaa,0x00,0x10,0x00,0x00] + vpord 4096(%rdx), %ymm25, %ymm21 + +// CHECK: vpord -4096(%rdx), %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x20,0xeb,0x6a,0x80] + vpord -4096(%rdx), %ymm25, %ymm21 + +// CHECK: vpord -4128(%rdx), %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x20,0xeb,0xaa,0xe0,0xef,0xff,0xff] + vpord -4128(%rdx), %ymm25, %ymm21 + +// CHECK: vpord 508(%rdx){1to8}, %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x30,0xeb,0x6a,0x7f] + vpord 508(%rdx){1to8}, %ymm25, %ymm21 + +// CHECK: vpord 512(%rdx){1to8}, %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x30,0xeb,0xaa,0x00,0x02,0x00,0x00] + vpord 512(%rdx){1to8}, %ymm25, %ymm21 + +// CHECK: vpord -512(%rdx){1to8}, %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x30,0xeb,0x6a,0x80] + vpord -512(%rdx){1to8}, %ymm25, %ymm21 + +// CHECK: vpord -516(%rdx){1to8}, %ymm25, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x35,0x30,0xeb,0xaa,0xfc,0xfd,0xff,0xff] + vpord -516(%rdx){1to8}, %ymm25, %ymm21 + +// CHECK: vporq %xmm20, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xa1,0x9d,0x00,0xeb,0xec] + vporq %xmm20, %xmm28, %xmm21 + +// CHECK: vporq %xmm20, %xmm28, %xmm21 {%k7} +// CHECK: encoding: [0x62,0xa1,0x9d,0x07,0xeb,0xec] + vporq %xmm20, %xmm28, %xmm21 {%k7} + +// CHECK: vporq %xmm20, %xmm28, %xmm21 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x9d,0x87,0xeb,0xec] + vporq %xmm20, %xmm28, %xmm21 {%k7} {z} + +// CHECK: vporq (%rcx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xeb,0x29] + vporq (%rcx), %xmm28, %xmm21 + +// CHECK: vporq 291(%rax,%r14,8), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xa1,0x9d,0x00,0xeb,0xac,0xf0,0x23,0x01,0x00,0x00] + vporq 291(%rax,%r14,8), %xmm28, %xmm21 + +// CHECK: vporq (%rcx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xeb,0x29] + vporq (%rcx){1to2}, %xmm28, %xmm21 + +// CHECK: vporq 2032(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xeb,0x6a,0x7f] + vporq 2032(%rdx), %xmm28, %xmm21 + +// CHECK: vporq 2048(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xeb,0xaa,0x00,0x08,0x00,0x00] + vporq 2048(%rdx), %xmm28, %xmm21 + +// CHECK: vporq -2048(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xeb,0x6a,0x80] + vporq -2048(%rdx), %xmm28, %xmm21 + +// CHECK: vporq -2064(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xeb,0xaa,0xf0,0xf7,0xff,0xff] + vporq -2064(%rdx), %xmm28, %xmm21 + +// CHECK: vporq 1016(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xeb,0x6a,0x7f] + vporq 1016(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vporq 1024(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xeb,0xaa,0x00,0x04,0x00,0x00] + vporq 1024(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vporq -1024(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xeb,0x6a,0x80] + vporq -1024(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vporq -1032(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x9d,0x10,0xeb,0xaa,0xf8,0xfb,0xff,0xff] + vporq -1032(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vporq %ymm24, %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x01,0xe5,0x20,0xeb,0xe0] + vporq %ymm24, %ymm19, %ymm28 + +// CHECK: vporq %ymm24, %ymm19, %ymm28 {%k4} +// CHECK: encoding: [0x62,0x01,0xe5,0x24,0xeb,0xe0] + vporq %ymm24, %ymm19, %ymm28 {%k4} + +// CHECK: vporq %ymm24, %ymm19, %ymm28 {%k4} {z} +// CHECK: encoding: [0x62,0x01,0xe5,0xa4,0xeb,0xe0] + vporq %ymm24, %ymm19, %ymm28 {%k4} {z} + +// CHECK: vporq (%rcx), %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x20,0xeb,0x21] + vporq (%rcx), %ymm19, %ymm28 + +// CHECK: vporq 291(%rax,%r14,8), %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x21,0xe5,0x20,0xeb,0xa4,0xf0,0x23,0x01,0x00,0x00] + vporq 291(%rax,%r14,8), %ymm19, %ymm28 + +// CHECK: vporq (%rcx){1to4}, %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x30,0xeb,0x21] + vporq (%rcx){1to4}, %ymm19, %ymm28 + +// CHECK: vporq 4064(%rdx), %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x20,0xeb,0x62,0x7f] + vporq 4064(%rdx), %ymm19, %ymm28 + +// CHECK: vporq 4096(%rdx), %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x20,0xeb,0xa2,0x00,0x10,0x00,0x00] + vporq 4096(%rdx), %ymm19, %ymm28 + +// CHECK: vporq -4096(%rdx), %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x20,0xeb,0x62,0x80] + vporq -4096(%rdx), %ymm19, %ymm28 + +// CHECK: vporq -4128(%rdx), %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x20,0xeb,0xa2,0xe0,0xef,0xff,0xff] + vporq -4128(%rdx), %ymm19, %ymm28 + +// CHECK: vporq 1016(%rdx){1to4}, %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x30,0xeb,0x62,0x7f] + vporq 1016(%rdx){1to4}, %ymm19, %ymm28 + +// CHECK: vporq 1024(%rdx){1to4}, %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x30,0xeb,0xa2,0x00,0x04,0x00,0x00] + vporq 1024(%rdx){1to4}, %ymm19, %ymm28 + +// CHECK: vporq -1024(%rdx){1to4}, %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x30,0xeb,0x62,0x80] + vporq -1024(%rdx){1to4}, %ymm19, %ymm28 + +// CHECK: vporq -1032(%rdx){1to4}, %ymm19, %ymm28 +// CHECK: encoding: [0x62,0x61,0xe5,0x30,0xeb,0xa2,0xf8,0xfb,0xff,0xff] + vporq -1032(%rdx){1to4}, %ymm19, %ymm28 + +// CHECK: vpsubd %xmm26, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0x81,0x6d,0x00,0xfa,0xda] + vpsubd %xmm26, %xmm18, %xmm19 + +// CHECK: vpsubd %xmm26, %xmm18, %xmm19 {%k2} +// CHECK: encoding: [0x62,0x81,0x6d,0x02,0xfa,0xda] + vpsubd %xmm26, %xmm18, %xmm19 {%k2} + +// CHECK: vpsubd %xmm26, %xmm18, %xmm19 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0x6d,0x82,0xfa,0xda] + vpsubd %xmm26, %xmm18, %xmm19 {%k2} {z} + +// CHECK: vpsubd (%rcx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xfa,0x19] + vpsubd (%rcx), %xmm18, %xmm19 + +// CHECK: vpsubd 291(%rax,%r14,8), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xa1,0x6d,0x00,0xfa,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpsubd 291(%rax,%r14,8), %xmm18, %xmm19 + +// CHECK: vpsubd (%rcx){1to4}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x10,0xfa,0x19] + vpsubd (%rcx){1to4}, %xmm18, %xmm19 + +// CHECK: vpsubd 2032(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xfa,0x5a,0x7f] + vpsubd 2032(%rdx), %xmm18, %xmm19 + +// CHECK: vpsubd 2048(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xfa,0x9a,0x00,0x08,0x00,0x00] + vpsubd 2048(%rdx), %xmm18, %xmm19 + +// CHECK: vpsubd -2048(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xfa,0x5a,0x80] + vpsubd -2048(%rdx), %xmm18, %xmm19 + +// CHECK: vpsubd -2064(%rdx), %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xfa,0x9a,0xf0,0xf7,0xff,0xff] + vpsubd -2064(%rdx), %xmm18, %xmm19 + +// CHECK: vpsubd 508(%rdx){1to4}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x10,0xfa,0x5a,0x7f] + vpsubd 508(%rdx){1to4}, %xmm18, %xmm19 + +// CHECK: vpsubd 512(%rdx){1to4}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x10,0xfa,0x9a,0x00,0x02,0x00,0x00] + vpsubd 512(%rdx){1to4}, %xmm18, %xmm19 + +// CHECK: vpsubd -512(%rdx){1to4}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x10,0xfa,0x5a,0x80] + vpsubd -512(%rdx){1to4}, %xmm18, %xmm19 + +// CHECK: vpsubd -516(%rdx){1to4}, %xmm18, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x6d,0x10,0xfa,0x9a,0xfc,0xfd,0xff,0xff] + vpsubd -516(%rdx){1to4}, %xmm18, %xmm19 + +// CHECK: vpsubd %ymm21, %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x21,0x2d,0x20,0xfa,0xc5] + vpsubd %ymm21, %ymm26, %ymm24 + +// CHECK: vpsubd %ymm21, %ymm26, %ymm24 {%k1} +// CHECK: encoding: [0x62,0x21,0x2d,0x21,0xfa,0xc5] + vpsubd %ymm21, %ymm26, %ymm24 {%k1} + +// CHECK: vpsubd %ymm21, %ymm26, %ymm24 {%k1} {z} +// CHECK: encoding: [0x62,0x21,0x2d,0xa1,0xfa,0xc5] + vpsubd %ymm21, %ymm26, %ymm24 {%k1} {z} + +// CHECK: vpsubd (%rcx), %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xfa,0x01] + vpsubd (%rcx), %ymm26, %ymm24 + +// CHECK: vpsubd 291(%rax,%r14,8), %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x21,0x2d,0x20,0xfa,0x84,0xf0,0x23,0x01,0x00,0x00] + vpsubd 291(%rax,%r14,8), %ymm26, %ymm24 + +// CHECK: vpsubd (%rcx){1to8}, %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x30,0xfa,0x01] + vpsubd (%rcx){1to8}, %ymm26, %ymm24 + +// CHECK: vpsubd 4064(%rdx), %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xfa,0x42,0x7f] + vpsubd 4064(%rdx), %ymm26, %ymm24 + +// CHECK: vpsubd 4096(%rdx), %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xfa,0x82,0x00,0x10,0x00,0x00] + vpsubd 4096(%rdx), %ymm26, %ymm24 + +// CHECK: vpsubd -4096(%rdx), %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xfa,0x42,0x80] + vpsubd -4096(%rdx), %ymm26, %ymm24 + +// CHECK: vpsubd -4128(%rdx), %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xfa,0x82,0xe0,0xef,0xff,0xff] + vpsubd -4128(%rdx), %ymm26, %ymm24 + +// CHECK: vpsubd 508(%rdx){1to8}, %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x30,0xfa,0x42,0x7f] + vpsubd 508(%rdx){1to8}, %ymm26, %ymm24 + +// CHECK: vpsubd 512(%rdx){1to8}, %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x30,0xfa,0x82,0x00,0x02,0x00,0x00] + vpsubd 512(%rdx){1to8}, %ymm26, %ymm24 + +// CHECK: vpsubd -512(%rdx){1to8}, %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x30,0xfa,0x42,0x80] + vpsubd -512(%rdx){1to8}, %ymm26, %ymm24 + +// CHECK: vpsubd -516(%rdx){1to8}, %ymm26, %ymm24 +// CHECK: encoding: [0x62,0x61,0x2d,0x30,0xfa,0x82,0xfc,0xfd,0xff,0xff] + vpsubd -516(%rdx){1to8}, %ymm26, %ymm24 + +// CHECK: vpsubq %xmm27, %xmm27, %xmm20 +// CHECK: encoding: [0x62,0x81,0xa5,0x00,0xfb,0xe3] + vpsubq %xmm27, %xmm27, %xmm20 + +// CHECK: vpsubq %xmm27, %xmm27, %xmm20 {%k2} +// CHECK: encoding: [0x62,0x81,0xa5,0x02,0xfb,0xe3] + vpsubq %xmm27, %xmm27, %xmm20 {%k2} + +// CHECK: vpsubq %xmm27, %xmm27, %xmm20 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0xa5,0x82,0xfb,0xe3] + vpsubq %xmm27, %xmm27, %xmm20 {%k2} {z} + +// CHECK: vpsubq (%rcx), %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x00,0xfb,0x21] + vpsubq (%rcx), %xmm27, %xmm20 + +// CHECK: vpsubq 291(%rax,%r14,8), %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xa1,0xa5,0x00,0xfb,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsubq 291(%rax,%r14,8), %xmm27, %xmm20 + +// CHECK: vpsubq (%rcx){1to2}, %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x10,0xfb,0x21] + vpsubq (%rcx){1to2}, %xmm27, %xmm20 + +// CHECK: vpsubq 2032(%rdx), %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x00,0xfb,0x62,0x7f] + vpsubq 2032(%rdx), %xmm27, %xmm20 + +// CHECK: vpsubq 2048(%rdx), %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x00,0xfb,0xa2,0x00,0x08,0x00,0x00] + vpsubq 2048(%rdx), %xmm27, %xmm20 + +// CHECK: vpsubq -2048(%rdx), %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x00,0xfb,0x62,0x80] + vpsubq -2048(%rdx), %xmm27, %xmm20 + +// CHECK: vpsubq -2064(%rdx), %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x00,0xfb,0xa2,0xf0,0xf7,0xff,0xff] + vpsubq -2064(%rdx), %xmm27, %xmm20 + +// CHECK: vpsubq 1016(%rdx){1to2}, %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x10,0xfb,0x62,0x7f] + vpsubq 1016(%rdx){1to2}, %xmm27, %xmm20 + +// CHECK: vpsubq 1024(%rdx){1to2}, %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x10,0xfb,0xa2,0x00,0x04,0x00,0x00] + vpsubq 1024(%rdx){1to2}, %xmm27, %xmm20 + +// CHECK: vpsubq -1024(%rdx){1to2}, %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x10,0xfb,0x62,0x80] + vpsubq -1024(%rdx){1to2}, %xmm27, %xmm20 + +// CHECK: vpsubq -1032(%rdx){1to2}, %xmm27, %xmm20 +// CHECK: encoding: [0x62,0xe1,0xa5,0x10,0xfb,0xa2,0xf8,0xfb,0xff,0xff] + vpsubq -1032(%rdx){1to2}, %xmm27, %xmm20 + +// CHECK: vpsubq %ymm28, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x01,0xdd,0x20,0xfb,0xec] + vpsubq %ymm28, %ymm20, %ymm29 + +// CHECK: vpsubq %ymm28, %ymm20, %ymm29 {%k5} +// CHECK: encoding: [0x62,0x01,0xdd,0x25,0xfb,0xec] + vpsubq %ymm28, %ymm20, %ymm29 {%k5} + +// CHECK: vpsubq %ymm28, %ymm20, %ymm29 {%k5} {z} +// CHECK: encoding: [0x62,0x01,0xdd,0xa5,0xfb,0xec] + vpsubq %ymm28, %ymm20, %ymm29 {%k5} {z} + +// CHECK: vpsubq (%rcx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xfb,0x29] + vpsubq (%rcx), %ymm20, %ymm29 + +// CHECK: vpsubq 291(%rax,%r14,8), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x21,0xdd,0x20,0xfb,0xac,0xf0,0x23,0x01,0x00,0x00] + vpsubq 291(%rax,%r14,8), %ymm20, %ymm29 + +// CHECK: vpsubq (%rcx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xfb,0x29] + vpsubq (%rcx){1to4}, %ymm20, %ymm29 + +// CHECK: vpsubq 4064(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xfb,0x6a,0x7f] + vpsubq 4064(%rdx), %ymm20, %ymm29 + +// CHECK: vpsubq 4096(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xfb,0xaa,0x00,0x10,0x00,0x00] + vpsubq 4096(%rdx), %ymm20, %ymm29 + +// CHECK: vpsubq -4096(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xfb,0x6a,0x80] + vpsubq -4096(%rdx), %ymm20, %ymm29 + +// CHECK: vpsubq -4128(%rdx), %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x20,0xfb,0xaa,0xe0,0xef,0xff,0xff] + vpsubq -4128(%rdx), %ymm20, %ymm29 + +// CHECK: vpsubq 1016(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xfb,0x6a,0x7f] + vpsubq 1016(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpsubq 1024(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xfb,0xaa,0x00,0x04,0x00,0x00] + vpsubq 1024(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpsubq -1024(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xfb,0x6a,0x80] + vpsubq -1024(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpsubq -1032(%rdx){1to4}, %ymm20, %ymm29 +// CHECK: encoding: [0x62,0x61,0xdd,0x30,0xfb,0xaa,0xf8,0xfb,0xff,0xff] + vpsubq -1032(%rdx){1to4}, %ymm20, %ymm29 + +// CHECK: vpxord %xmm25, %xmm17, %xmm23 +// CHECK: encoding: [0x62,0x81,0x75,0x00,0xef,0xf9] + vpxord %xmm25, %xmm17, %xmm23 + +// CHECK: vpxord %xmm25, %xmm17, %xmm23 {%k3} +// CHECK: encoding: [0x62,0x81,0x75,0x03,0xef,0xf9] + vpxord %xmm25, %xmm17, %xmm23 {%k3} + +// CHECK: vpxord %xmm25, %xmm17, %xmm23 {%k3} {z} +// CHECK: encoding: [0x62,0x81,0x75,0x83,0xef,0xf9] + vpxord %xmm25, %xmm17, %xmm23 {%k3} {z} + +// CHECK: vpxord (%rcx), %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xef,0x39] + vpxord (%rcx), %xmm17, %xmm23 + +// CHECK: vpxord 291(%rax,%r14,8), %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xa1,0x75,0x00,0xef,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpxord 291(%rax,%r14,8), %xmm17, %xmm23 + +// CHECK: vpxord (%rcx){1to4}, %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x10,0xef,0x39] + vpxord (%rcx){1to4}, %xmm17, %xmm23 + +// CHECK: vpxord 2032(%rdx), %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xef,0x7a,0x7f] + vpxord 2032(%rdx), %xmm17, %xmm23 + +// CHECK: vpxord 2048(%rdx), %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xef,0xba,0x00,0x08,0x00,0x00] + vpxord 2048(%rdx), %xmm17, %xmm23 + +// CHECK: vpxord -2048(%rdx), %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xef,0x7a,0x80] + vpxord -2048(%rdx), %xmm17, %xmm23 + +// CHECK: vpxord -2064(%rdx), %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x00,0xef,0xba,0xf0,0xf7,0xff,0xff] + vpxord -2064(%rdx), %xmm17, %xmm23 + +// CHECK: vpxord 508(%rdx){1to4}, %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x10,0xef,0x7a,0x7f] + vpxord 508(%rdx){1to4}, %xmm17, %xmm23 + +// CHECK: vpxord 512(%rdx){1to4}, %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x10,0xef,0xba,0x00,0x02,0x00,0x00] + vpxord 512(%rdx){1to4}, %xmm17, %xmm23 + +// CHECK: vpxord -512(%rdx){1to4}, %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x10,0xef,0x7a,0x80] + vpxord -512(%rdx){1to4}, %xmm17, %xmm23 + +// CHECK: vpxord -516(%rdx){1to4}, %xmm17, %xmm23 +// CHECK: encoding: [0x62,0xe1,0x75,0x10,0xef,0xba,0xfc,0xfd,0xff,0xff] + vpxord -516(%rdx){1to4}, %xmm17, %xmm23 + +// CHECK: vpxord %ymm22, %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xa1,0x15,0x20,0xef,0xf6] + vpxord %ymm22, %ymm29, %ymm22 + +// CHECK: vpxord %ymm22, %ymm29, %ymm22 {%k4} +// CHECK: encoding: [0x62,0xa1,0x15,0x24,0xef,0xf6] + vpxord %ymm22, %ymm29, %ymm22 {%k4} + +// CHECK: vpxord %ymm22, %ymm29, %ymm22 {%k4} {z} +// CHECK: encoding: [0x62,0xa1,0x15,0xa4,0xef,0xf6] + vpxord %ymm22, %ymm29, %ymm22 {%k4} {z} + +// CHECK: vpxord (%rcx), %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xef,0x31] + vpxord (%rcx), %ymm29, %ymm22 + +// CHECK: vpxord 291(%rax,%r14,8), %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xa1,0x15,0x20,0xef,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpxord 291(%rax,%r14,8), %ymm29, %ymm22 + +// CHECK: vpxord (%rcx){1to8}, %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x30,0xef,0x31] + vpxord (%rcx){1to8}, %ymm29, %ymm22 + +// CHECK: vpxord 4064(%rdx), %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xef,0x72,0x7f] + vpxord 4064(%rdx), %ymm29, %ymm22 + +// CHECK: vpxord 4096(%rdx), %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xef,0xb2,0x00,0x10,0x00,0x00] + vpxord 4096(%rdx), %ymm29, %ymm22 + +// CHECK: vpxord -4096(%rdx), %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xef,0x72,0x80] + vpxord -4096(%rdx), %ymm29, %ymm22 + +// CHECK: vpxord -4128(%rdx), %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x20,0xef,0xb2,0xe0,0xef,0xff,0xff] + vpxord -4128(%rdx), %ymm29, %ymm22 + +// CHECK: vpxord 508(%rdx){1to8}, %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x30,0xef,0x72,0x7f] + vpxord 508(%rdx){1to8}, %ymm29, %ymm22 + +// CHECK: vpxord 512(%rdx){1to8}, %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x30,0xef,0xb2,0x00,0x02,0x00,0x00] + vpxord 512(%rdx){1to8}, %ymm29, %ymm22 + +// CHECK: vpxord -512(%rdx){1to8}, %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x30,0xef,0x72,0x80] + vpxord -512(%rdx){1to8}, %ymm29, %ymm22 + +// CHECK: vpxord -516(%rdx){1to8}, %ymm29, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x15,0x30,0xef,0xb2,0xfc,0xfd,0xff,0xff] + vpxord -516(%rdx){1to8}, %ymm29, %ymm22 + +// CHECK: vpxorq %xmm18, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x21,0xf5,0x00,0xef,0xd2] + vpxorq %xmm18, %xmm17, %xmm26 + +// CHECK: vpxorq %xmm18, %xmm17, %xmm26 {%k2} +// CHECK: encoding: [0x62,0x21,0xf5,0x02,0xef,0xd2] + vpxorq %xmm18, %xmm17, %xmm26 {%k2} + +// CHECK: vpxorq %xmm18, %xmm17, %xmm26 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0xf5,0x82,0xef,0xd2] + vpxorq %xmm18, %xmm17, %xmm26 {%k2} {z} + +// CHECK: vpxorq (%rcx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xef,0x11] + vpxorq (%rcx), %xmm17, %xmm26 + +// CHECK: vpxorq 291(%rax,%r14,8), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x21,0xf5,0x00,0xef,0x94,0xf0,0x23,0x01,0x00,0x00] + vpxorq 291(%rax,%r14,8), %xmm17, %xmm26 + +// CHECK: vpxorq (%rcx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xef,0x11] + vpxorq (%rcx){1to2}, %xmm17, %xmm26 + +// CHECK: vpxorq 2032(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xef,0x52,0x7f] + vpxorq 2032(%rdx), %xmm17, %xmm26 + +// CHECK: vpxorq 2048(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xef,0x92,0x00,0x08,0x00,0x00] + vpxorq 2048(%rdx), %xmm17, %xmm26 + +// CHECK: vpxorq -2048(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xef,0x52,0x80] + vpxorq -2048(%rdx), %xmm17, %xmm26 + +// CHECK: vpxorq -2064(%rdx), %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x00,0xef,0x92,0xf0,0xf7,0xff,0xff] + vpxorq -2064(%rdx), %xmm17, %xmm26 + +// CHECK: vpxorq 1016(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xef,0x52,0x7f] + vpxorq 1016(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpxorq 1024(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xef,0x92,0x00,0x04,0x00,0x00] + vpxorq 1024(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpxorq -1024(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xef,0x52,0x80] + vpxorq -1024(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpxorq -1032(%rdx){1to2}, %xmm17, %xmm26 +// CHECK: encoding: [0x62,0x61,0xf5,0x10,0xef,0x92,0xf8,0xfb,0xff,0xff] + vpxorq -1032(%rdx){1to2}, %xmm17, %xmm26 + +// CHECK: vpxorq %ymm19, %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xa1,0xed,0x20,0xef,0xeb] + vpxorq %ymm19, %ymm18, %ymm21 + +// CHECK: vpxorq %ymm19, %ymm18, %ymm21 {%k7} +// CHECK: encoding: [0x62,0xa1,0xed,0x27,0xef,0xeb] + vpxorq %ymm19, %ymm18, %ymm21 {%k7} + +// CHECK: vpxorq %ymm19, %ymm18, %ymm21 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0xed,0xa7,0xef,0xeb] + vpxorq %ymm19, %ymm18, %ymm21 {%k7} {z} + +// CHECK: vpxorq (%rcx), %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x20,0xef,0x29] + vpxorq (%rcx), %ymm18, %ymm21 + +// CHECK: vpxorq 291(%rax,%r14,8), %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xa1,0xed,0x20,0xef,0xac,0xf0,0x23,0x01,0x00,0x00] + vpxorq 291(%rax,%r14,8), %ymm18, %ymm21 + +// CHECK: vpxorq (%rcx){1to4}, %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x30,0xef,0x29] + vpxorq (%rcx){1to4}, %ymm18, %ymm21 + +// CHECK: vpxorq 4064(%rdx), %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x20,0xef,0x6a,0x7f] + vpxorq 4064(%rdx), %ymm18, %ymm21 + +// CHECK: vpxorq 4096(%rdx), %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x20,0xef,0xaa,0x00,0x10,0x00,0x00] + vpxorq 4096(%rdx), %ymm18, %ymm21 + +// CHECK: vpxorq -4096(%rdx), %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x20,0xef,0x6a,0x80] + vpxorq -4096(%rdx), %ymm18, %ymm21 + +// CHECK: vpxorq -4128(%rdx), %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x20,0xef,0xaa,0xe0,0xef,0xff,0xff] + vpxorq -4128(%rdx), %ymm18, %ymm21 + +// CHECK: vpxorq 1016(%rdx){1to4}, %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x30,0xef,0x6a,0x7f] + vpxorq 1016(%rdx){1to4}, %ymm18, %ymm21 + +// CHECK: vpxorq 1024(%rdx){1to4}, %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x30,0xef,0xaa,0x00,0x04,0x00,0x00] + vpxorq 1024(%rdx){1to4}, %ymm18, %ymm21 + +// CHECK: vpxorq -1024(%rdx){1to4}, %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x30,0xef,0x6a,0x80] + vpxorq -1024(%rdx){1to4}, %ymm18, %ymm21 + +// CHECK: vpxorq -1032(%rdx){1to4}, %ymm18, %ymm21 +// CHECK: encoding: [0x62,0xe1,0xed,0x30,0xef,0xaa,0xf8,0xfb,0xff,0xff] + vpxorq -1032(%rdx){1to4}, %ymm18, %ymm21 + +// CHECK: vrcp14pd %xmm29, %xmm18 +// CHECK: encoding: [0x62,0x82,0xfd,0x08,0x4c,0xd5] + vrcp14pd %xmm29, %xmm18 + +// CHECK: vrcp14pd %xmm29, %xmm18 {%k4} +// CHECK: encoding: [0x62,0x82,0xfd,0x0c,0x4c,0xd5] + vrcp14pd %xmm29, %xmm18 {%k4} + +// CHECK: vrcp14pd %xmm29, %xmm18 {%k4} {z} +// CHECK: encoding: [0x62,0x82,0xfd,0x8c,0x4c,0xd5] + vrcp14pd %xmm29, %xmm18 {%k4} {z} + +// CHECK: vrcp14pd (%rcx), %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4c,0x11] + vrcp14pd (%rcx), %xmm18 + +// CHECK: vrcp14pd 291(%rax,%r14,8), %xmm18 +// CHECK: encoding: [0x62,0xa2,0xfd,0x08,0x4c,0x94,0xf0,0x23,0x01,0x00,0x00] + vrcp14pd 291(%rax,%r14,8), %xmm18 + +// CHECK: vrcp14pd (%rcx){1to2}, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4c,0x11] + vrcp14pd (%rcx){1to2}, %xmm18 + +// CHECK: vrcp14pd 2032(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4c,0x52,0x7f] + vrcp14pd 2032(%rdx), %xmm18 + +// CHECK: vrcp14pd 2048(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4c,0x92,0x00,0x08,0x00,0x00] + vrcp14pd 2048(%rdx), %xmm18 + +// CHECK: vrcp14pd -2048(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4c,0x52,0x80] + vrcp14pd -2048(%rdx), %xmm18 + +// CHECK: vrcp14pd -2064(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4c,0x92,0xf0,0xf7,0xff,0xff] + vrcp14pd -2064(%rdx), %xmm18 + +// CHECK: vrcp14pd 1016(%rdx){1to2}, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4c,0x52,0x7f] + vrcp14pd 1016(%rdx){1to2}, %xmm18 + +// CHECK: vrcp14pd 1024(%rdx){1to2}, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4c,0x92,0x00,0x04,0x00,0x00] + vrcp14pd 1024(%rdx){1to2}, %xmm18 + +// CHECK: vrcp14pd -1024(%rdx){1to2}, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4c,0x52,0x80] + vrcp14pd -1024(%rdx){1to2}, %xmm18 + +// CHECK: vrcp14pd -1032(%rdx){1to2}, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4c,0x92,0xf8,0xfb,0xff,0xff] + vrcp14pd -1032(%rdx){1to2}, %xmm18 + +// CHECK: vrcp14pd %ymm29, %ymm17 +// CHECK: encoding: [0x62,0x82,0xfd,0x28,0x4c,0xcd] + vrcp14pd %ymm29, %ymm17 + +// CHECK: vrcp14pd %ymm29, %ymm17 {%k4} +// CHECK: encoding: [0x62,0x82,0xfd,0x2c,0x4c,0xcd] + vrcp14pd %ymm29, %ymm17 {%k4} + +// CHECK: vrcp14pd %ymm29, %ymm17 {%k4} {z} +// CHECK: encoding: [0x62,0x82,0xfd,0xac,0x4c,0xcd] + vrcp14pd %ymm29, %ymm17 {%k4} {z} + +// CHECK: vrcp14pd (%rcx), %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4c,0x09] + vrcp14pd (%rcx), %ymm17 + +// CHECK: vrcp14pd 291(%rax,%r14,8), %ymm17 +// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x4c,0x8c,0xf0,0x23,0x01,0x00,0x00] + vrcp14pd 291(%rax,%r14,8), %ymm17 + +// CHECK: vrcp14pd (%rcx){1to4}, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4c,0x09] + vrcp14pd (%rcx){1to4}, %ymm17 + +// CHECK: vrcp14pd 4064(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4c,0x4a,0x7f] + vrcp14pd 4064(%rdx), %ymm17 + +// CHECK: vrcp14pd 4096(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4c,0x8a,0x00,0x10,0x00,0x00] + vrcp14pd 4096(%rdx), %ymm17 + +// CHECK: vrcp14pd -4096(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4c,0x4a,0x80] + vrcp14pd -4096(%rdx), %ymm17 + +// CHECK: vrcp14pd -4128(%rdx), %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4c,0x8a,0xe0,0xef,0xff,0xff] + vrcp14pd -4128(%rdx), %ymm17 + +// CHECK: vrcp14pd 1016(%rdx){1to4}, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4c,0x4a,0x7f] + vrcp14pd 1016(%rdx){1to4}, %ymm17 + +// CHECK: vrcp14pd 1024(%rdx){1to4}, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4c,0x8a,0x00,0x04,0x00,0x00] + vrcp14pd 1024(%rdx){1to4}, %ymm17 + +// CHECK: vrcp14pd -1024(%rdx){1to4}, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4c,0x4a,0x80] + vrcp14pd -1024(%rdx){1to4}, %ymm17 + +// CHECK: vrcp14pd -1032(%rdx){1to4}, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4c,0x8a,0xf8,0xfb,0xff,0xff] + vrcp14pd -1032(%rdx){1to4}, %ymm17 + +// CHECK: vrcp14ps %xmm28, %xmm27 +// CHECK: encoding: [0x62,0x02,0x7d,0x08,0x4c,0xdc] + vrcp14ps %xmm28, %xmm27 + +// CHECK: vrcp14ps %xmm28, %xmm27 {%k4} +// CHECK: encoding: [0x62,0x02,0x7d,0x0c,0x4c,0xdc] + vrcp14ps %xmm28, %xmm27 {%k4} + +// CHECK: vrcp14ps %xmm28, %xmm27 {%k4} {z} +// CHECK: encoding: [0x62,0x02,0x7d,0x8c,0x4c,0xdc] + vrcp14ps %xmm28, %xmm27 {%k4} {z} + +// CHECK: vrcp14ps (%rcx), %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x4c,0x19] + vrcp14ps (%rcx), %xmm27 + +// CHECK: vrcp14ps 291(%rax,%r14,8), %xmm27 +// CHECK: encoding: [0x62,0x22,0x7d,0x08,0x4c,0x9c,0xf0,0x23,0x01,0x00,0x00] + vrcp14ps 291(%rax,%r14,8), %xmm27 + +// CHECK: vrcp14ps (%rcx){1to4}, %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x18,0x4c,0x19] + vrcp14ps (%rcx){1to4}, %xmm27 + +// CHECK: vrcp14ps 2032(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x4c,0x5a,0x7f] + vrcp14ps 2032(%rdx), %xmm27 + +// CHECK: vrcp14ps 2048(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x4c,0x9a,0x00,0x08,0x00,0x00] + vrcp14ps 2048(%rdx), %xmm27 + +// CHECK: vrcp14ps -2048(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x4c,0x5a,0x80] + vrcp14ps -2048(%rdx), %xmm27 + +// CHECK: vrcp14ps -2064(%rdx), %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x4c,0x9a,0xf0,0xf7,0xff,0xff] + vrcp14ps -2064(%rdx), %xmm27 + +// CHECK: vrcp14ps 508(%rdx){1to4}, %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x18,0x4c,0x5a,0x7f] + vrcp14ps 508(%rdx){1to4}, %xmm27 + +// CHECK: vrcp14ps 512(%rdx){1to4}, %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x18,0x4c,0x9a,0x00,0x02,0x00,0x00] + vrcp14ps 512(%rdx){1to4}, %xmm27 + +// CHECK: vrcp14ps -512(%rdx){1to4}, %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x18,0x4c,0x5a,0x80] + vrcp14ps -512(%rdx){1to4}, %xmm27 + +// CHECK: vrcp14ps -516(%rdx){1to4}, %xmm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x18,0x4c,0x9a,0xfc,0xfd,0xff,0xff] + vrcp14ps -516(%rdx){1to4}, %xmm27 + +// CHECK: vrcp14ps %ymm21, %ymm29 +// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x4c,0xed] + vrcp14ps %ymm21, %ymm29 + +// CHECK: vrcp14ps %ymm21, %ymm29 {%k7} +// CHECK: encoding: [0x62,0x22,0x7d,0x2f,0x4c,0xed] + vrcp14ps %ymm21, %ymm29 {%k7} + +// CHECK: vrcp14ps %ymm21, %ymm29 {%k7} {z} +// CHECK: encoding: [0x62,0x22,0x7d,0xaf,0x4c,0xed] + vrcp14ps %ymm21, %ymm29 {%k7} {z} + +// CHECK: vrcp14ps (%rcx), %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4c,0x29] + vrcp14ps (%rcx), %ymm29 + +// CHECK: vrcp14ps 291(%rax,%r14,8), %ymm29 +// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x4c,0xac,0xf0,0x23,0x01,0x00,0x00] + vrcp14ps 291(%rax,%r14,8), %ymm29 + +// CHECK: vrcp14ps (%rcx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4c,0x29] + vrcp14ps (%rcx){1to8}, %ymm29 + +// CHECK: vrcp14ps 4064(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4c,0x6a,0x7f] + vrcp14ps 4064(%rdx), %ymm29 + +// CHECK: vrcp14ps 4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4c,0xaa,0x00,0x10,0x00,0x00] + vrcp14ps 4096(%rdx), %ymm29 + +// CHECK: vrcp14ps -4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4c,0x6a,0x80] + vrcp14ps -4096(%rdx), %ymm29 + +// CHECK: vrcp14ps -4128(%rdx), %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4c,0xaa,0xe0,0xef,0xff,0xff] + vrcp14ps -4128(%rdx), %ymm29 + +// CHECK: vrcp14ps 508(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4c,0x6a,0x7f] + vrcp14ps 508(%rdx){1to8}, %ymm29 + +// CHECK: vrcp14ps 512(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4c,0xaa,0x00,0x02,0x00,0x00] + vrcp14ps 512(%rdx){1to8}, %ymm29 + +// CHECK: vrcp14ps -512(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4c,0x6a,0x80] + vrcp14ps -512(%rdx){1to8}, %ymm29 + +// CHECK: vrcp14ps -516(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4c,0xaa,0xfc,0xfd,0xff,0xff] + vrcp14ps -516(%rdx){1to8}, %ymm29 + +// CHECK: vrsqrt14pd %xmm28, %xmm21 +// CHECK: encoding: [0x62,0x82,0xfd,0x08,0x4e,0xec] + vrsqrt14pd %xmm28, %xmm21 + +// CHECK: vrsqrt14pd %xmm28, %xmm21 {%k1} +// CHECK: encoding: [0x62,0x82,0xfd,0x09,0x4e,0xec] + vrsqrt14pd %xmm28, %xmm21 {%k1} + +// CHECK: vrsqrt14pd %xmm28, %xmm21 {%k1} {z} +// CHECK: encoding: [0x62,0x82,0xfd,0x89,0x4e,0xec] + vrsqrt14pd %xmm28, %xmm21 {%k1} {z} + +// CHECK: vrsqrt14pd (%rcx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4e,0x29] + vrsqrt14pd (%rcx), %xmm21 + +// CHECK: vrsqrt14pd 291(%rax,%r14,8), %xmm21 +// CHECK: encoding: [0x62,0xa2,0xfd,0x08,0x4e,0xac,0xf0,0x23,0x01,0x00,0x00] + vrsqrt14pd 291(%rax,%r14,8), %xmm21 + +// CHECK: vrsqrt14pd (%rcx){1to2}, %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4e,0x29] + vrsqrt14pd (%rcx){1to2}, %xmm21 + +// CHECK: vrsqrt14pd 2032(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4e,0x6a,0x7f] + vrsqrt14pd 2032(%rdx), %xmm21 + +// CHECK: vrsqrt14pd 2048(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4e,0xaa,0x00,0x08,0x00,0x00] + vrsqrt14pd 2048(%rdx), %xmm21 + +// CHECK: vrsqrt14pd -2048(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4e,0x6a,0x80] + vrsqrt14pd -2048(%rdx), %xmm21 + +// CHECK: vrsqrt14pd -2064(%rdx), %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x4e,0xaa,0xf0,0xf7,0xff,0xff] + vrsqrt14pd -2064(%rdx), %xmm21 + +// CHECK: vrsqrt14pd 1016(%rdx){1to2}, %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4e,0x6a,0x7f] + vrsqrt14pd 1016(%rdx){1to2}, %xmm21 + +// CHECK: vrsqrt14pd 1024(%rdx){1to2}, %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4e,0xaa,0x00,0x04,0x00,0x00] + vrsqrt14pd 1024(%rdx){1to2}, %xmm21 + +// CHECK: vrsqrt14pd -1024(%rdx){1to2}, %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4e,0x6a,0x80] + vrsqrt14pd -1024(%rdx){1to2}, %xmm21 + +// CHECK: vrsqrt14pd -1032(%rdx){1to2}, %xmm21 +// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x4e,0xaa,0xf8,0xfb,0xff,0xff] + vrsqrt14pd -1032(%rdx){1to2}, %xmm21 + +// CHECK: vrsqrt14pd %ymm19, %ymm18 +// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x4e,0xd3] + vrsqrt14pd %ymm19, %ymm18 + +// CHECK: vrsqrt14pd %ymm19, %ymm18 {%k4} +// CHECK: encoding: [0x62,0xa2,0xfd,0x2c,0x4e,0xd3] + vrsqrt14pd %ymm19, %ymm18 {%k4} + +// CHECK: vrsqrt14pd %ymm19, %ymm18 {%k4} {z} +// CHECK: encoding: [0x62,0xa2,0xfd,0xac,0x4e,0xd3] + vrsqrt14pd %ymm19, %ymm18 {%k4} {z} + +// CHECK: vrsqrt14pd (%rcx), %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4e,0x11] + vrsqrt14pd (%rcx), %ymm18 + +// CHECK: vrsqrt14pd 291(%rax,%r14,8), %ymm18 +// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x4e,0x94,0xf0,0x23,0x01,0x00,0x00] + vrsqrt14pd 291(%rax,%r14,8), %ymm18 + +// CHECK: vrsqrt14pd (%rcx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4e,0x11] + vrsqrt14pd (%rcx){1to4}, %ymm18 + +// CHECK: vrsqrt14pd 4064(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4e,0x52,0x7f] + vrsqrt14pd 4064(%rdx), %ymm18 + +// CHECK: vrsqrt14pd 4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4e,0x92,0x00,0x10,0x00,0x00] + vrsqrt14pd 4096(%rdx), %ymm18 + +// CHECK: vrsqrt14pd -4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4e,0x52,0x80] + vrsqrt14pd -4096(%rdx), %ymm18 + +// CHECK: vrsqrt14pd -4128(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x4e,0x92,0xe0,0xef,0xff,0xff] + vrsqrt14pd -4128(%rdx), %ymm18 + +// CHECK: vrsqrt14pd 1016(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4e,0x52,0x7f] + vrsqrt14pd 1016(%rdx){1to4}, %ymm18 + +// CHECK: vrsqrt14pd 1024(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4e,0x92,0x00,0x04,0x00,0x00] + vrsqrt14pd 1024(%rdx){1to4}, %ymm18 + +// CHECK: vrsqrt14pd -1024(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4e,0x52,0x80] + vrsqrt14pd -1024(%rdx){1to4}, %ymm18 + +// CHECK: vrsqrt14pd -1032(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x4e,0x92,0xf8,0xfb,0xff,0xff] + vrsqrt14pd -1032(%rdx){1to4}, %ymm18 + +// CHECK: vrsqrt14ps %xmm20, %xmm19 +// CHECK: encoding: [0x62,0xa2,0x7d,0x08,0x4e,0xdc] + vrsqrt14ps %xmm20, %xmm19 + +// CHECK: vrsqrt14ps %xmm20, %xmm19 {%k7} +// CHECK: encoding: [0x62,0xa2,0x7d,0x0f,0x4e,0xdc] + vrsqrt14ps %xmm20, %xmm19 {%k7} + +// CHECK: vrsqrt14ps %xmm20, %xmm19 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x7d,0x8f,0x4e,0xdc] + vrsqrt14ps %xmm20, %xmm19 {%k7} {z} + +// CHECK: vrsqrt14ps (%rcx), %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x4e,0x19] + vrsqrt14ps (%rcx), %xmm19 + +// CHECK: vrsqrt14ps 291(%rax,%r14,8), %xmm19 +// CHECK: encoding: [0x62,0xa2,0x7d,0x08,0x4e,0x9c,0xf0,0x23,0x01,0x00,0x00] + vrsqrt14ps 291(%rax,%r14,8), %xmm19 + +// CHECK: vrsqrt14ps (%rcx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x4e,0x19] + vrsqrt14ps (%rcx){1to4}, %xmm19 + +// CHECK: vrsqrt14ps 2032(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x4e,0x5a,0x7f] + vrsqrt14ps 2032(%rdx), %xmm19 + +// CHECK: vrsqrt14ps 2048(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x4e,0x9a,0x00,0x08,0x00,0x00] + vrsqrt14ps 2048(%rdx), %xmm19 + +// CHECK: vrsqrt14ps -2048(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x4e,0x5a,0x80] + vrsqrt14ps -2048(%rdx), %xmm19 + +// CHECK: vrsqrt14ps -2064(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x4e,0x9a,0xf0,0xf7,0xff,0xff] + vrsqrt14ps -2064(%rdx), %xmm19 + +// CHECK: vrsqrt14ps 508(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x4e,0x5a,0x7f] + vrsqrt14ps 508(%rdx){1to4}, %xmm19 + +// CHECK: vrsqrt14ps 512(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x4e,0x9a,0x00,0x02,0x00,0x00] + vrsqrt14ps 512(%rdx){1to4}, %xmm19 + +// CHECK: vrsqrt14ps -512(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x4e,0x5a,0x80] + vrsqrt14ps -512(%rdx){1to4}, %xmm19 + +// CHECK: vrsqrt14ps -516(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x4e,0x9a,0xfc,0xfd,0xff,0xff] + vrsqrt14ps -516(%rdx){1to4}, %xmm19 + +// CHECK: vrsqrt14ps %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x4e,0xda] + vrsqrt14ps %ymm18, %ymm27 + +// CHECK: vrsqrt14ps %ymm18, %ymm27 {%k7} +// CHECK: encoding: [0x62,0x22,0x7d,0x2f,0x4e,0xda] + vrsqrt14ps %ymm18, %ymm27 {%k7} + +// CHECK: vrsqrt14ps %ymm18, %ymm27 {%k7} {z} +// CHECK: encoding: [0x62,0x22,0x7d,0xaf,0x4e,0xda] + vrsqrt14ps %ymm18, %ymm27 {%k7} {z} + +// CHECK: vrsqrt14ps (%rcx), %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4e,0x19] + vrsqrt14ps (%rcx), %ymm27 + +// CHECK: vrsqrt14ps 291(%rax,%r14,8), %ymm27 +// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x4e,0x9c,0xf0,0x23,0x01,0x00,0x00] + vrsqrt14ps 291(%rax,%r14,8), %ymm27 + +// CHECK: vrsqrt14ps (%rcx){1to8}, %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4e,0x19] + vrsqrt14ps (%rcx){1to8}, %ymm27 + +// CHECK: vrsqrt14ps 4064(%rdx), %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4e,0x5a,0x7f] + vrsqrt14ps 4064(%rdx), %ymm27 + +// CHECK: vrsqrt14ps 4096(%rdx), %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4e,0x9a,0x00,0x10,0x00,0x00] + vrsqrt14ps 4096(%rdx), %ymm27 + +// CHECK: vrsqrt14ps -4096(%rdx), %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4e,0x5a,0x80] + vrsqrt14ps -4096(%rdx), %ymm27 + +// CHECK: vrsqrt14ps -4128(%rdx), %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x4e,0x9a,0xe0,0xef,0xff,0xff] + vrsqrt14ps -4128(%rdx), %ymm27 + +// CHECK: vrsqrt14ps 508(%rdx){1to8}, %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4e,0x5a,0x7f] + vrsqrt14ps 508(%rdx){1to8}, %ymm27 + +// CHECK: vrsqrt14ps 512(%rdx){1to8}, %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4e,0x9a,0x00,0x02,0x00,0x00] + vrsqrt14ps 512(%rdx){1to8}, %ymm27 + +// CHECK: vrsqrt14ps -512(%rdx){1to8}, %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4e,0x5a,0x80] + vrsqrt14ps -512(%rdx){1to8}, %ymm27 + +// CHECK: vrsqrt14ps -516(%rdx){1to8}, %ymm27 +// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x4e,0x9a,0xfc,0xfd,0xff,0xff] + vrsqrt14ps -516(%rdx){1to8}, %ymm27 + +// CHECK: vsqrtpd %xmm26, %xmm29 +// CHECK: encoding: [0x62,0x01,0xfd,0x08,0x51,0xea] + vsqrtpd %xmm26, %xmm29 + +// CHECK: vsqrtpd %xmm26, %xmm29 {%k3} +// CHECK: encoding: [0x62,0x01,0xfd,0x0b,0x51,0xea] + vsqrtpd %xmm26, %xmm29 {%k3} + +// CHECK: vsqrtpd %xmm26, %xmm29 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0xfd,0x8b,0x51,0xea] + vsqrtpd %xmm26, %xmm29 {%k3} {z} + +// CHECK: vsqrtpd (%rcx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0x29] + vsqrtpd (%rcx), %xmm29 + +// CHECK: vsqrtpd 291(%rax,%r14,8), %xmm29 +// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x51,0xac,0xf0,0x23,0x01,0x00,0x00] + vsqrtpd 291(%rax,%r14,8), %xmm29 + +// CHECK: vsqrtpd (%rcx){1to2}, %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0x29] + vsqrtpd (%rcx){1to2}, %xmm29 + +// CHECK: vsqrtpd 2032(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0x6a,0x7f] + vsqrtpd 2032(%rdx), %xmm29 + +// CHECK: vsqrtpd 2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0xaa,0x00,0x08,0x00,0x00] + vsqrtpd 2048(%rdx), %xmm29 + +// CHECK: vsqrtpd -2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0x6a,0x80] + vsqrtpd -2048(%rdx), %xmm29 + +// CHECK: vsqrtpd -2064(%rdx), %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x08,0x51,0xaa,0xf0,0xf7,0xff,0xff] + vsqrtpd -2064(%rdx), %xmm29 + +// CHECK: vsqrtpd 1016(%rdx){1to2}, %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0x6a,0x7f] + vsqrtpd 1016(%rdx){1to2}, %xmm29 + +// CHECK: vsqrtpd 1024(%rdx){1to2}, %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0xaa,0x00,0x04,0x00,0x00] + vsqrtpd 1024(%rdx){1to2}, %xmm29 + +// CHECK: vsqrtpd -1024(%rdx){1to2}, %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0x6a,0x80] + vsqrtpd -1024(%rdx){1to2}, %xmm29 + +// CHECK: vsqrtpd -1032(%rdx){1to2}, %xmm29 +// CHECK: encoding: [0x62,0x61,0xfd,0x18,0x51,0xaa,0xf8,0xfb,0xff,0xff] + vsqrtpd -1032(%rdx){1to2}, %xmm29 + +// CHECK: vsqrtpd %ymm20, %ymm18 +// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x51,0xd4] + vsqrtpd %ymm20, %ymm18 + +// CHECK: vsqrtpd %ymm20, %ymm18 {%k3} +// CHECK: encoding: [0x62,0xa1,0xfd,0x2b,0x51,0xd4] + vsqrtpd %ymm20, %ymm18 {%k3} + +// CHECK: vsqrtpd %ymm20, %ymm18 {%k3} {z} +// CHECK: encoding: [0x62,0xa1,0xfd,0xab,0x51,0xd4] + vsqrtpd %ymm20, %ymm18 {%k3} {z} + +// CHECK: vsqrtpd (%rcx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x11] + vsqrtpd (%rcx), %ymm18 + +// CHECK: vsqrtpd 291(%rax,%r14,8), %ymm18 +// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x51,0x94,0xf0,0x23,0x01,0x00,0x00] + vsqrtpd 291(%rax,%r14,8), %ymm18 + +// CHECK: vsqrtpd (%rcx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x11] + vsqrtpd (%rcx){1to4}, %ymm18 + +// CHECK: vsqrtpd 4064(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x52,0x7f] + vsqrtpd 4064(%rdx), %ymm18 + +// CHECK: vsqrtpd 4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x92,0x00,0x10,0x00,0x00] + vsqrtpd 4096(%rdx), %ymm18 + +// CHECK: vsqrtpd -4096(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x52,0x80] + vsqrtpd -4096(%rdx), %ymm18 + +// CHECK: vsqrtpd -4128(%rdx), %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x51,0x92,0xe0,0xef,0xff,0xff] + vsqrtpd -4128(%rdx), %ymm18 + +// CHECK: vsqrtpd 1016(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x52,0x7f] + vsqrtpd 1016(%rdx){1to4}, %ymm18 + +// CHECK: vsqrtpd 1024(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x92,0x00,0x04,0x00,0x00] + vsqrtpd 1024(%rdx){1to4}, %ymm18 + +// CHECK: vsqrtpd -1024(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x52,0x80] + vsqrtpd -1024(%rdx){1to4}, %ymm18 + +// CHECK: vsqrtpd -1032(%rdx){1to4}, %ymm18 +// CHECK: encoding: [0x62,0xe1,0xfd,0x38,0x51,0x92,0xf8,0xfb,0xff,0xff] + vsqrtpd -1032(%rdx){1to4}, %ymm18 + +// CHECK: vsqrtps %xmm28, %xmm19 +// CHECK: encoding: [0x62,0x81,0x7c,0x08,0x51,0xdc] + vsqrtps %xmm28, %xmm19 + +// CHECK: vsqrtps %xmm28, %xmm19 {%k7} +// CHECK: encoding: [0x62,0x81,0x7c,0x0f,0x51,0xdc] + vsqrtps %xmm28, %xmm19 {%k7} + +// CHECK: vsqrtps %xmm28, %xmm19 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0x7c,0x8f,0x51,0xdc] + vsqrtps %xmm28, %xmm19 {%k7} {z} + +// CHECK: vsqrtps (%rcx), %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x19] + vsqrtps (%rcx), %xmm19 + +// CHECK: vsqrtps 291(%rax,%r14,8), %xmm19 +// CHECK: encoding: [0x62,0xa1,0x7c,0x08,0x51,0x9c,0xf0,0x23,0x01,0x00,0x00] + vsqrtps 291(%rax,%r14,8), %xmm19 + +// CHECK: vsqrtps (%rcx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x19] + vsqrtps (%rcx){1to4}, %xmm19 + +// CHECK: vsqrtps 2032(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x5a,0x7f] + vsqrtps 2032(%rdx), %xmm19 + +// CHECK: vsqrtps 2048(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x9a,0x00,0x08,0x00,0x00] + vsqrtps 2048(%rdx), %xmm19 + +// CHECK: vsqrtps -2048(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x5a,0x80] + vsqrtps -2048(%rdx), %xmm19 + +// CHECK: vsqrtps -2064(%rdx), %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x08,0x51,0x9a,0xf0,0xf7,0xff,0xff] + vsqrtps -2064(%rdx), %xmm19 + +// CHECK: vsqrtps 508(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x5a,0x7f] + vsqrtps 508(%rdx){1to4}, %xmm19 + +// CHECK: vsqrtps 512(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x9a,0x00,0x02,0x00,0x00] + vsqrtps 512(%rdx){1to4}, %xmm19 + +// CHECK: vsqrtps -512(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x5a,0x80] + vsqrtps -512(%rdx){1to4}, %xmm19 + +// CHECK: vsqrtps -516(%rdx){1to4}, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x18,0x51,0x9a,0xfc,0xfd,0xff,0xff] + vsqrtps -516(%rdx){1to4}, %xmm19 + +// CHECK: vsqrtps %ymm25, %ymm19 +// CHECK: encoding: [0x62,0x81,0x7c,0x28,0x51,0xd9] + vsqrtps %ymm25, %ymm19 + +// CHECK: vsqrtps %ymm25, %ymm19 {%k2} +// CHECK: encoding: [0x62,0x81,0x7c,0x2a,0x51,0xd9] + vsqrtps %ymm25, %ymm19 {%k2} + +// CHECK: vsqrtps %ymm25, %ymm19 {%k2} {z} +// CHECK: encoding: [0x62,0x81,0x7c,0xaa,0x51,0xd9] + vsqrtps %ymm25, %ymm19 {%k2} {z} + +// CHECK: vsqrtps (%rcx), %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x19] + vsqrtps (%rcx), %ymm19 + +// CHECK: vsqrtps 291(%rax,%r14,8), %ymm19 +// CHECK: encoding: [0x62,0xa1,0x7c,0x28,0x51,0x9c,0xf0,0x23,0x01,0x00,0x00] + vsqrtps 291(%rax,%r14,8), %ymm19 + +// CHECK: vsqrtps (%rcx){1to8}, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x19] + vsqrtps (%rcx){1to8}, %ymm19 + +// CHECK: vsqrtps 4064(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x5a,0x7f] + vsqrtps 4064(%rdx), %ymm19 + +// CHECK: vsqrtps 4096(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x9a,0x00,0x10,0x00,0x00] + vsqrtps 4096(%rdx), %ymm19 + +// CHECK: vsqrtps -4096(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x5a,0x80] + vsqrtps -4096(%rdx), %ymm19 + +// CHECK: vsqrtps -4128(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x51,0x9a,0xe0,0xef,0xff,0xff] + vsqrtps -4128(%rdx), %ymm19 + +// CHECK: vsqrtps 508(%rdx){1to8}, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x5a,0x7f] + vsqrtps 508(%rdx){1to8}, %ymm19 + +// CHECK: vsqrtps 512(%rdx){1to8}, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x9a,0x00,0x02,0x00,0x00] + vsqrtps 512(%rdx){1to8}, %ymm19 + +// CHECK: vsqrtps -512(%rdx){1to8}, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x5a,0x80] + vsqrtps -512(%rdx){1to8}, %ymm19 + +// CHECK: vsqrtps -516(%rdx){1to8}, %ymm19 +// CHECK: encoding: [0x62,0xe1,0x7c,0x38,0x51,0x9a,0xfc,0xfd,0xff,0xff] + vsqrtps -516(%rdx){1to8}, %ymm19 + +// CHECK: vsubpd %xmm18, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x21,0xbd,0x00,0x5c,0xe2] + vsubpd %xmm18, %xmm24, %xmm28 + +// CHECK: vsubpd %xmm18, %xmm24, %xmm28 {%k3} +// CHECK: encoding: [0x62,0x21,0xbd,0x03,0x5c,0xe2] + vsubpd %xmm18, %xmm24, %xmm28 {%k3} + +// CHECK: vsubpd %xmm18, %xmm24, %xmm28 {%k3} {z} +// CHECK: encoding: [0x62,0x21,0xbd,0x83,0x5c,0xe2] + vsubpd %xmm18, %xmm24, %xmm28 {%k3} {z} + +// CHECK: vsubpd (%rcx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0x5c,0x21] + vsubpd (%rcx), %xmm24, %xmm28 + +// CHECK: vsubpd 291(%rax,%r14,8), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x21,0xbd,0x00,0x5c,0xa4,0xf0,0x23,0x01,0x00,0x00] + vsubpd 291(%rax,%r14,8), %xmm24, %xmm28 + +// CHECK: vsubpd (%rcx){1to2}, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x10,0x5c,0x21] + vsubpd (%rcx){1to2}, %xmm24, %xmm28 + +// CHECK: vsubpd 2032(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0x5c,0x62,0x7f] + vsubpd 2032(%rdx), %xmm24, %xmm28 + +// CHECK: vsubpd 2048(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0x5c,0xa2,0x00,0x08,0x00,0x00] + vsubpd 2048(%rdx), %xmm24, %xmm28 + +// CHECK: vsubpd -2048(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0x5c,0x62,0x80] + vsubpd -2048(%rdx), %xmm24, %xmm28 + +// CHECK: vsubpd -2064(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0x5c,0xa2,0xf0,0xf7,0xff,0xff] + vsubpd -2064(%rdx), %xmm24, %xmm28 + +// CHECK: vsubpd 1016(%rdx){1to2}, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x10,0x5c,0x62,0x7f] + vsubpd 1016(%rdx){1to2}, %xmm24, %xmm28 + +// CHECK: vsubpd 1024(%rdx){1to2}, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x10,0x5c,0xa2,0x00,0x04,0x00,0x00] + vsubpd 1024(%rdx){1to2}, %xmm24, %xmm28 + +// CHECK: vsubpd -1024(%rdx){1to2}, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x10,0x5c,0x62,0x80] + vsubpd -1024(%rdx){1to2}, %xmm24, %xmm28 + +// CHECK: vsubpd -1032(%rdx){1to2}, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0xbd,0x10,0x5c,0xa2,0xf8,0xfb,0xff,0xff] + vsubpd -1032(%rdx){1to2}, %xmm24, %xmm28 + +// CHECK: vsubpd %ymm25, %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x01,0x9d,0x20,0x5c,0xf1] + vsubpd %ymm25, %ymm28, %ymm30 + +// CHECK: vsubpd %ymm25, %ymm28, %ymm30 {%k7} +// CHECK: encoding: [0x62,0x01,0x9d,0x27,0x5c,0xf1] + vsubpd %ymm25, %ymm28, %ymm30 {%k7} + +// CHECK: vsubpd %ymm25, %ymm28, %ymm30 {%k7} {z} +// CHECK: encoding: [0x62,0x01,0x9d,0xa7,0x5c,0xf1] + vsubpd %ymm25, %ymm28, %ymm30 {%k7} {z} + +// CHECK: vsubpd (%rcx), %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x20,0x5c,0x31] + vsubpd (%rcx), %ymm28, %ymm30 + +// CHECK: vsubpd 291(%rax,%r14,8), %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x21,0x9d,0x20,0x5c,0xb4,0xf0,0x23,0x01,0x00,0x00] + vsubpd 291(%rax,%r14,8), %ymm28, %ymm30 + +// CHECK: vsubpd (%rcx){1to4}, %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x30,0x5c,0x31] + vsubpd (%rcx){1to4}, %ymm28, %ymm30 + +// CHECK: vsubpd 4064(%rdx), %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x20,0x5c,0x72,0x7f] + vsubpd 4064(%rdx), %ymm28, %ymm30 + +// CHECK: vsubpd 4096(%rdx), %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x20,0x5c,0xb2,0x00,0x10,0x00,0x00] + vsubpd 4096(%rdx), %ymm28, %ymm30 + +// CHECK: vsubpd -4096(%rdx), %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x20,0x5c,0x72,0x80] + vsubpd -4096(%rdx), %ymm28, %ymm30 + +// CHECK: vsubpd -4128(%rdx), %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x20,0x5c,0xb2,0xe0,0xef,0xff,0xff] + vsubpd -4128(%rdx), %ymm28, %ymm30 + +// CHECK: vsubpd 1016(%rdx){1to4}, %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x30,0x5c,0x72,0x7f] + vsubpd 1016(%rdx){1to4}, %ymm28, %ymm30 + +// CHECK: vsubpd 1024(%rdx){1to4}, %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x30,0x5c,0xb2,0x00,0x04,0x00,0x00] + vsubpd 1024(%rdx){1to4}, %ymm28, %ymm30 + +// CHECK: vsubpd -1024(%rdx){1to4}, %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x30,0x5c,0x72,0x80] + vsubpd -1024(%rdx){1to4}, %ymm28, %ymm30 + +// CHECK: vsubpd -1032(%rdx){1to4}, %ymm28, %ymm30 +// CHECK: encoding: [0x62,0x61,0x9d,0x30,0x5c,0xb2,0xf8,0xfb,0xff,0xff] + vsubpd -1032(%rdx){1to4}, %ymm28, %ymm30 + +// CHECK: vsubps %xmm25, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0x81,0x14,0x00,0x5c,0xe1] + vsubps %xmm25, %xmm29, %xmm20 + +// CHECK: vsubps %xmm25, %xmm29, %xmm20 {%k3} +// CHECK: encoding: [0x62,0x81,0x14,0x03,0x5c,0xe1] + vsubps %xmm25, %xmm29, %xmm20 {%k3} + +// CHECK: vsubps %xmm25, %xmm29, %xmm20 {%k3} {z} +// CHECK: encoding: [0x62,0x81,0x14,0x83,0x5c,0xe1] + vsubps %xmm25, %xmm29, %xmm20 {%k3} {z} + +// CHECK: vsubps (%rcx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x00,0x5c,0x21] + vsubps (%rcx), %xmm29, %xmm20 + +// CHECK: vsubps 291(%rax,%r14,8), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xa1,0x14,0x00,0x5c,0xa4,0xf0,0x23,0x01,0x00,0x00] + vsubps 291(%rax,%r14,8), %xmm29, %xmm20 + +// CHECK: vsubps (%rcx){1to4}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x10,0x5c,0x21] + vsubps (%rcx){1to4}, %xmm29, %xmm20 + +// CHECK: vsubps 2032(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x00,0x5c,0x62,0x7f] + vsubps 2032(%rdx), %xmm29, %xmm20 + +// CHECK: vsubps 2048(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x00,0x5c,0xa2,0x00,0x08,0x00,0x00] + vsubps 2048(%rdx), %xmm29, %xmm20 + +// CHECK: vsubps -2048(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x00,0x5c,0x62,0x80] + vsubps -2048(%rdx), %xmm29, %xmm20 + +// CHECK: vsubps -2064(%rdx), %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x00,0x5c,0xa2,0xf0,0xf7,0xff,0xff] + vsubps -2064(%rdx), %xmm29, %xmm20 + +// CHECK: vsubps 508(%rdx){1to4}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x10,0x5c,0x62,0x7f] + vsubps 508(%rdx){1to4}, %xmm29, %xmm20 + +// CHECK: vsubps 512(%rdx){1to4}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x10,0x5c,0xa2,0x00,0x02,0x00,0x00] + vsubps 512(%rdx){1to4}, %xmm29, %xmm20 + +// CHECK: vsubps -512(%rdx){1to4}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x10,0x5c,0x62,0x80] + vsubps -512(%rdx){1to4}, %xmm29, %xmm20 + +// CHECK: vsubps -516(%rdx){1to4}, %xmm29, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x14,0x10,0x5c,0xa2,0xfc,0xfd,0xff,0xff] + vsubps -516(%rdx){1to4}, %xmm29, %xmm20 + +// CHECK: vsubps %ymm22, %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x54,0x20,0x5c,0xee] + vsubps %ymm22, %ymm21, %ymm21 + +// CHECK: vsubps %ymm22, %ymm21, %ymm21 {%k4} +// CHECK: encoding: [0x62,0xa1,0x54,0x24,0x5c,0xee] + vsubps %ymm22, %ymm21, %ymm21 {%k4} + +// CHECK: vsubps %ymm22, %ymm21, %ymm21 {%k4} {z} +// CHECK: encoding: [0x62,0xa1,0x54,0xa4,0x5c,0xee] + vsubps %ymm22, %ymm21, %ymm21 {%k4} {z} + +// CHECK: vsubps (%rcx), %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x20,0x5c,0x29] + vsubps (%rcx), %ymm21, %ymm21 + +// CHECK: vsubps 291(%rax,%r14,8), %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x54,0x20,0x5c,0xac,0xf0,0x23,0x01,0x00,0x00] + vsubps 291(%rax,%r14,8), %ymm21, %ymm21 + +// CHECK: vsubps (%rcx){1to8}, %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x30,0x5c,0x29] + vsubps (%rcx){1to8}, %ymm21, %ymm21 + +// CHECK: vsubps 4064(%rdx), %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x20,0x5c,0x6a,0x7f] + vsubps 4064(%rdx), %ymm21, %ymm21 + +// CHECK: vsubps 4096(%rdx), %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x20,0x5c,0xaa,0x00,0x10,0x00,0x00] + vsubps 4096(%rdx), %ymm21, %ymm21 + +// CHECK: vsubps -4096(%rdx), %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x20,0x5c,0x6a,0x80] + vsubps -4096(%rdx), %ymm21, %ymm21 + +// CHECK: vsubps -4128(%rdx), %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x20,0x5c,0xaa,0xe0,0xef,0xff,0xff] + vsubps -4128(%rdx), %ymm21, %ymm21 + +// CHECK: vsubps 508(%rdx){1to8}, %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x30,0x5c,0x6a,0x7f] + vsubps 508(%rdx){1to8}, %ymm21, %ymm21 + +// CHECK: vsubps 512(%rdx){1to8}, %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x30,0x5c,0xaa,0x00,0x02,0x00,0x00] + vsubps 512(%rdx){1to8}, %ymm21, %ymm21 + +// CHECK: vsubps -512(%rdx){1to8}, %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x30,0x5c,0x6a,0x80] + vsubps -512(%rdx){1to8}, %ymm21, %ymm21 + +// CHECK: vsubps -516(%rdx){1to8}, %ymm21, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x54,0x30,0x5c,0xaa,0xfc,0xfd,0xff,0xff] + vsubps -516(%rdx){1to8}, %ymm21, %ymm21 + +// CHECK: vmovapd %xmm22, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x29,0x31] + vmovapd %xmm22, (%rcx) + +// CHECK: vmovapd %xmm22, (%rcx) {%k2} +// CHECK: encoding: [0x62,0xe1,0xfd,0x0a,0x29,0x31] + vmovapd %xmm22, (%rcx) {%k2} + +// CHECK: vmovapd %xmm22, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x29,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovapd %xmm22, 291(%rax,%r14,8) + +// CHECK: vmovapd %xmm22, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x29,0x72,0x7f] + vmovapd %xmm22, 2032(%rdx) + +// CHECK: vmovapd %xmm22, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x29,0xb2,0x00,0x08,0x00,0x00] + vmovapd %xmm22, 2048(%rdx) + +// CHECK: vmovapd %xmm22, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x29,0x72,0x80] + vmovapd %xmm22, -2048(%rdx) + +// CHECK: vmovapd %xmm22, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x29,0xb2,0xf0,0xf7,0xff,0xff] + vmovapd %xmm22, -2064(%rdx) + +// CHECK: vmovapd %ymm17, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x29,0x09] + vmovapd %ymm17, (%rcx) + +// CHECK: vmovapd %ymm17, (%rcx) {%k6} +// CHECK: encoding: [0x62,0xe1,0xfd,0x2e,0x29,0x09] + vmovapd %ymm17, (%rcx) {%k6} + +// CHECK: vmovapd %ymm17, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x28,0x29,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovapd %ymm17, 291(%rax,%r14,8) + +// CHECK: vmovapd %ymm17, 4064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x29,0x4a,0x7f] + vmovapd %ymm17, 4064(%rdx) + +// CHECK: vmovapd %ymm17, 4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x29,0x8a,0x00,0x10,0x00,0x00] + vmovapd %ymm17, 4096(%rdx) + +// CHECK: vmovapd %ymm17, -4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x29,0x4a,0x80] + vmovapd %ymm17, -4096(%rdx) + +// CHECK: vmovapd %ymm17, -4128(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x28,0x29,0x8a,0xe0,0xef,0xff,0xff] + vmovapd %ymm17, -4128(%rdx) + +// CHECK: vmovaps %xmm29, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x29,0x29] + vmovaps %xmm29, (%rcx) + +// CHECK: vmovaps %xmm29, (%rcx) {%k5} +// CHECK: encoding: [0x62,0x61,0x7c,0x0d,0x29,0x29] + vmovaps %xmm29, (%rcx) {%k5} + +// CHECK: vmovaps %xmm29, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7c,0x08,0x29,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovaps %xmm29, 291(%rax,%r14,8) + +// CHECK: vmovaps %xmm29, 2032(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x29,0x6a,0x7f] + vmovaps %xmm29, 2032(%rdx) + +// CHECK: vmovaps %xmm29, 2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x29,0xaa,0x00,0x08,0x00,0x00] + vmovaps %xmm29, 2048(%rdx) + +// CHECK: vmovaps %xmm29, -2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x29,0x6a,0x80] + vmovaps %xmm29, -2048(%rdx) + +// CHECK: vmovaps %xmm29, -2064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x29,0xaa,0xf0,0xf7,0xff,0xff] + vmovaps %xmm29, -2064(%rdx) + +// CHECK: vmovaps %ymm28, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x29,0x21] + vmovaps %ymm28, (%rcx) + +// CHECK: vmovaps %ymm28, (%rcx) {%k6} +// CHECK: encoding: [0x62,0x61,0x7c,0x2e,0x29,0x21] + vmovaps %ymm28, (%rcx) {%k6} + +// CHECK: vmovaps %ymm28, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7c,0x28,0x29,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovaps %ymm28, 291(%rax,%r14,8) + +// CHECK: vmovaps %ymm28, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x29,0x62,0x7f] + vmovaps %ymm28, 4064(%rdx) + +// CHECK: vmovaps %ymm28, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x29,0xa2,0x00,0x10,0x00,0x00] + vmovaps %ymm28, 4096(%rdx) + +// CHECK: vmovaps %ymm28, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x29,0x62,0x80] + vmovaps %ymm28, -4096(%rdx) + +// CHECK: vmovaps %ymm28, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x29,0xa2,0xe0,0xef,0xff,0xff] + vmovaps %ymm28, -4128(%rdx) + +// CHECK: vmovdqa32 %xmm24, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7d,0x08,0x7f,0x01] + vmovdqa32 %xmm24, (%rcx) + +// CHECK: vmovdqa32 %xmm24, (%rcx) {%k7} +// CHECK: encoding: [0x62,0x61,0x7d,0x0f,0x7f,0x01] + vmovdqa32 %xmm24, (%rcx) {%k7} + +// CHECK: vmovdqa32 %xmm24, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7d,0x08,0x7f,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovdqa32 %xmm24, 291(%rax,%r14,8) + +// CHECK: vmovdqa32 %xmm24, 2032(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x08,0x7f,0x42,0x7f] + vmovdqa32 %xmm24, 2032(%rdx) + +// CHECK: vmovdqa32 %xmm24, 2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x08,0x7f,0x82,0x00,0x08,0x00,0x00] + vmovdqa32 %xmm24, 2048(%rdx) + +// CHECK: vmovdqa32 %xmm24, -2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x08,0x7f,0x42,0x80] + vmovdqa32 %xmm24, -2048(%rdx) + +// CHECK: vmovdqa32 %xmm24, -2064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x08,0x7f,0x82,0xf0,0xf7,0xff,0xff] + vmovdqa32 %xmm24, -2064(%rdx) + +// CHECK: vmovdqa32 %ymm29, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x7f,0x29] + vmovdqa32 %ymm29, (%rcx) + +// CHECK: vmovdqa32 %ymm29, (%rcx) {%k7} +// CHECK: encoding: [0x62,0x61,0x7d,0x2f,0x7f,0x29] + vmovdqa32 %ymm29, (%rcx) {%k7} + +// CHECK: vmovdqa32 %ymm29, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7d,0x28,0x7f,0xac,0xf0,0x23,0x01,0x00,0x00] + vmovdqa32 %ymm29, 291(%rax,%r14,8) + +// CHECK: vmovdqa32 %ymm29, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x7f,0x6a,0x7f] + vmovdqa32 %ymm29, 4064(%rdx) + +// CHECK: vmovdqa32 %ymm29, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x7f,0xaa,0x00,0x10,0x00,0x00] + vmovdqa32 %ymm29, 4096(%rdx) + +// CHECK: vmovdqa32 %ymm29, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x7f,0x6a,0x80] + vmovdqa32 %ymm29, -4096(%rdx) + +// CHECK: vmovdqa32 %ymm29, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0x7d,0x28,0x7f,0xaa,0xe0,0xef,0xff,0xff] + vmovdqa32 %ymm29, -4128(%rdx) + +// CHECK: vmovdqa64 %xmm17, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x7f,0x09] + vmovdqa64 %xmm17, (%rcx) + +// CHECK: vmovdqa64 %xmm17, (%rcx) {%k7} +// CHECK: encoding: [0x62,0xe1,0xfd,0x0f,0x7f,0x09] + vmovdqa64 %xmm17, (%rcx) {%k7} + +// CHECK: vmovdqa64 %xmm17, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x7f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovdqa64 %xmm17, 291(%rax,%r14,8) + +// CHECK: vmovdqa64 %xmm17, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x7f,0x4a,0x7f] + vmovdqa64 %xmm17, 2032(%rdx) + +// CHECK: vmovdqa64 %xmm17, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x7f,0x8a,0x00,0x08,0x00,0x00] + vmovdqa64 %xmm17, 2048(%rdx) + +// CHECK: vmovdqa64 %xmm17, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x7f,0x4a,0x80] + vmovdqa64 %xmm17, -2048(%rdx) + +// CHECK: vmovdqa64 %xmm17, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x7f,0x8a,0xf0,0xf7,0xff,0xff] + vmovdqa64 %xmm17, -2064(%rdx) + +// CHECK: vmovdqa64 %ymm24, (%rcx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x7f,0x01] + vmovdqa64 %ymm24, (%rcx) + +// CHECK: vmovdqa64 %ymm24, (%rcx) {%k2} +// CHECK: encoding: [0x62,0x61,0xfd,0x2a,0x7f,0x01] + vmovdqa64 %ymm24, (%rcx) {%k2} + +// CHECK: vmovdqa64 %ymm24, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0xfd,0x28,0x7f,0x84,0xf0,0x23,0x01,0x00,0x00] + vmovdqa64 %ymm24, 291(%rax,%r14,8) + +// CHECK: vmovdqa64 %ymm24, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x7f,0x42,0x7f] + vmovdqa64 %ymm24, 4064(%rdx) + +// CHECK: vmovdqa64 %ymm24, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x7f,0x82,0x00,0x10,0x00,0x00] + vmovdqa64 %ymm24, 4096(%rdx) + +// CHECK: vmovdqa64 %ymm24, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x7f,0x42,0x80] + vmovdqa64 %ymm24, -4096(%rdx) + +// CHECK: vmovdqa64 %ymm24, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x7f,0x82,0xe0,0xef,0xff,0xff] + vmovdqa64 %ymm24, -4128(%rdx) + +// CHECK: vmovdqu32 %xmm17, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x08,0x7f,0x09] + vmovdqu32 %xmm17, (%rcx) + +// CHECK: vmovdqu32 %xmm17, (%rcx) {%k4} +// CHECK: encoding: [0x62,0xe1,0x7e,0x0c,0x7f,0x09] + vmovdqu32 %xmm17, (%rcx) {%k4} + +// CHECK: vmovdqu32 %xmm17, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7e,0x08,0x7f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vmovdqu32 %xmm17, 291(%rax,%r14,8) + +// CHECK: vmovdqu32 %xmm17, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x08,0x7f,0x4a,0x7f] + vmovdqu32 %xmm17, 2032(%rdx) + +// CHECK: vmovdqu32 %xmm17, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x08,0x7f,0x8a,0x00,0x08,0x00,0x00] + vmovdqu32 %xmm17, 2048(%rdx) + +// CHECK: vmovdqu32 %xmm17, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x08,0x7f,0x4a,0x80] + vmovdqu32 %xmm17, -2048(%rdx) + +// CHECK: vmovdqu32 %xmm17, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x08,0x7f,0x8a,0xf0,0xf7,0xff,0xff] + vmovdqu32 %xmm17, -2064(%rdx) + +// CHECK: vmovdqu32 %ymm20, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x7f,0x21] + vmovdqu32 %ymm20, (%rcx) + +// CHECK: vmovdqu32 %ymm20, (%rcx) {%k1} +// CHECK: encoding: [0x62,0xe1,0x7e,0x29,0x7f,0x21] + vmovdqu32 %ymm20, (%rcx) {%k1} + +// CHECK: vmovdqu32 %ymm20, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7e,0x28,0x7f,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovdqu32 %ymm20, 291(%rax,%r14,8) + +// CHECK: vmovdqu32 %ymm20, 4064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x7f,0x62,0x7f] + vmovdqu32 %ymm20, 4064(%rdx) + +// CHECK: vmovdqu32 %ymm20, 4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x7f,0xa2,0x00,0x10,0x00,0x00] + vmovdqu32 %ymm20, 4096(%rdx) + +// CHECK: vmovdqu32 %ymm20, -4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x7f,0x62,0x80] + vmovdqu32 %ymm20, -4096(%rdx) + +// CHECK: vmovdqu32 %ymm20, -4128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7e,0x28,0x7f,0xa2,0xe0,0xef,0xff,0xff] + vmovdqu32 %ymm20, -4128(%rdx) + +// CHECK: vmovdqu64 %xmm20, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x7f,0x21] + vmovdqu64 %xmm20, (%rcx) + +// CHECK: vmovdqu64 %xmm20, (%rcx) {%k6} +// CHECK: encoding: [0x62,0xe1,0xfe,0x0e,0x7f,0x21] + vmovdqu64 %xmm20, (%rcx) {%k6} + +// CHECK: vmovdqu64 %xmm20, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfe,0x08,0x7f,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovdqu64 %xmm20, 291(%rax,%r14,8) + +// CHECK: vmovdqu64 %xmm20, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x7f,0x62,0x7f] + vmovdqu64 %xmm20, 2032(%rdx) + +// CHECK: vmovdqu64 %xmm20, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x7f,0xa2,0x00,0x08,0x00,0x00] + vmovdqu64 %xmm20, 2048(%rdx) + +// CHECK: vmovdqu64 %xmm20, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x7f,0x62,0x80] + vmovdqu64 %xmm20, -2048(%rdx) + +// CHECK: vmovdqu64 %xmm20, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x08,0x7f,0xa2,0xf0,0xf7,0xff,0xff] + vmovdqu64 %xmm20, -2064(%rdx) + +// CHECK: vmovdqu64 %ymm19, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x28,0x7f,0x19] + vmovdqu64 %ymm19, (%rcx) + +// CHECK: vmovdqu64 %ymm19, (%rcx) {%k7} +// CHECK: encoding: [0x62,0xe1,0xfe,0x2f,0x7f,0x19] + vmovdqu64 %ymm19, (%rcx) {%k7} + +// CHECK: vmovdqu64 %ymm19, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfe,0x28,0x7f,0x9c,0xf0,0x23,0x01,0x00,0x00] + vmovdqu64 %ymm19, 291(%rax,%r14,8) + +// CHECK: vmovdqu64 %ymm19, 4064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x28,0x7f,0x5a,0x7f] + vmovdqu64 %ymm19, 4064(%rdx) + +// CHECK: vmovdqu64 %ymm19, 4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x28,0x7f,0x9a,0x00,0x10,0x00,0x00] + vmovdqu64 %ymm19, 4096(%rdx) + +// CHECK: vmovdqu64 %ymm19, -4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x28,0x7f,0x5a,0x80] + vmovdqu64 %ymm19, -4096(%rdx) + +// CHECK: vmovdqu64 %ymm19, -4128(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfe,0x28,0x7f,0x9a,0xe0,0xef,0xff,0xff] + vmovdqu64 %ymm19, -4128(%rdx) + +// CHECK: vmovupd %xmm22, (%rcx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x11,0x31] + vmovupd %xmm22, (%rcx) + +// CHECK: vmovupd %xmm22, (%rcx) {%k7} +// CHECK: encoding: [0x62,0xe1,0xfd,0x0f,0x11,0x31] + vmovupd %xmm22, (%rcx) {%k7} + +// CHECK: vmovupd %xmm22, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x11,0xb4,0xf0,0x23,0x01,0x00,0x00] + vmovupd %xmm22, 291(%rax,%r14,8) + +// CHECK: vmovupd %xmm22, 2032(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x11,0x72,0x7f] + vmovupd %xmm22, 2032(%rdx) + +// CHECK: vmovupd %xmm22, 2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x11,0xb2,0x00,0x08,0x00,0x00] + vmovupd %xmm22, 2048(%rdx) + +// CHECK: vmovupd %xmm22, -2048(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x11,0x72,0x80] + vmovupd %xmm22, -2048(%rdx) + +// CHECK: vmovupd %xmm22, -2064(%rdx) +// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x11,0xb2,0xf0,0xf7,0xff,0xff] + vmovupd %xmm22, -2064(%rdx) + +// CHECK: vmovupd %ymm28, (%rcx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x11,0x21] + vmovupd %ymm28, (%rcx) + +// CHECK: vmovupd %ymm28, (%rcx) {%k1} +// CHECK: encoding: [0x62,0x61,0xfd,0x29,0x11,0x21] + vmovupd %ymm28, (%rcx) {%k1} + +// CHECK: vmovupd %ymm28, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0xfd,0x28,0x11,0xa4,0xf0,0x23,0x01,0x00,0x00] + vmovupd %ymm28, 291(%rax,%r14,8) + +// CHECK: vmovupd %ymm28, 4064(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x11,0x62,0x7f] + vmovupd %ymm28, 4064(%rdx) + +// CHECK: vmovupd %ymm28, 4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x11,0xa2,0x00,0x10,0x00,0x00] + vmovupd %ymm28, 4096(%rdx) + +// CHECK: vmovupd %ymm28, -4096(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x11,0x62,0x80] + vmovupd %ymm28, -4096(%rdx) + +// CHECK: vmovupd %ymm28, -4128(%rdx) +// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x11,0xa2,0xe0,0xef,0xff,0xff] + vmovupd %ymm28, -4128(%rdx) + +// CHECK: vmovups %xmm26, (%rcx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x11,0x11] + vmovups %xmm26, (%rcx) + +// CHECK: vmovups %xmm26, (%rcx) {%k5} +// CHECK: encoding: [0x62,0x61,0x7c,0x0d,0x11,0x11] + vmovups %xmm26, (%rcx) {%k5} + +// CHECK: vmovups %xmm26, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0x21,0x7c,0x08,0x11,0x94,0xf0,0x23,0x01,0x00,0x00] + vmovups %xmm26, 291(%rax,%r14,8) + +// CHECK: vmovups %xmm26, 2032(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x11,0x52,0x7f] + vmovups %xmm26, 2032(%rdx) + +// CHECK: vmovups %xmm26, 2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x11,0x92,0x00,0x08,0x00,0x00] + vmovups %xmm26, 2048(%rdx) + +// CHECK: vmovups %xmm26, -2048(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x11,0x52,0x80] + vmovups %xmm26, -2048(%rdx) + +// CHECK: vmovups %xmm26, -2064(%rdx) +// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x11,0x92,0xf0,0xf7,0xff,0xff] + vmovups %xmm26, -2064(%rdx) + +// CHECK: vmovups %ymm23, (%rcx) +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x11,0x39] + vmovups %ymm23, (%rcx) + +// CHECK: vmovups %ymm23, (%rcx) {%k3} +// CHECK: encoding: [0x62,0xe1,0x7c,0x2b,0x11,0x39] + vmovups %ymm23, (%rcx) {%k3} + +// CHECK: vmovups %ymm23, 291(%rax,%r14,8) +// CHECK: encoding: [0x62,0xa1,0x7c,0x28,0x11,0xbc,0xf0,0x23,0x01,0x00,0x00] + vmovups %ymm23, 291(%rax,%r14,8) + +// CHECK: vmovups %ymm23, 4064(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x11,0x7a,0x7f] + vmovups %ymm23, 4064(%rdx) + +// CHECK: vmovups %ymm23, 4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x11,0xba,0x00,0x10,0x00,0x00] + vmovups %ymm23, 4096(%rdx) + +// CHECK: vmovups %ymm23, -4096(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x11,0x7a,0x80] + vmovups %ymm23, -4096(%rdx) + +// CHECK: vmovups %ymm23, -4128(%rdx) +// CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x11,0xba,0xe0,0xef,0xff,0xff] + vmovups %ymm23, -4128(%rdx) diff --git a/test/MC/X86/x86-itanium.ll b/test/MC/X86/x86-itanium.ll new file mode 100644 index 0000000..1d8308d --- /dev/null +++ b/test/MC/X86/x86-itanium.ll @@ -0,0 +1,6 @@ +; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s + +@var = common global i32 0, align 4 + +; CHECK-NOT: .type _var,@object + diff --git a/test/MC/X86/x86-windows-itanium-libcalls.ll b/test/MC/X86/x86-windows-itanium-libcalls.ll new file mode 100644 index 0000000..773d03b --- /dev/null +++ b/test/MC/X86/x86-windows-itanium-libcalls.ll @@ -0,0 +1,16 @@ +; RUN: opt -mtriple i686-windows-itanium -O2 -o - %s | llvm-dis | FileCheck %s + +target triple = "i686-windows-itanium" + +declare dllimport double @floor(double) + +define dllexport float @test(float %f) { + %conv = fpext float %f to double + %call = tail call double @floor(double %conv) + %cast = fptrunc double %call to float + ret float %cast +} + +; CHECK-NOT: floorf +; CHECK: floor + diff --git a/test/MC/X86/x86_errors.s b/test/MC/X86/x86_errors.s index 51f2e8e..0b3bc7f 100644 --- a/test/MC/X86/x86_errors.s +++ b/test/MC/X86/x86_errors.s @@ -46,3 +46,7 @@ movl %eax,(,%bx) // 32: error: invalid operand for instruction outb al, 4 + +// 32: error: invalid segment register +// 64: error: invalid segment register +movl %eax:0x00, %ebx diff --git a/test/MC/X86/x86_operands.s b/test/MC/X86/x86_operands.s index b34713d..2258a95 100644 --- a/test/MC/X86/x86_operands.s +++ b/test/MC/X86/x86_operands.s @@ -52,6 +52,11 @@ call *%eax # CHECK: calll *4(%eax) call *4(%eax) +foo: + calll foo() +# CHECK: calll foo{{$}} + calll foo(,) +# CHECK: calll foo{{$}} # CHECK: movl %gs:8, %eax movl %gs:8, %eax |