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* ARM assembly parsing and encoding support for USAT and USAT16.Jim Grosbach2011-07-272-3/+31
| | | | | | | Use range checked immediate operands for instructions. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136285 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for USAD8 and USADA8.Jim Grosbach2011-07-271-0/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136284 91177308-0d34-0410-b5e6-96231b3b80d8
* Code generation for 'fence' instruction.Eli Friedman2011-07-2716-3/+119
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8.Jim Grosbach2011-07-271-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136282 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment copy/paste-o.Jim Grosbach2011-07-271-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136281 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UQASX and UQSAX.Jim Grosbach2011-07-271-0/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136280 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UQADD16 and UQADD8.Jim Grosbach2011-07-271-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136279 91177308-0d34-0410-b5e6-96231b3b80d8
* Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.Jakub Staszak2011-07-275-30/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136278 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding for UMULL.Jim Grosbach2011-07-272-1/+15
| | | | | | | Fix parsing of the 's' suffix for the mnemonic. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove outdated FIXME comment.Devang Patel2011-07-271-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136275 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding for UMLAL.Jim Grosbach2011-07-272-1/+15
| | | | | | | Fix parsing of the 's' suffix for the mnemonic. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136274 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UMAAL.Jim Grosbach2011-07-271-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136272 91177308-0d34-0410-b5e6-96231b3b80d8
* Refuse to inline two functions which use different personality functions.Bill Wendling2011-07-271-0/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136269 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8.Jim Grosbach2011-07-271-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136267 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX.Jim Grosbach2011-07-271-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136266 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM parsing and encoding of SBFX and UBFX.Jim Grosbach2011-07-2710-23/+48
| | | | | | | | | | Encode the width operand as it encodes in the instruction, which simplifies the disassembler and the encoder, by using the imm1_32 operand def. Add a diagnostic for the context-sensitive constraint that the width must be in the range [1,32-lsb]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep enums stable. Append EH stuff to the end.Bill Wendling2011-07-271-49/+52
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136263 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for UADD16, UADD8 and UASX.Jim Grosbach2011-07-271-0/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136261 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for TST instruction.Jim Grosbach2011-07-271-0/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136260 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding tests for TEQ instruction.Jim Grosbach2011-07-271-0/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136259 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the STRT and STRBT instructions to distinguish between the ↵Owen Anderson2011-07-272-2/+31
| | | | | | register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136255 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge the contents from exception-handling-rewrite to the mainline.Bill Wendling2011-07-2727-106/+742
| | | | | | | This adds the new instructions 'landingpad' and 'resume'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136253 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing and encoding for extend instructions.Jim Grosbach2011-07-274-0/+229
| | | | | | | | Assembly parser handling for extend instruction rotate operands. Add tests for the sign extend instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136252 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the ConstantMerge pass about alignment. Fixes PR10514!Nick Lewycky2011-07-272-10/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136250 91177308-0d34-0410-b5e6-96231b3b80d8
* X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any ↵Eli Friedman2011-07-271-1/+1
| | | | | | code, and all x86 processors will honor the required semantics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136249 91177308-0d34-0410-b5e6-96231b3b80d8
* The numbering of LLVMOpcode is supposed to be stable; revert my earlier ↵Eli Friedman2011-07-271-24/+26
| | | | | | change, and append Fence onto the end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136245 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test cases for BlockFrequency.Jakub Staszak2011-07-271-0/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136244 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a generic 'capacity_in_bytes' function to allow inspection of memory ↵Ted Kremenek2011-07-273-6/+47
| | | | | | usage of various data structures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136233 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing aliases for extend instructions w/o rotate.Jim Grosbach2011-07-271-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136229 91177308-0d34-0410-b5e6-96231b3b80d8
* Update document listing DIVariable elements to reflect recent changes.Devang Patel2011-07-271-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136228 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM cleanup of remaining extend instructions.Jim Grosbach2011-07-272-171/+122
| | | | | | | | | Refactor the rest of the extend instructions to not artificially distinguish between a rotate of zero and a rotate of any other value. Replace the by-zero versions with Pat<>'s for ISel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136226 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM extend instructions simplification.Jim Grosbach2011-07-275-89/+87
| | | | | | | | | Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not have an 'r' and an 'r_rot' version, but just a single version with a rotate that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136225 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize 96-bit division a little bit.Jakub Staszak2011-07-271-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136222 91177308-0d34-0410-b5e6-96231b3b80d8
* Move static methods to the anonymous namespace.Jakub Staszak2011-07-272-5/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136221 91177308-0d34-0410-b5e6-96231b3b80d8
* Edge to itself is backedge as well.Jakub Staszak2011-07-271-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136219 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim includes.Frits van Bommel2011-07-271-12/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136218 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CMake build for new gtest file.Frits van Bommel2011-07-271-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136215 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some code that is no longer needed now that googletest knows howJay Foad2011-07-271-17/+0
| | | | | | to print STL containers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136213 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge gtest-1.6.0.Jay Foad2011-07-2728-1356/+3498
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136212 91177308-0d34-0410-b5e6-96231b3b80d8
* Explicitly cast narrowing conversions inside {}s that will become errors inJeffrey Yasskin2011-07-276-6/+8
| | | | | | C++0x. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136211 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r136156, which broke several buildbots.Dan Gohman2011-07-271-1/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136206 91177308-0d34-0410-b5e6-96231b3b80d8
* Misc mid-level changes for new 'fence' instruction.Eli Friedman2011-07-275-5/+41
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136205 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor simplification.Eli Friedman2011-07-271-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136202 91177308-0d34-0410-b5e6-96231b3b80d8
* Move some code around to open opportunity for more shuffle matchingBruno Cardoso Lopes2011-07-271-18/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136201 91177308-0d34-0410-b5e6-96231b3b80d8
* The vpermilps and vpermilpd have different behaviour regarding theBruno Cardoso Lopes2011-07-275-32/+156
| | | | | | | | | usage of the shuffle bitmask. Both work in 128-bit lanes without crossing, but in the former the mask of the high part is the same used by the low part while in the later both lanes have independent masks. Handle this properly and and add support for vpermilpd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136200 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more dead code!Bruno Cardoso Lopes2011-07-271-15/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136199 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix AliasSetTracker so that it doesn't make any assumptions about ↵Eli Friedman2011-07-273-70/+68
| | | | | | instructions it doesn't know about (like the atomic instructions I'm adding). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136198 91177308-0d34-0410-b5e6-96231b3b80d8
* Support .code32 and .code64 in X86 assembler.Evan Cheng2011-07-2711-20/+72
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136197 91177308-0d34-0410-b5e6-96231b3b80d8
* It is quiet possible that inlined function body is split into multiple ↵Devang Patel2011-07-272-16/+181
| | | | | | chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136196 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove these two directories. The tests can be ported to dragonegg ifEric Christopher2011-07-2737-328/+0
| | | | | | | they're still wanted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136193 91177308-0d34-0410-b5e6-96231b3b80d8
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