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path: root/lib/CodeGen/LiveIntervalAnalysis.cpp
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* Modified VNInfo. The "copy" member is now a union which holds the copy for a ...Lang Hames2009-08-101-10/+10
* Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.Evan Cheng2009-08-051-5/+27
* Re-apply LiveInterval index dumping patch, with fixes suggested by BillDavid Greene2009-08-031-0/+6
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-0/+1
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-5/+5
* Move to raw_ostream.Daniel Dunbar2009-07-241-2/+2
* Constify the key in Mi2IndexMap.David Greene2009-07-221-1/+1
* revert r76602, 76603, and r76615, pending design discussions.Chris Lattner2009-07-211-2/+9
* Prefix IR dumps with LiveInterval indices when possible. This turnsDavid Greene2009-07-211-9/+2
* Simplify the coalescer (finally!) by making LiveIntervals::processImplicitDef...Evan Cheng2009-07-171-33/+44
* Changed my mind. We now allow remat of instructions whose defs have subreg in...Evan Cheng2009-07-161-5/+0
* Let callers decide the sub-register index on the def operand of rematerialize...Evan Cheng2009-07-161-1/+6
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Edwin Török2009-07-141-1/+1
* assert(0) -> LLVM_UNREACHABLE.Edwin Török2009-07-111-1/+1
* Convert more assert(0)+abort() -> LLVM_UNREACHABLE,Edwin Török2009-07-111-4/+8
* Avoid compiler warnings if assertions turned off.Duncan Sands2009-07-101-0/+2
* Improved tracking of value number kills. VN kills are now representedLang Hames2009-07-091-18/+76
* Remove special handling of implicit_def. Fix a couple more bugs in liveinterv...Evan Cheng2009-07-011-24/+51
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-011-2/+91
* Add a bit IsUndef to MachineOperand. This indicates the def / use register op...Evan Cheng2009-06-301-1/+5
* When doing remat, don't consider uses of non-allocatable physregs. Patch Chris Lattner2009-06-271-0/+4
* More VNInfo tweaking, plus a little progress on intra-block splitting.Lang Hames2009-06-191-2/+4
* Improved PHI def marking, replaced some gotos with breaks.Lang Hames2009-06-181-5/+7
* VNInfo cleanup.Lang Hames2009-06-171-26/+27
* Move register allocation preference (or hint) from LiveInterval to MachineReg...Evan Cheng2009-06-141-1/+1
* Update to in-place spilling framework. Includes live interval scaling and tri...Lang Hames2009-06-021-0/+44
* LiveVariables::VarInfo contains an AliveBlocks BitVector, which has as manyJeffrey Yasskin2009-05-261-5/+5
* In some rare cases, the register allocator can spill registers but end up not...Evan Cheng2009-05-031-48/+10
* Fix PR4076. Correctly create live interval of physical register with two-addr...Evan Cheng2009-04-271-10/+20
* Fix PR4056. It's possible a physical register def is dead if its implicit use...Evan Cheng2009-04-271-2/+2
* It has finally happened. Spiller is now using live interval info.Evan Cheng2009-04-211-3/+3
* Added a linearscan register allocation optimization. When the register alloca...Evan Cheng2009-04-201-11/+0
* Don't abort on an aliasing physical register that does not haveDan Gohman2009-04-131-1/+1
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-091-1/+1
* Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman2009-04-081-1/+5
* Don't assign a new stack slot if the pre-alloc splitter already assigned one.Owen Anderson2009-03-261-2/+9
* Fix PR3391 and PR3864. Reg allocator infinite looping.Evan Cheng2009-03-231-4/+8
* Model inline asm constraint which ties an input to an output register as mach...Evan Cheng2009-03-231-4/+6
* Fix the Win32 VS2008 build:Sebastian Redl2009-03-191-1/+1
* Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng2009-03-191-6/+2
* Fix how livein live intervals are handled. Previously it could end at MBB sta...Evan Cheng2009-03-051-4/+9
* Fix PR3486. Fix a bug in code that manually patch physical register live inte...Evan Cheng2009-02-081-2/+9
* Exit with nice warnings when register allocator run out of registers.Evan Cheng2009-01-291-1/+13
* Change TargetInstrInfo::isMoveInstr to return source and destination sub-regi...Evan Cheng2009-01-201-10/+10
* The coalescer does not coalesce a virtual register to a physical register if ...Evan Cheng2009-01-071-3/+49
* Fix PR3149. If an early clobber def is a physical register and it is tied to ...Evan Cheng2008-12-191-7/+9
* Clarify some comments.Dan Gohman2008-12-081-2/+2
* Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from constp...Evan Cheng2008-12-051-9/+11
* Fix comment.Evan Cheng2008-12-051-1/+1
* Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.Dan Gohman2008-12-051-1/+1