external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Simplify logic now that r182490 is in place. No functional change intended.	Chad Rosier	2013-05-22	1	-10/+8
*	Remove special-casing of return blocks for liveness.	Jakob Stoklund Olesen	2013-02-05	1	-19/+5
*	Use MachineInstrBuilder in a few CodeGen passes.	Jakob Stoklund Olesen	2012-12-20	1	-5/+3
*	Use the new script to sort the includes of every file under lib.	Chandler Carruth	2012-12-03	1	-11/+11
*	misched: Don't consider artificial edges weak edges.	Andrew Trick	2012-11-13	1	-1/+1
*	misched: Infrastructure for weak DAG edges.	Andrew Trick	2012-11-12	1	-7/+7
*	Switch most getReservedRegs() clients to the MRI equivalent.	Jakob Stoklund Olesen	2012-10-15	1	-3/+2
*	Release build: guard dump functions with	Manman Ren	2012-09-11	1	-1/+1
*	Release build: guard dump functions with "ifndef NDEBUG"	Manman Ren	2012-09-06	1	-0/+2
*	Add a getName function to MachineFunction. Use it in places that previously d...	Craig Topper	2012-08-22	1	-1/+1
*	Move RegisterClassInfo.h.	Andrew Trick	2012-06-06	1	-1/+1
*	Remove unused private fields found by clang's new -Wunused-private-field.	Benjamin Kramer	2012-06-06	1	-1/+0
*	Switch all register list clients to the new MC*Iterator interface.	Jakob Stoklund Olesen	2012-06-01	1	-19/+13
*	This patch fixes a problem which arose when using the Post-RA scheduler	Preston Gurd	2012-04-23	1	-0/+4
*	misched interface: rename Begin/End to RegionBegin/RegionEnd since they are n...	Andrew Trick	2012-03-09	1	-7/+7
*	misched prep: Expose the ScheduleDAGInstrs interface so targets may	Andrew Trick	2012-03-07	1	-1/+1
*	misched prep: rename InsertPos to End.	Andrew Trick	2012-03-07	1	-8/+8
*	misched preparation: rename core scheduler methods for consistency.	Andrew Trick	2012-03-07	1	-17/+17
*	misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.	Andrew Trick	2012-03-07	1	-12/+38
*	misched preparation: modularize schedule emission.	Andrew Trick	2012-03-07	1	-0/+36
*	misched preparation: modularize schedule printing.	Andrew Trick	2012-03-07	1	-0/+18
*	misched preparation: modularize schedule verification.	Andrew Trick	2012-03-07	1	-2/+8
*	Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati...	Craig Topper	2012-03-05	1	-6/+6
*	BitVectorize loop.	Benjamin Kramer	2012-02-23	1	-3/+1
*	post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored t...	Benjamin Kramer	2012-02-23	1	-28/+22
*	post-ra-sched: Replace a std::set of regs with a bitvector.	Benjamin Kramer	2012-02-23	1	-5/+4
*	Make calls scheduling boundaries post-ra.	Jakob Stoklund Olesen	2012-02-23	1	-1/+4
*	Handle regmasks in FixupKills.	Jakob Stoklund Olesen	2012-02-23	1	-0/+4
*	Make all pointers to TargetRegisterClass const since they are all pointers to...	Craig Topper	2012-02-22	1	-3/+3
*	Codegen pass definition cleanup. No functionality.	Andrew Trick	2012-02-08	1	-12/+5
*	Move pass configuration out of pass constructors: PostRAScheduler.	Andrew Trick	2012-02-08	1	-6/+8
*	misched: Added ScheduleDAGInstrs::IsPostRA	Andrew Trick	2012-01-14	1	-1/+1
*	- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function	Evan Cheng	2011-12-14	1	-1/+4
*	Add bundle aware API for querying instruction properties and switch the code	Evan Cheng	2011-12-07	1	-1/+1
*	Remove all remaining uses of Value::getNameStr().	Benjamin Kramer	2011-11-15	1	-2/+2
*	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	Evan Cheng	2011-07-01	1	-12/+13
*	Teach antidependency breakers to use RegisterClassInfo.	Jakob Stoklund Olesen	2011-06-16	1	-5/+10
*	Update DBG_VALUEs while breaking anti dependencies.	Devang Patel	2011-06-02	1	-1/+1
*	Add an issue width check to the postRA scheduler. Patch by Max Kazakov!	Andrew Trick	2011-06-01	1	-0/+6
*	Typo: Reviewed by Alistair.	Andrew Trick	2011-05-06	1	-1/+1
*	Post-RA scheduler compile time fix. Quadratic computation of DAG node depth.	Andrew Trick	2011-05-06	1	-4/+10
*	Various bits of framework needed for precise machine-level selection	Andrew Trick	2010-12-24	1	-37/+37
*	Teach if-converter to be more careful with predicating instructions that would	Evan Cheng	2010-09-10	1	-1/+1
*	Reapply r110396, with fixes to appease the Linux buildbot gods.	Owen Anderson	2010-08-06	1	-1/+1
*	Revert r110396 to fix buildbots.	Owen Anderson	2010-08-06	1	-1/+1
*	Don't use PassInfo* as a type identifier for passes. Instead, use the addres...	Owen Anderson	2010-08-05	1	-1/+1
*	Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.	Bill Wendling	2010-07-15	1	-2/+3
*	Allow ARM if-converter to be run after post allocation scheduling.	Evan Cheng	2010-06-18	1	-24/+4
*	- Do away with SimpleHazardRecognizer.h. It's not used and offers little value.	Evan Cheng	2010-06-14	1	-25/+0
*	Allow target to provide its own hazard recognizer to post-ra scheduler.	Evan Cheng	2010-06-12	1	-6/+16