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path: root/lib/Target/ARM/ARMBaseRegisterInfo.cpp
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* Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions.Craig Topper2012-03-251-1/+0
* remove unused variableMatt Beaumont-Gay2012-03-201-1/+0
* Require a base pointer for stack realignment when SP may vary dynamically.Bob Wilson2012-03-201-2/+3
* Remove some redundant checks.Bob Wilson2012-03-201-2/+1
* Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper2012-03-171-1/+1
* Split fpscr into two registers: FPSCR and FPSCR_NZCV.Lang Hames2012-03-061-0/+1
* Use uint16_t instead of unsigned to store registers in reg classes. Reduces s...Craig Topper2012-03-041-13/+13
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-041-1/+1
* Enable ARM base pointer when calling functions with large arguments.Jakob Stoklund Olesen2012-02-281-1/+21
* Remove extra semi-colons.Chad Rosier2012-02-221-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE ba...Lang Hames2012-02-171-1/+0
* Oop - r150653 + r150654 broke one of my test cases. Backing out for now...Lang Hames2012-02-161-0/+1
* FPSCR shouldn't be reserved.Lang Hames2012-02-161-1/+0
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-4/+0
* Implement ARMBaseRegisterInfo::getCallPreservedMask().Jakob Stoklund Olesen2012-01-171-19/+5
* Reapply r146997, "Heed spill slot alignment on ARM."Jakob Stoklund Olesen2012-01-051-1/+1
* Avoid reserving an ARM base pointer during register allocation.Jakob Stoklund Olesen2012-01-051-2/+17
* Revert r146997, "Heed spill slot alignment on ARM."Jakob Stoklund Olesen2012-01-031-1/+1
* Heed spill slot alignment on ARM.Jakob Stoklund Olesen2011-12-201-1/+1
* ARM target code clean up. Check for iOS, not Darwin where it makes sense.Evan Cheng2011-12-201-3/+3
* Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen2011-12-191-98/+0
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-2/+2
* Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(Chad Rosier2011-10-201-2/+5
* Add support for dynamic stack realignment when in thumb1 mode.Chad Rosier2011-10-181-5/+2
* Revert r141529. This is causing failures in the test-suite, like bigstack and...Bill Wendling2011-10-111-11/+2
* When getting the number of bits necessary for addressing modeBill Wendling2011-10-101-2/+11
* Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions."Chad Rosier2011-10-011-2/+5
* Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact Chad Rosier2011-10-011-5/+2
* Store sub-class lists as a bit vector.Jakob Stoklund Olesen2011-09-301-1/+1
* Tidy up a bit.Jim Grosbach2011-09-131-152/+78
* Change ARM / Thumb2 addc / adde and subc / sube modeling to use physicalEvan Cheng2011-08-301-0/+7
* Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach2011-08-241-3/+3
* Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands2011-08-121-0/+1
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A...Evan Cheng2011-07-201-1/+1
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-13/+1
* Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previ...Frits van Bommel2011-07-181-12/+12
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
* Remove redundant Thumb2 ADD/SUB SP instruction definitions.Jim Grosbach2011-06-291-4/+0
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+1
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-5/+5
* More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.Evan Cheng2011-06-271-1/+1
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+3
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-3/+4
* Reserve D16-D13 on subtargets that don't support them.Jakob Stoklund Olesen2011-06-181-0/+6
* Explicitly invoke ArrayRef constructor to keep gcc happy.Jakob Stoklund Olesen2011-06-171-12/+12
* Rename TRI::getAllocationOrder() to getRawAllocationOrder().Jakob Stoklund Olesen2011-06-161-38/+22
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+4