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path: root/lib/Target/ARM/ARMISelLowering.cpp
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* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-271-4/+4
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-4/+4
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-261-2/+2
* Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.James Molloy2012-09-261-2/+2
* Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byteEvan Cheng2012-09-181-5/+9
* This patch introduces A15 as a target in LLVM.Silviu Baranga2012-09-131-1/+1
* Set operation action for FFLOOR to Expand for all vector types for X86. Set F...Craig Topper2012-09-081-0/+1
* Custom DAGCombine for and/or/xor are for all ARMs.Jakob Stoklund Olesen2012-09-071-6/+3
* Fix self-host; ensure signedness is consistent.James Molloy2012-09-061-2/+2
* Improve codegen for BUILD_VECTORs on ARM.James Molloy2012-09-061-10/+56
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-09-041-0/+156
* Fix a couple of typos in EmitAtomic.Jakob Stoklund Olesen2012-08-311-2/+2
* Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock.Jakob Stoklund Olesen2012-08-201-3/+2
* Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen2012-08-181-51/+0
* Also combine zext/sext into selects for ARM.Jakob Stoklund Olesen2012-08-181-47/+84
* Also pass logical ops to combineSelectAndUse.Jakob Stoklund Olesen2012-08-181-9/+42
* Add comment, clean up code. No functional change.Jakob Stoklund Olesen2012-08-171-30/+39
* Handle ARM MOVCC optimization in PeepholeOptimizer.Jakob Stoklund Olesen2012-08-161-48/+0
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-151-0/+48
* Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una...Evan Cheng2012-08-151-0/+2
* Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISD...Nadav Rotem2012-08-131-1/+5
* Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer2012-08-121-156/+0
* Change addTypeForNeon to use MVT instead of EVT so all the calls to getSimple...Craig Topper2012-08-121-48/+43
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-08-091-0/+156
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-2/+3
* Add support for the ARM GHC calling convention, this patch was in 3.0,Eric Christopher2012-08-031-0/+2
* ARM: Don't assume an SDNode is a constant.Jim Grosbach2012-07-251-0/+4
* Fix ARMTargetLowering::isLegalAddImmediate to consider thumb encodings.Andrew Trick2012-07-181-4/+11
* whitespaceAndrew Trick2012-07-181-2/+2
* ARM: use NOEN loads and stores if possible when handling struct byval.Manman Ren2012-06-181-8/+42
* ARM: optimization for sub+abs.Manman Ren2012-06-151-11/+6
* Re-enable the CMN instruction.Bill Wendling2012-06-111-0/+1
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-011-246/+268
* ARM: support struct byval in llvmManman Ren2012-06-011-15/+262
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-251-9/+16
* Use the right register class for LDRrs.Jakob Stoklund Olesen2012-05-201-1/+1
* Add a new target hook "predictableSelectIsExpensive".Benjamin Kramer2012-05-051-0/+3
* Pacify GCC's -Wreturn-typeMatt Beaumont-Gay2012-05-041-0/+1
* Make ARM and Mips use TargetMachine::getTLSModel()Hans Wennborg2012-05-041-8/+15
* Don't introduce illegal types when creating vmull operations. <rdar://11324364>Bob Wilson2012-04-301-1/+3
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-69/+74
* Handle llvm.fma.* intrinsics. rdar://10914096Evan Cheng2012-04-101-2/+4
* Fix a long standing tail call optimization bug. When a libcall is emittedEvan Cheng2012-04-101-33/+42
* When performing a truncating store, it's possible to rearrange the data Chad Rosier2012-04-091-1/+85
* Update comments and remove unnecessary isVolatile() check.Chad Rosier2012-04-091-3/+5
* Tidy up. 80 columns.Jim Grosbach2012-04-061-1/+2
* There is no portable std::abs overload for int64_t, use the llvm::abs64Chandler Carruth2012-04-061-2/+2
* Allow negative immediates in ARM and Thumb2 compares.Jakob Stoklund Olesen2012-04-061-2/+4
* Always compute all the bits in ComputeMaskedBits.Rafael Espindola2012-04-041-7/+4
* ARM target should allow codegenprep to duplicate ret instructions to enable t...Evan Cheng2012-03-301-1/+1