| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove incorrect pattern for ARM SMML instruction. | Tim Northover | 2012-05-17 | 1 | -2/+1 |
| * | Added the missing bit definition for the 4th bit of the STR (post reg) instru... | Silviu Baranga | 2012-05-11 | 1 | -0/+3 |
| * | ARM: improved assembler diagnostics for missing CPU features. | Jim Grosbach | 2012-04-24 | 1 | -20/+26 |
| * | Tidy up. 80 columns, whitespace, et. al. | Jim Grosbach | 2012-04-23 | 1 | -31/+37 |
| * | ARM let TableGen handle a few two-operand aliases. | Jim Grosbach | 2012-04-19 | 1 | -121/+9 |
| * | Added support for disassembling unpredictable swp/swpb ARM instructions. | Silviu Baranga | 2012-04-18 | 1 | -2/+2 |
| * | Fix the bahavior of the disassembler when decoding unpredictable mrs instruct... | Silviu Baranga | 2012-04-18 | 1 | -5/+15 |
| * | Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ... | Silviu Baranga | 2012-04-18 | 1 | -4/+6 |
| * | Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocess... | Silviu Baranga | 2012-04-18 | 1 | -1/+6 |
| * | Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instruct... | Silviu Baranga | 2012-04-18 | 1 | -2/+10 |
| * | Typo. | Chad Rosier | 2012-04-17 | 1 | -1/+1 |
| * | On Darwin targets, only use vfma etc. if the source use fma() intrinsic expli... | Evan Cheng | 2012-04-13 | 1 | -2/+5 |
| * | Clean up ARM fused multiply + add/sub support some more: rename some isel | Evan Cheng | 2012-04-11 | 1 | -6/+4 |
| * | Fix a number of problems with ARM fused multiply add/subtract instructions. | Evan Cheng | 2012-04-11 | 1 | -2/+5 |
| * | ARMPat is equivalent to Requires<[IsARM]>. | Jakob Stoklund Olesen | 2012-04-06 | 1 | -3/+2 |
| * | Eliminate iOS-specific tail call instructions. | Jakob Stoklund Olesen | 2012-04-06 | 1 | -54/+17 |
| * | Deduplicate ARM call-related instructions. | Jakob Stoklund Olesen | 2012-04-06 | 1 | -63/+9 |
| * | Added support for unpredictable ADC/SBC instructions on ARM, and also fixed s... | Silviu Baranga | 2012-04-05 | 1 | -4/+4 |
| * | Added support for handling unpredictable arithmetic instructions on ARM. | Silviu Baranga | 2012-04-05 | 1 | -0/+2 |
| * | Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr. | Jakob Stoklund Olesen | 2012-04-04 | 1 | -0/+3 |
| * | ARM assembly 'cmp lr, #0' should not encode using 'cmn'. | Jim Grosbach | 2012-03-29 | 1 | -1/+2 |
| * | Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR... | Silviu Baranga | 2012-03-22 | 1 | -2/+4 |
| * | Added soft fail cases for the disassembler when decoding MUL instructions on ... | Silviu Baranga | 2012-03-22 | 1 | -5/+6 |
| * | Change conditional instructions definitions, e.g. ANDCC, ARMPseudoExpand and ... | Evan Cheng | 2012-03-20 | 1 | -64/+33 |
| * | The ARM instructions that have an unpredictable behavior when the pc register... | Silviu Baranga | 2012-03-20 | 1 | -2/+2 |
| * | Test Commit - add a newline | Richard Barton | 2012-03-20 | 1 | -0/+1 |
| * | ARM optional operand on MRC/MCR assembly instructions. | Jim Grosbach | 2012-03-16 | 1 | -0/+12 |
| * | ARM pre-v6 assembly parsing for umull/smull. | Jim Grosbach | 2012-03-07 | 1 | -0/+10 |
| * | ARM pre-v6 alias for 'nop' to 'mov r0, r0' | Jim Grosbach | 2012-03-07 | 1 | -0/+4 |
| * | updated patch for the ARM fused multiply add/sub | Sebastian Pop | 2012-03-05 | 1 | -3/+3 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 1 | -0/+19 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 1 | -19/+0 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 1 | -0/+19 |
| * | ARM BL/BLX instruction fixups should use relocations. | Jim Grosbach | 2012-02-27 | 1 | -3/+1 |
| * | Switch ARM target to register masks. | Jakob Stoklund Olesen | 2012-02-24 | 1 | -18/+6 |
| * | Optimize a couple of common patterns involving conditional moves where the false | Evan Cheng | 2012-02-23 | 1 | -0/+67 |
| * | ARM assemly parsing and validation of IT instruction. | Jim Grosbach | 2012-01-25 | 1 | -0/+4 |
| * | Use correct register class for am2offset register operands. | Anton Korobeynikov | 2012-01-24 | 1 | -2/+2 |
| * | Add missed mayStore flag to STREXD / t2STREXD | Anton Korobeynikov | 2012-01-23 | 1 | -3/+3 |
| * | Add fused multiple+add instructions from VFPv4. | Anton Korobeynikov | 2012-01-22 | 1 | -0/+6 |
| * | Use RegisterTuples to generate pseudo-registers. | Jakob Stoklund Olesen | 2012-01-13 | 1 | -7/+14 |
| * | Add variants of the dispatchsetup pseudo for Thumb and !VFP. <rdar://10620138> | Bob Wilson | 2011-12-22 | 1 | -5/+10 |
| * | Add missing usesCustomInserter flag on Int_eh_sjlj_setjmp_nofp. | Bob Wilson | 2011-12-22 | 1 | -1/+1 |
| * | Fix a couple of copy-n-paste bugs. Noticed by George Russell! | Chad Rosier | 2011-12-21 | 1 | -4/+4 |
| * | Fix a couple of copy-n-paste bugs. Noticed by George Russell. | Evan Cheng | 2011-12-21 | 1 | -2/+2 |
| * | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng | 2011-12-20 | 1 | -36/+36 |
| * | Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930. | Bob Wilson | 2011-12-20 | 1 | -2/+5 |
| * | Fix copy/pasto that skipped the 'modify' step. | Jim Grosbach | 2011-12-14 | 1 | -4/+4 |
| * | ARM/Thumb2 mov vs. mvn alias goes both ways. | Jim Grosbach | 2011-12-14 | 1 | -0/+2 |
| * | ARM/Thumb2 'cmp rn, #imm' alias to cmn. | Jim Grosbach | 2011-12-14 | 1 | -0/+5 |
