| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update aosp/master llvm for rebase to r233350 | Pirama Arumuga Nainar | 2015-04-09 | 1 | -1/+1 |
| * | Update aosp/master LLVM for rebase to r222494. | Stephen Hines | 2014-12-02 | 1 | -2/+2 |
| * | Update to LLVM 3.5a. | Stephen Hines | 2014-04-24 | 1 | -2/+0 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -3/+3 |
| * | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper | 2012-03-17 | 1 | -2/+1 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_... | David Blaikie | 2011-12-20 | 1 | -0/+1 |
| * | Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums | Jakob Stoklund Olesen | 2010-05-24 | 1 | -13/+0 |
| * | Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE | Evan Cheng | 2010-05-14 | 1 | -1/+2 |
| * | Added a QQQQ register file to model 4-consecutive Q registers. | Evan Cheng | 2010-05-14 | 1 | -3/+4 |
| * | Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coa... | Evan Cheng | 2010-05-06 | 1 | -1/+2 |
| * | Revert r103156 since it was breaking the build bots. | Eric Christopher | 2010-05-06 | 1 | -2/+1 |
| * | Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registe... | Evan Cheng | 2010-05-06 | 1 | -1/+2 |
| * | Add codegen support for NEON vld2 operations on quad registers. | Bob Wilson | 2009-10-06 | 1 | -0/+10 |
| * | Push methods into base class in preparation for sharing. | David Goodwin | 2009-07-08 | 1 | -28/+2 |
| * | Start breaking out common base functionality for register info. | David Goodwin | 2009-07-08 | 1 | -86/+1 |
| * | Simplify a bit | Anton Korobeynikov | 2009-06-27 | 1 | -7/+16 |
| * | ARM refactoring. Step 2: split RegisterInfo | Anton Korobeynikov | 2009-06-27 | 1 | -31/+41 |
| * | - Update register allocation hint after coalescing. This is done by the targe... | Evan Cheng | 2009-06-18 | 1 | -1/+4 |
| * | Part 1. | Evan Cheng | 2009-06-15 | 1 | -7/+27 |
| * | PR2985 / <rdar://problem/6584986> | Jim Grosbach | 2009-04-07 | 1 | -0/+2 |
| * | Remove refs to non-DebugLoc versions of BuildMI from ARM. | Dale Johannesen | 2009-02-13 | 1 | -1/+2 |
| * | Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. | Evan Cheng | 2009-02-06 | 1 | -0/+4 |
| * | Fix encoding of single-precision VFP registers. | Evan Cheng | 2008-11-12 | 1 | -0/+4 |
| * | Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. | Evan Cheng | 2008-03-31 | 1 | -3/+8 |
| * | Rename MRegisterInfo to TargetRegisterInfo. | Dan Gohman | 2008-02-10 | 1 | -2/+2 |
| * | Move even more functionality from MRegisterInfo into TargetInstrInfo. | Owen Anderson | 2008-01-07 | 1 | -13/+2 |
| * | Move some more functionality from MRegisterInfo to TargetInstrInfo. | Owen Anderson | 2008-01-04 | 1 | -8/+0 |
| * | Move some more instruction creation methods from RegisterInfo into InstrInfo. | Owen Anderson | 2008-01-01 | 1 | -25/+0 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+1 |
| * | Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether | Evan Cheng | 2007-12-05 | 1 | -2/+5 |
| * | Remove redundant foldMemoryOperand variants and other code clean up. | Evan Cheng | 2007-12-02 | 1 | -13/+3 |
| * | Allow some reloads to be folded in multi-use cases. Specifically testl r, r -... | Evan Cheng | 2007-12-01 | 1 | -0/+12 |
| * | Add parameter to getDwarfRegNum to permit targets | Dale Johannesen | 2007-11-13 | 1 | -1/+1 |
| * | Use TableGen to emit information for dwarf register numbers. | Anton Korobeynikov | 2007-11-11 | 1 | -0/+2 |
| * | - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but o... | Evan Cheng | 2007-10-18 | 1 | -2/+2 |
| * | Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister p... | Evan Cheng | 2007-10-18 | 1 | -4/+4 |
| * | - Added a few target hooks to generate load / store instructions from / to any | Evan Cheng | 2007-10-05 | 1 | -0/+10 |
| * | Allow copyRegToReg to emit cross register classes copies. | Evan Cheng | 2007-09-26 | 1 | -1/+2 |
| * | Add a variant of foldMemoryOperand to fold any load / store, not just load / ... | Evan Cheng | 2007-08-30 | 1 | -0/+5 |
| * | Change instruction description to split OperandList into OutOperandList and | Evan Cheng | 2007-07-19 | 1 | -2/+2 |
| * | Long live the exception handling! | Anton Korobeynikov | 2007-07-14 | 1 | -2/+3 |
| * | eliminateFrameIndex() change. | Evan Cheng | 2007-05-01 | 1 | -1/+1 |
| * | Under normal circumstances, when a frame pointer is not required, we reserve | Evan Cheng | 2007-05-01 | 1 | -0/+2 |
| * | Added MRegisterInfo hook to re-materialize an instruction. | Evan Cheng | 2007-03-20 | 1 | -0/+3 |
| * | Scavenge a register using the register scavenger when needed. | Evan Cheng | 2007-03-06 | 1 | -6/+4 |
| * | Make requiresRegisterScavenging determination on a per MachineFunction basis. | Evan Cheng | 2007-02-28 | 1 | -1/+1 |
| * | PEI now passes a RegScavenger ptr to eliminateFrameIndex. | Evan Cheng | 2007-02-28 | 1 | -3/+4 |
| * | Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve re... | Evan Cheng | 2007-02-27 | 1 | -3/+8 |
| * | Add option to turn on register scavenger; By default, spills kills the regist... | Evan Cheng | 2007-02-23 | 1 | -0/+2 |
