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* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-041-5/+0
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ...Craig Topper2013-07-041-1/+1
* Revert r185595-185596 which broke buildbots.Jakob Stoklund Olesen2013-07-041-0/+5
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-031-5/+0
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ...Craig Topper2013-07-032-3/+3
* [mips] Add new InstrItinClasses for move from/to coprocessor instructions andAkira Hatanaka2013-07-024-56/+70
* [mips] Reverse the order of source operands of shift and rotate instructions ...Akira Hatanaka2013-07-012-8/+8
* [mips] Increase the number of floating point control registers available to 32.Akira Hatanaka2013-07-011-4/+9
* [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getRegChad Rosier2013-06-261-1/+4
* [mips] Do not emit ".option pic0" if target is mips64.Akira Hatanaka2013-06-261-1/+1
* [mips] Improve code generation for constant multiplication using shifts, adds...Akira Hatanaka2013-06-261-0/+54
* This patch introduces RegisterOperand class into Mips FPU instruction defini...Vladimir Medic2013-06-243-87/+157
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-222-2/+2
* Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU r...Vladimir Medic2013-06-201-48/+58
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-193-5/+8
* The RenderMethod field in RegisterOperand class sets the name of the method o...Vladimir Medic2013-06-192-19/+10
* Mips ELF: Mark object file as ABI compliant Jack Carter2013-06-182-0/+13
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-184-12/+12
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-164-25/+0
* Mips: Remove global set.Benjamin Kramer2013-06-132-57/+68
* Fix CMakeLists.Akira Hatanaka2013-06-111-0/+1
* [mips] Add an IR transformation pass that optimizes calls to sqrt.Akira Hatanaka2013-06-113-1/+177
* [mips] Use function TargetInstrInfo::getRegClass.Akira Hatanaka2013-06-112-6/+9
* Fix a regression I introduced when I expanded the complex pseudos inReed Kotler2013-06-092-9/+10
* [mips] Use a helper function which compares the size of the source andAkira Hatanaka2013-06-082-8/+21
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-0711-40/+67
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-063-5/+5
* [mips] brcond + setgt/setugt instruction selection patterns.Akira Hatanaka2013-06-051-0/+4
* Test commit for user vmedic, to verify commit access. One line of comment is ...Vladimir Medic2013-06-041-1/+1
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-311-10/+10
* [mips] Big-endian code generation for atomic instructions.Akira Hatanaka2013-05-311-2/+16
* Order CALLSEQ_START and CALLSEQ_END nodes.Andrew Trick2013-05-291-2/+2
* Mips assembler: Improve set register alias handlingJack Carter2013-05-281-5/+28
* Make helper functions static.Rafael Espindola2013-05-274-113/+65
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-257-71/+71
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-242-2/+2
* Remove the Copied parameter from MemoryObject::readBytes.Benjamin Kramer2013-05-241-1/+1
* Mips16 does not use register scavenger from TargetRegisterInfo. It allocatesReed Kotler2013-05-211-2/+2
* [mips] Rename option to make it compatible with gcc.Akira Hatanaka2013-05-211-1/+1
* [mips] Add instruction selection patterns for blez and bgez.Akira Hatanaka2013-05-212-0/+10
* Add some additional functions to the list of helper functions forReed Kotler2013-05-211-2/+13
* [mips] Add (setne $lhs, 0) instruction selection pattern.Akira Hatanaka2013-05-201-0/+2
* [mips] Trap on integer division by zero.Akira Hatanaka2013-05-204-5/+58
* Add LLVMContext argument to getSetCCResultTypeMatt Arsenault2013-05-182-3/+4
* [mips] Improve instruction selection for pattern (store (fp_to_sint $src), $p...Akira Hatanaka2013-05-163-9/+40
* Remove addFrameMove.Rafael Espindola2013-05-162-31/+27
* [mips] Factor out unaligned store lowering code.Akira Hatanaka2013-05-161-10/+14
* Mips assembler: Add TwoOperandConstraint definitionsJack Carter2013-05-161-2/+1
* Mips td file formatting: white space and long linesJack Carter2013-05-164-8/+13
* [mips] Test case for r182042. Add comment.Akira Hatanaka2013-05-161-0/+12