| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -5/+0 |
| * | Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ... | Craig Topper | 2013-07-04 | 1 | -1/+1 |
| * | Revert r185595-185596 which broke buildbots. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -0/+5 |
| * | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-03 | 1 | -5/+0 |
| * | Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ... | Craig Topper | 2013-07-03 | 2 | -3/+3 |
| * | [mips] Add new InstrItinClasses for move from/to coprocessor instructions and | Akira Hatanaka | 2013-07-02 | 4 | -56/+70 |
| * | [mips] Reverse the order of source operands of shift and rotate instructions ... | Akira Hatanaka | 2013-07-01 | 2 | -8/+8 |
| * | [mips] Increase the number of floating point control registers available to 32. | Akira Hatanaka | 2013-07-01 | 1 | -4/+9 |
| * | [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg | Chad Rosier | 2013-06-26 | 1 | -1/+4 |
| * | [mips] Do not emit ".option pic0" if target is mips64. | Akira Hatanaka | 2013-06-26 | 1 | -1/+1 |
| * | [mips] Improve code generation for constant multiplication using shifts, adds... | Akira Hatanaka | 2013-06-26 | 1 | -0/+54 |
| * | This patch introduces RegisterOperand class into Mips FPU instruction defini... | Vladimir Medic | 2013-06-24 | 3 | -87/+157 |
| * | The getRegForInlineAsmConstraint function should only accept MVT value types. | Chad Rosier | 2013-06-22 | 2 | -2/+2 |
| * | Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU r... | Vladimir Medic | 2013-06-20 | 1 | -48/+58 |
| * | Access the TargetLoweringInfo from the TargetMachine object instead of cachin... | Bill Wendling | 2013-06-19 | 3 | -5/+8 |
| * | The RenderMethod field in RegisterOperand class sets the name of the method o... | Vladimir Medic | 2013-06-19 | 2 | -19/+10 |
| * | Mips ELF: Mark object file as ABI compliant | Jack Carter | 2013-06-18 | 2 | -0/+13 |
| * | Use pointers to the MCAsmInfo and MCRegInfo. | Bill Wendling | 2013-06-18 | 4 | -12/+12 |
| * | DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI... | David Blaikie | 2013-06-16 | 4 | -25/+0 |
| * | Mips: Remove global set. | Benjamin Kramer | 2013-06-13 | 2 | -57/+68 |
| * | Fix CMakeLists. | Akira Hatanaka | 2013-06-11 | 1 | -0/+1 |
| * | [mips] Add an IR transformation pass that optimizes calls to sqrt. | Akira Hatanaka | 2013-06-11 | 3 | -1/+177 |
| * | [mips] Use function TargetInstrInfo::getRegClass. | Akira Hatanaka | 2013-06-11 | 2 | -6/+9 |
| * | Fix a regression I introduced when I expanded the complex pseudos in | Reed Kotler | 2013-06-09 | 2 | -9/+10 |
| * | [mips] Use a helper function which compares the size of the source and | Akira Hatanaka | 2013-06-08 | 2 | -8/+21 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 11 | -40/+67 |
| * | Cache the TargetLowering info object as a pointer. | Bill Wendling | 2013-06-06 | 3 | -5/+5 |
| * | [mips] brcond + setgt/setugt instruction selection patterns. | Akira Hatanaka | 2013-06-05 | 1 | -0/+4 |
| * | Test commit for user vmedic, to verify commit access. One line of comment is ... | Vladimir Medic | 2013-06-04 | 1 | -1/+1 |
| * | Make SubRegIndex size mandatory, following r183020. | Ahmed Bougacha | 2013-05-31 | 1 | -10/+10 |
| * | [mips] Big-endian code generation for atomic instructions. | Akira Hatanaka | 2013-05-31 | 1 | -2/+16 |
| * | Order CALLSEQ_START and CALLSEQ_END nodes. | Andrew Trick | 2013-05-29 | 1 | -2/+2 |
| * | Mips assembler: Improve set register alias handling | Jack Carter | 2013-05-28 | 1 | -5/+28 |
| * | Make helper functions static. | Rafael Espindola | 2013-05-27 | 4 | -113/+65 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 | 7 | -71/+71 |
| * | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer | 2013-05-24 | 2 | -2/+2 |
| * | Remove the Copied parameter from MemoryObject::readBytes. | Benjamin Kramer | 2013-05-24 | 1 | -1/+1 |
| * | Mips16 does not use register scavenger from TargetRegisterInfo. It allocates | Reed Kotler | 2013-05-21 | 1 | -2/+2 |
| * | [mips] Rename option to make it compatible with gcc. | Akira Hatanaka | 2013-05-21 | 1 | -1/+1 |
| * | [mips] Add instruction selection patterns for blez and bgez. | Akira Hatanaka | 2013-05-21 | 2 | -0/+10 |
| * | Add some additional functions to the list of helper functions for | Reed Kotler | 2013-05-21 | 1 | -2/+13 |
| * | [mips] Add (setne $lhs, 0) instruction selection pattern. | Akira Hatanaka | 2013-05-20 | 1 | -0/+2 |
| * | [mips] Trap on integer division by zero. | Akira Hatanaka | 2013-05-20 | 4 | -5/+58 |
| * | Add LLVMContext argument to getSetCCResultType | Matt Arsenault | 2013-05-18 | 2 | -3/+4 |
| * | [mips] Improve instruction selection for pattern (store (fp_to_sint $src), $p... | Akira Hatanaka | 2013-05-16 | 3 | -9/+40 |
| * | Remove addFrameMove. | Rafael Espindola | 2013-05-16 | 2 | -31/+27 |
| * | [mips] Factor out unaligned store lowering code. | Akira Hatanaka | 2013-05-16 | 1 | -10/+14 |
| * | Mips assembler: Add TwoOperandConstraint definitions | Jack Carter | 2013-05-16 | 1 | -2/+1 |
| * | Mips td file formatting: white space and long lines | Jack Carter | 2013-05-16 | 4 | -8/+13 |
| * | [mips] Test case for r182042. Add comment. | Akira Hatanaka | 2013-05-16 | 1 | -0/+12 |
