| Commit message (Expand) | Author | Age | Files | Lines |
* | Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a... | Anton Korobeynikov | 2011-01-10 | 1 | -4/+4 |
* | Restore the behavior of frame lowering before my refactoring. | Anton Korobeynikov | 2010-12-18 | 1 | -4/+6 |
* | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov | 2010-11-18 | 1 | -5/+6 |
* | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -19/+11 |
* | Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." | Jakob Stoklund Olesen | 2010-05-26 | 1 | -11/+19 |
* | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -19/+11 |
* | Remove NumberHack entirely. | Jakob Stoklund Olesen | 2010-05-25 | 1 | -4/+4 |
* | Switch SubRegSet to using symbolic SubRegIndices | Jakob Stoklund Olesen | 2010-05-24 | 1 | -8/+12 |
* | Replace the tablegen RegisterClass field SubRegClassList with an alist-like data | Jakob Stoklund Olesen | 2010-05-24 | 1 | -1/+1 |
* | Add SubRegIndex defs to PowerPC. It looks like the CR subregister indices are | Jakob Stoklund Olesen | 2010-05-24 | 1 | -0/+7 |
* | Really reserve R2 on PPC Darwin. PR 6314. | Dale Johannesen | 2010-02-16 | 1 | -8/+4 |
* | Model the carry bit on ppc32. Without this we could | Dale Johannesen | 2009-09-18 | 1 | -0/+8 |
* | Add support for the PowerPC 64-bit SVR4 ABI. | Tilmann Scheller | 2009-08-15 | 1 | -3/+7 |
* | Various small changes related to the Condition Register on PowerPC. | Tilmann Scheller | 2009-07-03 | 1 | -14/+17 |
* | Refactor ABI code in the PowerPC backend. | Tilmann Scheller | 2009-07-03 | 1 | -1/+1 |
* | Implement the SVR4 ABI for PowerPC. | Tilmann Scheller | 2009-07-03 | 1 | -9/+21 |
* | Add a RM pseudoreg for the rounding mode, which | Dale Johannesen | 2008-10-29 | 1 | -0/+10 |
* | Clean up PPC register specification. | Evan Cheng | 2008-07-07 | 1 | -34/+33 |
* | Tail call optimization improvements: | Arnold Schwaighofer | 2008-04-30 | 1 | -1/+3 |
* | Add description of individual bits in CR. This fix PR1765. | Nicolas Geoffray | 2008-03-10 | 1 | -0/+15 |
* | Rename PrintableName to Name. | Bill Wendling | 2008-02-26 | 1 | -1/+1 |
* | Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool | Bill Wendling | 2008-02-26 | 1 | -1/+1 |
* | Some platforms use the same name for 32-bit and 64-bit registers (like | Bill Wendling | 2008-02-24 | 1 | -34/+35 |
* | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
* | Use TableGen to emit information for dwarf register numbers. | Anton Korobeynikov | 2007-11-11 | 1 | -173/+173 |
* | R0 is a sub-register of X0, etc. | Evan Cheng | 2007-05-08 | 1 | -3/+3 |
* | llvm bug #1350, parts 1, 2, and 3. | Nate Begeman | 2007-05-01 | 1 | -1/+50 |
* | We'd still like to register allocate r2 on darwin before the callee-save | Nate Begeman | 2007-01-29 | 1 | -6/+6 |
* | Changes from Nick Lewycky with a simplified PPCTargetAsmInfo. | Jim Laskey | 2006-12-21 | 1 | -2/+6 |
* | in ppc64-mode, don't allocate the 32-bit version of r13 either. | Chris Lattner | 2006-11-20 | 1 | -0/+6 |
* | r13 is the thread pointer on darwin/ppc64, don't allocate it. | Chris Lattner | 2006-11-20 | 1 | -3/+3 |
* | This is a general clean up of the PowerPC ABI. Address several problems and | Jim Laskey | 2006-11-16 | 1 | -2/+2 |
* | Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls | Chris Lattner | 2006-11-14 | 1 | -4/+9 |
* | Constify some methods. Patch provided by Anton Vayvod, thanks! | Chris Lattner | 2006-08-17 | 1 | -8/+8 |
* | Remove the -darwin and -aix llc options, inferring darwinism and aixism from | Chris Lattner | 2006-06-16 | 1 | -2/+2 |
* | Revert Nate's CR patch from last night, which caused many regressions (e.g. f... | Chris Lattner | 2006-05-04 | 1 | -18/+3 |
* | Since we don't handle callee-save CRs right yet, don't allocate them. Also | Nate Begeman | 2006-05-02 | 1 | -3/+18 |
* | Prefer to allocate V2-V5 before V0,V1. This lets us generate code like this: | Chris Lattner | 2006-04-17 | 1 | -1/+1 |
* | add all supported formats to the vector register file | Chris Lattner | 2006-03-25 | 1 | -1/+1 |
* | Add dwarf register numbering to register data. | Jim Laskey | 2006-03-24 | 1 | -71/+140 |
* | Claim to have v16i8 for perm masks | Chris Lattner | 2006-03-20 | 1 | -1/+2 |
* | For functions that use vector registers, save VRSAVE, mark used | Chris Lattner | 2006-03-13 | 1 | -2/+2 |
* | Bye bye HACKTROCITY. | Evan Cheng | 2005-12-22 | 1 | -8/+0 |
* | Pattern-match return. Includes gross hack! | Nate Begeman | 2005-12-20 | 1 | -0/+8 |
* | Add a second vector type to the VRRC register class, and fix some patterns | Nate Begeman | 2005-12-16 | 1 | -3/+3 |
* | Support multiple ValueTypes per RegisterClass, needed for upcoming vector | Nate Begeman | 2005-12-01 | 1 | -7/+8 |
* | Cosmetic change, better reflects actual values | Nate Begeman | 2005-12-01 | 1 | -6/+5 |
* | Add the majority of the vector machien value types we expect to support, | Nate Begeman | 2005-11-29 | 1 | -1/+1 |
* | don't say this is i128, because it isn't yet. Hopefully nate will change | Chris Lattner | 2005-11-29 | 1 | -1/+1 |
* | Small tweaks noticed while on the plane. | Nate Begeman | 2005-11-26 | 1 | -1/+1 |