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path: root/lib/Target/R600/SIInstructions.td
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* R600/SI: Add pattern for AMDGPUurecipMichel Danzer2013-04-101-2/+10
* R600/SI: remove image sample writemaskChristian Konig2013-04-101-13/+12
* R600/SI: Add support for buffer stores v2Tom Stellard2013-04-051-2/+8
* R600/SI: add SETO/SETUO patternsChristian Konig2013-03-271-0/+14
* R600/SI: add cummuting of rev instructionsChristian Konig2013-03-271-15/+12
* R600/SI: add mulhu/mulhs patternsChristian Konig2013-03-271-1/+18
* R600/SI: add srl/sha patterns for SIChristian Konig2013-03-271-2/+6
* R600/SI: avoid unecessary subreg extraction in IMAGE_SAMPLEChristian Konig2013-03-261-13/+7
* R600/SI: replace WQM intrinsicChristian Konig2013-03-261-11/+0
* R600: Use legacy (0 * anything = 0) MUL instructions for pow intrinsicsMichel Danzer2013-03-221-2/+1
* R600/SI: implement indirect adressing for SIChristian Konig2013-03-181-0/+69
* R600/SI: add float vector typesChristian Konig2013-03-181-10/+71
* R600/SI: add shl patternChristian Konig2013-03-181-1/+3
* R600/SI: add BUFFER_LOAD_DWORD patternChristian Konig2013-03-181-3/+9
* R600/SI: implement SI.load.const intrinsicChristian Konig2013-03-181-0/+12
* R600/SI: enable all S_LOAD and S_BUFFER_LOAD opcodesChristian Konig2013-03-181-11/+25
* R600/SI: rework input interpolation v2Christian Konig2013-03-071-61/+6
* R600/SI: remove SGPR address space v2Christian Konig2013-03-071-3/+2
* R600/SI: switch types of SGPRs to v*i8Christian Konig2013-03-071-2/+2
* R600/SI: remove S_MOV immediate patternsChristian Konig2013-03-011-12/+2
* R600/SI: add some more instruction flagsChristian Konig2013-02-261-14/+79
* R600/SI: add post ISel folding for SI v2Christian Konig2013-02-261-11/+11
* R600/SI: fix VOP3b encoding v2Christian Konig2013-02-261-6/+8
* R600/SI: fix and cleanup SI register definition v2Christian Konig2013-02-261-2/+3
* R600/SI: Add pattern for sign extension of i1 to i32.Michel Danzer2013-02-221-0/+5
* R600/SI: Add pattern for logical or of i1 values.Michel Danzer2013-02-221-0/+4
* R600/SI: Add pattern for fceil.Michel Danzer2013-02-221-1/+3
* R600/SI: inline V_ADD|SUB_F32 patternsChristian Konig2013-02-211-9/+5
* R600/SI: replace IMPLICIT_DEF with SIOperand.ZEROChristian Konig2013-02-211-1/+1
* R600/SI: replace SI_V_CNDLT with a patternChristian Konig2013-02-211-7/+5
* R600/SI: use patterns for clamp, fabs, fnegChristian Konig2013-02-211-4/+22
* R600/SI: add all the other missing asm operands v2Christian Konig2013-02-211-22/+25
* R600/SI: simplify VOPC_* pattern v2Christian Konig2013-02-211-248/+196
* R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32Michel Danzer2013-02-211-1/+2
* R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune2013-02-181-2/+2
* R600/SI: Add pattern to simplify i64 loadingChristian Konig2013-02-161-0/+5
* R600/SI: nuke SReg_1 v3Christian Konig2013-02-161-31/+19
* R600/SI: cleanup literal handling v3Christian Konig2013-02-161-44/+37
* R600/SI: replace AllReg_* with [SV]Src_* v2Christian Konig2013-02-161-64/+64
* R600/SI: Fix int_SI_fs_interp_constantMichel Danzer2013-02-141-11/+18
* R600/SI: Add pattern for mul.Tom Stellard2013-02-071-0/+4
* R600/SI: simplify and fix SMRD encodingTom Stellard2013-02-071-3/+36
* R600/SI: add proper 64bit immediate support v2Tom Stellard2013-02-071-11/+8
* R600/SI: Use proper instructions for array/shadow samplers.Tom Stellard2013-02-071-3/+39
* R600/SI: Make sample intrinsic address parameter type overloaded.Tom Stellard2013-02-071-18/+34
* R600/SI: Add basic support for more integer vector types.Tom Stellard2013-02-071-6/+10
* R600/SI: Add pattern for flog2Michel Danzer2013-02-071-1/+3
* R600: Consolidate sub register indices.Tom Stellard2013-02-071-24/+24
* R600/SI: Add patterns for fcos and fsin.Tom Stellard2013-02-051-0/+10
* R600/SI: Use unnormalized coordinates for sampling with the RECT target.Tom Stellard2013-01-211-0/+6
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