| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove NaClMode | David Meyer | 2011-10-18 | 1 | -3/+0 |
| * | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 | 1 | -1/+3 |
| * | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper | 2011-10-14 | 1 | -0/+8 |
| * | Revert r141854 because it was causing failures: | Bill Wendling | 2011-10-13 | 1 | -7/+0 |
| * | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper | 2011-10-13 | 1 | -0/+7 |
| * | Add X86 LZCNT instruction. Including instruction selection support. | Craig Topper | 2011-10-11 | 1 | -2/+4 |
| * | X86: Add a subtarget definition for core-avx-i, which is GCC's name for ivy b... | Benjamin Kramer | 2011-10-10 | 1 | -0/+5 |
| * | X86: Add patterns for the movbe instruction (mov + bswap, only available on a... | Benjamin Kramer | 2011-10-10 | 1 | -1/+1 |
| * | Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa... | Craig Topper | 2011-10-09 | 1 | -0/+2 |
| * | Add support for MOVBE and RDRAND instructions for the assembler and disassemb... | Craig Topper | 2011-10-03 | 1 | -0/+4 |
| * | Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certain | Nick Lewycky | 2011-09-05 | 1 | -0/+3 |
| * | Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. | Eli Friedman | 2011-08-26 | 1 | -20/+30 |
| * | Add Mode64Bit feature and sink it down to MC layer. | Evan Cheng | 2011-07-07 | 1 | -0/+7 |
| * | Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility. | Benjamin Kramer | 2011-05-20 | 1 | -1/+1 |
| * | Add pentium{3,4}m cpus. Patch by Alexander Best! | Michael J. Spencer | 2011-05-03 | 1 | -0/+2 |
| * | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner | 2011-04-15 | 1 | -1/+1 |
| * | Add 3DNow! intrinsics. | Michael J. Spencer | 2011-04-15 | 1 | -7/+8 |
| * | Fix whitespace and tabs. | Michael J. Spencer | 2011-04-14 | 1 | -3/+3 |
| * | Disable auto-detection of AVX support since AVX codegen support is not ready. | Evan Cheng | 2010-12-13 | 1 | -1/+3 |
| * | Formalize the notion that AVX and SSE are non-overlapping extensions from the... | Nate Begeman | 2010-12-10 | 1 | -5/+5 |
| * | Add patterns for the x86 popcnt instruction. | Benjamin Kramer | 2010-12-04 | 1 | -2/+6 |
| * | Clean up comments. | Jim Grosbach | 2010-10-30 | 1 | -1/+5 |
| * | Clean up asm writer usage for x86 and msp430 to flag that the writer should | Jim Grosbach | 2010-09-30 | 1 | -0/+2 |
| * | tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl', | Daniel Dunbar | 2010-08-12 | 1 | -1/+0 |
| * | Declare CLMUL as a subtarget feature | Bruno Cardoso Lopes | 2010-07-23 | 1 | -0/+2 |
| * | MC/X86: We now match instructions like "incl %eax" correctly for the arch we are | Daniel Dunbar | 2010-07-19 | 1 | -1/+0 |
| * | MC/X86: Add "support" for matching ATT style mnemonic prefixes. | Daniel Dunbar | 2010-05-04 | 1 | -2/+3 |
| * | Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. | Jakob Stoklund Olesen | 2010-04-05 | 1 | -27/+1 |
| * | Separate out the AES-NI instructions from the SSE4.2 instructions. Add | Eric Christopher | 2010-04-02 | 1 | -1/+9 |
| * | Nehalem unaligned memory access is fast. | Evan Cheng | 2010-04-01 | 1 | -2/+7 |
| * | Teach TableGen to understand X.Y notation in the TSFlagsFields strings. | Jakob Stoklund Olesen | 2010-03-25 | 1 | -3/+3 |
| * | Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain c... | Jakob Stoklund Olesen | 2010-03-25 | 1 | -0/+2 |
| * | MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a | Daniel Dunbar | 2010-03-18 | 1 | -0/+1 |
| * | all 64-bit cpus have cmov, this should fix CodeGen/X86/cmov.ll | Chris Lattner | 2010-03-14 | 1 | -1/+2 |
| * | revert r95949, it turns out that adding new prefixes is not a | Chris Lattner | 2010-02-12 | 1 | -3/+3 |
| * | add another bit of space for new kinds of instruction prefixes. | Chris Lattner | 2010-02-12 | 1 | -3/+3 |
| * | Implement a feature (-vector-unaligned-mem) to allow targets to | David Greene | 2010-01-11 | 1 | -0/+4 |
| * | Remove target attribute break-sse-dep. Instead, do not fold load into sse par... | Evan Cheng | 2009-12-22 | 1 | -22/+10 |
| * | On recent Intel u-arch's, folding loads into some unary SSE instructions can | Evan Cheng | 2009-12-18 | 1 | -10/+22 |
| * | Instruction fixes, added instructions, and AsmString changes in the | Sean Callanan | 2009-12-18 | 1 | -1/+1 |
| * | remove a temporary hack. | Chris Lattner | 2009-09-20 | 1 | -1/+1 |
| * | split MCInst printing out of the X86ATTInstPrinter | Chris Lattner | 2009-09-13 | 1 | -1/+1 |
| * | Add support for modeling whether or not the processor has support for | Chris Lattner | 2009-09-02 | 1 | -4/+9 |
| * | llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be | Daniel Dunbar | 2009-08-11 | 1 | -0/+6 |
| * | Match X86 register names to number. | Daniel Dunbar | 2009-07-29 | 1 | -1/+8 |
| * | Add processor descriptions for Istanbul and Shanghai. | David Greene | 2009-06-29 | 1 | -0/+4 |
| * | Add feature flags for AVX and FMA and fix some SSE4A feature flag | David Greene | 2009-06-26 | 1 | -0/+10 |
| * | Revert 72707 and 72709, for the moment. | Dale Johannesen | 2009-06-02 | 1 | -2/+0 |
| * | Add missing file. | Dale Johannesen | 2009-06-01 | 1 | -0/+2 |
| * | Update CPU capabilities for AMD machines | Stefanus Du Toit | 2009-05-26 | 1 | -0/+12 |
