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* Add support for AMD Geode.Roman Divacky2012-09-121-0/+1
* Generic Bypass Slow DivPreston Gurd2012-09-041-1/+5
* Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.Anitha Boyapati2012-08-161-2/+2
* git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34...Anitha Boyapati2012-08-161-2/+2
* I'm introducing a new machine model to simultaneously allow simpleAndrew Trick2012-07-071-2/+2
* Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper2012-06-031-2/+2
* X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer2012-05-311-8/+8
* Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B...Craig Topper2012-05-011-9/+8
* Make XOP imply AVX as its needed to legalize the registers types.Craig Topper2012-05-011-1/+2
* Make CLMUL and AES imply SSE2 since its needed to legalize the type.Craig Topper2012-05-011-2/+4
* Enable AVX and FMA4 for AMD Bulldozer processors.Craig Topper2012-05-011-5/+5
* Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei...Craig Topper2012-04-261-6/+4
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang.Evan Cheng2012-02-071-1/+3
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-3/+11
* Rename X86ATTAsmParser -> X86AsmParserDevang Patel2012-01-121-2/+1
* Add definition for intel asm variant.Devang Patel2012-01-101-1/+11
* Add definitions for AMD's bobcat (aka btver1)Benjamin Kramer2012-01-101-0/+5
* Split AsmParser into two components - AsmParser and AsmParserVariantDevang Patel2012-01-091-2/+4
* Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Pr...Craig Topper2012-01-091-3/+4
* Make FMA4 imply AVX so that YMM registers would be available. Necessitates re...Craig Topper2011-12-301-6/+8
* Make FMA3 imply AVX needs to be enabled. Particularly because 256-bit types a...Craig Topper2011-12-291-3/+4
* Add FeaturePOPCNT to all CPU types that lost it was removed from SSE42/SSE4A ...Craig Topper2011-12-291-14/+17
* Make SSE42 and SSE4A not imply POPCNT. POPCNT should be able to be disabled o...Craig Topper2011-12-291-3/+2
* Add XOP feature flag.Jan Sjödin2011-12-021-2/+5
* X86: Turns out bulldozer also supports sse42 and lzcnt.Benjamin Kramer2011-11-301-11/+6
* X86: Add subtargets for AMD's bulldozer.Benjamin Kramer2011-11-301-0/+6
* Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper2011-10-301-6/+11
* Remove NaClModeDavid Meyer2011-10-181-3/+0
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-161-1/+3
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-141-0/+8
* Revert r141854 because it was causing failures:Bill Wendling2011-10-131-7/+0
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-131-0/+7
* Add X86 LZCNT instruction. Including instruction selection support.Craig Topper2011-10-111-2/+4
* X86: Add a subtarget definition for core-avx-i, which is GCC's name for ivy b...Benjamin Kramer2011-10-101-0/+5
* X86: Add patterns for the movbe instruction (mov + bswap, only available on a...Benjamin Kramer2011-10-101-1/+1
* Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa...Craig Topper2011-10-091-0/+2
* Add support for MOVBE and RDRAND instructions for the assembler and disassemb...Craig Topper2011-10-031-0/+4
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-051-0/+3
* Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman2011-08-261-20/+30
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-071-0/+7
* Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.Benjamin Kramer2011-05-201-1/+1
* Add pentium{3,4}m cpus. Patch by Alexander Best!Michael J. Spencer2011-05-031-0/+2
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Add 3DNow! intrinsics.Michael J. Spencer2011-04-151-7/+8
* Fix whitespace and tabs.Michael J. Spencer2011-04-141-3/+3
* Disable auto-detection of AVX support since AVX codegen support is not ready.Evan Cheng2010-12-131-1/+3
* Formalize the notion that AVX and SSE are non-overlapping extensions from the...Nate Begeman2010-12-101-5/+5
* Add patterns for the x86 popcnt instruction.Benjamin Kramer2010-12-041-2/+6
* Clean up comments.Jim Grosbach2010-10-301-1/+5
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