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* Fixes an issue reported by -verify-machineinstrs.Rafael Espindola2011-10-261-2/+2
| | | | | | Patch by Sanjoy Das. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143064 91177308-0d34-0410-b5e6-96231b3b80d8
* This commit introduces two fake instructions MORESTACK_RET andRafael Espindola2011-10-261-0/+18
| | | | | | | | | | | | MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET followed by a MOV respectively. Having a fake instruction prevents the verifier from seeing a MachineBasicBlock end with a non-terminator (MOV). It also prevents the rather eccentric case of a MachineBasicBlock ending with RET but having successors nevertheless. Patch by Sanjoy Das. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143062 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the assembler strings for a couple of atomic instructions. Doesn't ↵Eli Friedman2011-09-131-2/+2
| | | | | | really matter much in practice, but it's a bit cleaner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139563 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly ↵Eli Friedman2011-09-071-14/+26
| | | | | | | | | | fix some subtle bugs involving passes which check mayStore()). This isn't exactly ideal, but it is good enough for the moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139245 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo CMOV instructions don't clobber EFLAGS.Jakob Stoklund Olesen2011-09-021-13/+3
| | | | | | | | | | | | | | The explanation about a 0 argument being materialized as xor is no longer valid. Rematerialization will check if EFLAGS is live before clobbering it. The code produced by X86TargetLowering::EmitLoweredSelect does not clobber EFLAGS. This causes one less testb instruction to be generated in the cmov.ll test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds a SelectionDAG node X86SegAlloca which will be custom loweredRafael Espindola2011-08-301-0/+20
| | | | | | | | | | | | from DYNAMIC_STACKALLOC. Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which will match X86SegAlloca (based on word size) are also added. They will be custom emitted to inject the actual stack handling code. Patch by Sanjoy Das. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138814 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman2011-08-261-2/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
* Basic x86 code generation for atomic load and store instructions.Eli Friedman2011-08-241-0/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556Bruno Cardoso Lopes2011-08-091-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137179 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple ridiculous copy-paste errors. rdar://9914773 .Eli Friedman2011-08-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137160 91177308-0d34-0410-b5e6-96231b3b80d8
* X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any ↵Eli Friedman2011-07-271-1/+1
| | | | | | code, and all x86 processors will honor the required semantics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136249 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment describing why transforming (shl x, 1) to (add x, x) is to beDan Gohman2011-06-161-0/+5
| | | | | | | considered safe enough in this context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133159 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: smulo -> add is now done target-independently in DAGCombiner, remove ↵Benjamin Kramer2011-05-211-6/+0
| | | | | | the patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131801 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.Stuart Hastings2011-05-201-9/+22
| | | | | | | rdar://problem/8614450 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting 131641 to investigate 'bot complaint.Stuart Hastings2011-05-191-13/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131654 91177308-0d34-0410-b5e6-96231b3b80d8
* Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer beStuart Hastings2011-05-191-10/+13
| | | | | | | pseudos. rdar://problem/8614450 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131641 91177308-0d34-0410-b5e6-96231b3b80d8
* Support XOR and AND optimization with no return value.Eric Christopher2011-05-171-0/+2
| | | | | | | Finishes off rdar://8470697 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131458 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize atomic lock or that doesn't use the result value.Eric Christopher2011-05-101-1/+2
| | | | | | | | | Next up: xor and and. Part of rdar://8470697 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131171 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor lock versions of binary operators to be a little lessEric Christopher2011-05-101-73/+83
| | | | | | | cut and paste. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131139 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Add a bunch of peeps for add and sub of SETB.Benjamin Kramer2011-05-081-0/+24
| | | | | | | | | | | | | | | | "b + ((a < b) ? 1 : 0)" compiles into cmpl %esi, %edi adcl $0, %esi instead of cmpl %esi, %edi sbbl %eax, %eax andl $1, %eax addl %esi, %eax This saves a register, a false dependency on %eax (Intel's CPUs still don't ignore it) and it's shorter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131070 91177308-0d34-0410-b5e6-96231b3b80d8
* The labyrinthine X86 backend no longer appears to requireDan Gohman2011-02-171-37/+0
| | | | | | | these patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125759 91177308-0d34-0410-b5e6-96231b3b80d8
* Target/X86: Tweak win64's tailcall.NAKAMURA Takumi2011-01-261-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124272 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix whitespace.NAKAMURA Takumi2011-01-261-9/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124270 91177308-0d34-0410-b5e6-96231b3b80d8
* The stub routine that we're calling uses test and so clobbersEric Christopher2011-01-181-2/+2
| | | | | | | the flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123712 91177308-0d34-0410-b5e6-96231b3b80d8
* We lower setb to sbb with the hope that the and will go away, when it Chris Lattner2010-12-201-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | doesn't, match it back to setb. On a 64-bit version of the testcase before we'd get: movq %rdi, %rax addq %rsi, %rax sbbb %dl, %dl andb $1, %dl ret now we get: movq %rdi, %rax addq %rsi, %rax setb %dl ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122217 91177308-0d34-0410-b5e6-96231b3b80d8
* improve the setcc -> setcc_carry optimization to happen moreChris Lattner2010-12-191-0/+11
| | | | | | | | | consistently by moving it out of lowering into dag combine. Add some missing patterns for matching away extended versions of setcc_c. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122201 91177308-0d34-0410-b5e6-96231b3b80d8
* Only rr forms of ADD*_DB are commutable.Evan Cheng2010-12-151-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121908 91177308-0d34-0410-b5e6-96231b3b80d8
* Add rsp to the uses for the same reason as 32-bit.Eric Christopher2010-12-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121328 91177308-0d34-0410-b5e6-96231b3b80d8
* Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.Rafael Espindola2010-11-281-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower TLS_addr32 and TLS_addr64.Rafael Espindola2010-11-271-9/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
* reject instructions that contain a \n in their asmstring. MarkChris Lattner2010-11-011-8/+10
| | | | | | | | various X86 and ARM instructions that are bitten by this as isCodeGenOnly, as they are. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117884 91177308-0d34-0410-b5e6-96231b3b80d8
* two changes: make the asmmatcher generator ignore ARM pseudos properly,Chris Lattner2010-10-311-3/+3
| | | | | | | | and make it a hard error for instructions to not have an asm string. These instructions should be marked isCodeGenOnly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117861 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Add alloca probing to dynamic alloca on Windows. Fixes PR8424.Michael J. Spencer2010-10-211-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116984 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Whitespace.Michael J. Spencer2010-10-201-64/+64
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116972 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix another case where we were preferring instructions with largeRafael Espindola2010-10-131-14/+18
| | | | | | immediates instead of 8 bits ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116410 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR8365 by adding a more specialized Pat that checks if an 'and' withRafael Espindola2010-10-131-3/+18
| | | | | | 8 bit constants can be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial va_arg support for x86-64. Patch by David Meyer!Dan Gohman2010-10-121-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116319 91177308-0d34-0410-b5e6-96231b3b80d8
* reapply: Use the new TB_NOT_REVERSABLE flag instead of specialChris Lattner2010-10-081-14/+27
| | | | | | | | | | | reapply: reimplement the second half of the or/add optimization. We should now with no changes. Turns out that one missing "Defs = [EFLAGS]" can upset things a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116040 91177308-0d34-0410-b5e6-96231b3b80d8
* reapply the patch reverted in r116033:Chris Lattner2010-10-081-21/+59
| | | | | | | | | | "Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'" With a critical fix: the add pseudos clobber EFLAGS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116039 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Reimplement (part of) the or -> add optimization. Matching 'or' intoDaniel Dunbar2010-10-081-59/+21
| | | | | | 'add'", which seems to have broken just about everything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116033 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "reimplement the second half of the or/add optimization. We should now",Daniel Dunbar2010-10-081-27/+14
| | | | | | which depends on r116007, which I am about to revert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116031 91177308-0d34-0410-b5e6-96231b3b80d8
* reimplement the second half of the or/add optimization. We should nowChris Lattner2010-10-081-14/+27
| | | | | | | | | | | only end up emitting LEA instead of OR. If we aren't able to promote something into an LEA, we should never be emitting it as an ADD. Add some testcases that we emit "or" in cases where we used to produce an "add". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116026 91177308-0d34-0410-b5e6-96231b3b80d8
* Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'Chris Lattner2010-10-071-21/+59
| | | | | | | | | | | | | | | | | | | | | is general goodness because it allows ORs to be converted to LEA to avoid inserting copies. However, this is bad because it makes the generated .s file less obvious and gives valgrind heartburn (tons of false positives in bitfield code). While the general fix should be in valgrind, we can at least try to avoid emitting ADD instructions that *don't* get promoted to LEA. This is more work because it requires introducing pseudo instructions to represents "add that knows the bits are disjoint", but hey, people really love valgrind. This fixes this testcase: https://bugs.kde.org/show_bug.cgi?id=242137#c20 the add r/i cases are coming next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116007 91177308-0d34-0410-b5e6-96231b3b80d8
* Move cmov pseudo instructions to InstrCompiler,Chris Lattner2010-10-051-0/+61
| | | | | | | | | | | | | convert all the rest of the cmovs to the multiclass, with good results: X86InstrCMovSetCC.td | 598 +-------------------------------------------------- X86InstrCompiler.td | 61 +++++ 2 files changed, 77 insertions(+), 582 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115707 91177308-0d34-0410-b5e6-96231b3b80d8
* Use #NAME# to have the CMOV multiclass define things with the same names as ↵Chris Lattner2010-10-051-1/+1
| | | | | | | | | before (e.g. CMOVBE16rr instead of CMOVBErr16). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115705 91177308-0d34-0410-b5e6-96231b3b80d8
* enhance tblgen to support anonymous defm's, use this toChris Lattner2010-10-051-16/+16
| | | | | | | simplify the X86 CMOVmr's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115702 91177308-0d34-0410-b5e6-96231b3b80d8
* convert cmov mr patterns to use a multipattern. Death to redundancyChris Lattner2010-10-051-97/+25
| | | | | | | and verbosity git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115701 91177308-0d34-0410-b5e6-96231b3b80d8
* switch CMOVBE to the multipattern:Chris Lattner2010-10-051-3/+3
| | | | | | | | | 21 insertions(+), 53 deletions(-) Moar change coming before I switch the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115697 91177308-0d34-0410-b5e6-96231b3b80d8
* move SETB pseudos into the same place in InstrCompiler.tdChris Lattner2010-10-051-4/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115686 91177308-0d34-0410-b5e6-96231b3b80d8
* move some instructions from Instr64Bit -> InstrInfo.Chris Lattner2010-10-051-0/+18
| | | | | | | bswap32 doesn't read eflags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115604 91177308-0d34-0410-b5e6-96231b3b80d8
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