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* INC / DEC instructions have shorter code size than ADD32ri8, etc.Evan Cheng2006-07-191-3/+1
* X86 integer register classes naming changes. Make them consistent with FP, ve...Evan Cheng2006-05-161-1/+1
* SSE / SSE2 conversion intrinsics.Evan Cheng2006-04-121-1/+23
* movnt* and maskmovdqu intrinsicsEvan Cheng2006-04-111-0/+25
* Instruction encoding bugEvan Cheng2006-03-251-1/+1
* Added CVTTPS2PI.Evan Cheng2006-03-251-0/+8
* Didn't mean to check this in. No MMX support yet.Evan Cheng2006-03-211-3/+1
* - Use movaps to store 128-bit vector integers.Evan Cheng2006-03-211-1/+3
* - Remove scalar to vector pseudo ops. They are just wrong.Evan Cheng2006-03-211-19/+0
* x86 ISD::SCALAR_TO_VECTOR support.Evan Cheng2006-03-211-0/+18
* Move a few things around.Evan Cheng2006-03-201-0/+10
* One more round of reorg so sabre doesn't freak out. :-)Evan Cheng2006-02-211-22/+0
* Split instruction info into multiple files, one for each of x87, MMX, and SSE.Evan Cheng2006-02-211-0/+57
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