| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Replace the tablegen RegisterClass field SubRegClassList with an alist-like data | Jakob Stoklund Olesen | 2010-05-24 | 1 | -17/+36 |
| * | Rename X86 subregister indices to something shorter. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -8/+8 |
| * | Add the SubRegIndex TableGen class. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -9/+11 |
| * | Eliminated the classification of control registers into %ecr_ | Sean Callanan | 2010-05-06 | 1 | -26/+11 |
| * | Fix PR6696 and PR6663 | Jim Grosbach | 2010-04-06 | 1 | -13/+25 |
| * | Do not force indirect tailcall through fixed registers: eax, r11. Add support... | Evan Cheng | 2010-03-14 | 1 | -0/+7 |
| * | Implement XMM subregs. | Dan Gohman | 2010-02-28 | 1 | -18/+45 |
| * | Remove SIL, DIL, and BPL from the GR8_NOREX allocation order also. | Dan Gohman | 2010-01-26 | 1 | -11/+5 |
| * | SIL, DIL, BPL, and SPL require a REX prefix. | Dan Gohman | 2010-01-26 | 1 | -6/+3 |
| * | Instruction fixes, added instructions, and AsmString changes in the | Sean Callanan | 2009-12-18 | 1 | -1/+48 |
| * | Add RIP to GR64_NOREX. This fixed a MachineVerifier error when RIP | Dan Gohman | 2009-10-05 | 1 | -5/+5 |
| * | Added a new register class for segment registers | Sean Callanan | 2009-09-15 | 1 | -0/+5 |
| * | Minor whitespace tidiness. | Dan Gohman | 2009-07-30 | 1 | -3/+0 |
| * | Rename GRAD to GR32_AD, to follow the naming convention of other | Dan Gohman | 2009-07-30 | 1 | -1/+3 |
| * | Add a new register class to describe operands that can't be SP, | Dan Gohman | 2009-07-30 | 1 | -2/+103 |
| * | Eliminate a bunch of redundant tables. | Dan Gohman | 2009-07-30 | 1 | -167/+61 |
| * | Use array_endof instead of doing it manually. | Dan Gohman | 2009-07-30 | 1 | -27/+20 |
| * | Add a 256-bit register class and YMM registers. | David Greene | 2009-06-29 | 1 | -0/+27 |
| * | add %rip to the GR64 register class. Lets avoid allocating it to anything th... | Chris Lattner | 2009-06-26 | 1 | -3/+3 |
| * | Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H, and use these | Dan Gohman | 2009-04-27 | 1 | -9/+12 |
| * | Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_ABCD, | Dan Gohman | 2009-04-27 | 1 | -12/+12 |
| * | Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with | Dan Gohman | 2009-04-15 | 1 | -0/+35 |
| * | GR8_NOREX can contain the H registers, since they don't require | Dan Gohman | 2009-04-15 | 1 | -2/+3 |
| * | Some of GR8_NOREX registers are only available in 64-bit mode. | Evan Cheng | 2009-04-14 | 1 | -0/+48 |
| * | Implement x86 h-register extract support. | Dan Gohman | 2009-04-13 | 1 | -20/+134 |
| * | Fix copy+pastos in comments. | Dan Gohman | 2009-04-13 | 1 | -2/+2 |
| * | List the l registers before h registers, for consistency. | Dan Gohman | 2009-04-13 | 1 | -4/+4 |
| * | Re-apply 68552. | Rafael Espindola | 2009-04-08 | 1 | -0/+8 |
| * | Temporarily revert r68552. This was causing a failure in the self-hosting LLVM | Bill Wendling | 2009-04-07 | 1 | -8/+0 |
| * | Reduce code duplication on the TLS implementation. | Rafael Espindola | 2009-04-07 | 1 | -0/+8 |
| * | Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what... | Evan Cheng | 2009-03-04 | 1 | -1/+1 |
| * | Reformat the allocation-order arrays to a more conventional style. | Dan Gohman | 2009-01-27 | 1 | -44/+55 |
| * | <rdar://problem/6351057> | Stuart Hastings | 2008-11-19 | 1 | -10/+12 |
| * | Remove unneeded stuff from GRAD register class. | Dale Johannesen | 2008-11-14 | 1 | -19/+1 |
| * | Extend InlineAsm::C_Register to allow multiple specific registers | Dale Johannesen | 2008-11-13 | 1 | -0/+21 |
| * | Change x86 register allocation ordering to match that of gcc. Otherwise some ... | Evan Cheng | 2008-10-31 | 1 | -19/+19 |
| * | ATT asm printer just print register AsmName's instead of calling tolower on e... | Evan Cheng | 2008-07-07 | 1 | -112/+112 |
| * | Add v2f32 (MMX) type to X86. Support is primitive: | Dale Johannesen | 2008-06-24 | 1 | -1/+1 |
| * | Recommitting parts of r48130. These do not appear to cause the observed failu... | Christopher Lamb | 2008-03-11 | 1 | -0/+4 |
| * | In 32-bit mode, mark 64-bit GPR's as unallocatable. | Evan Cheng | 2008-03-11 | 1 | -0/+3 |
| * | Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to | Chris Lattner | 2008-03-10 | 1 | -4/+4 |
| * | Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. | Evan Cheng | 2008-03-10 | 1 | -4/+0 |
| * | Allow insert_subreg into implicit, target-specific values. | Christopher Lamb | 2008-03-10 | 1 | -0/+4 |
| * | claim ST(x) registers are 80 bits, which is true. This doesn't affect | Chris Lattner | 2008-03-09 | 1 | -1/+1 |
| * | Rename MRegisterInfo to TargetRegisterInfo. | Dan Gohman | 2008-02-10 | 1 | -7/+7 |
| * | Provide correct DWARF register numbering for debug information emission on x8... | Anton Korobeynikov | 2008-01-25 | 1 | -5/+2 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Use TableGen to emit information for dwarf register numbers. | Anton Korobeynikov | 2007-11-11 | 1 | -116/+118 |
| * | Revert previous rewrite per chris's comments. | Dale Johannesen | 2007-11-09 | 1 | -113/+115 |
| * | Rewrite Dwarf number handling per review comments. | Dale Johannesen | 2007-11-09 | 1 | -115/+113 |
