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path: root/lib/Target/XCore/XCoreInstrInfo.td
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* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-17/+17
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-2/+2
* Update to LLVM 3.5a.Stephen Hines2014-04-241-7/+38
* Add XCore support for ATOMIC_FENCE.Robert Lytton2013-11-121-0/+9
* [XCore] Whitespace fixes, no functionality change.Richard Osborne2013-07-031-3/+3
* [XCore] Add ISel pattern for LDWCPRichard Osborne2013-07-031-8/+7
* [XCore] Fix instruction selection for zext, mkmsk instructions.Richard Osborne2013-07-021-1/+1
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-241-1/+1
* [XCore] Add LDAPB instructions.Richard Osborne2013-05-051-3/+13
* [XCore] Update LDAP to use pcrel_imm.Richard Osborne2013-05-051-3/+3
* [XCore] Rename calltarget -> pcrel_imm.Richard Osborne2013-05-051-6/+6
* [XCore] Add BLRB instructions.Richard Osborne2013-05-051-0/+7
* [XCore] Remove '-' from back branch asm syntax.Richard Osborne2013-05-051-6/+9
* [XCore] Remove unused operand type.Richard Osborne2013-05-041-1/+0
* [XCore] Make use of the target independent global address offset folding.Richard Osborne2013-05-041-18/+12
* [XCore] Add bru instruction.Richard Osborne2013-04-041-0/+3
* [XCore] The RRegs register class is a superset of GRRegs.Richard Osborne2013-04-041-31/+23
* [XCore] Add missing 2r instructions.Richard Osborne2013-02-171-1/+9
* [XCore] Add TSETR instruction.Richard Osborne2013-02-171-1/+5
* [XCore] Add missing u10 / lu10 instructions.Richard Osborne2013-02-171-1/+12
* [XCore] Add missing u6 / lu6 instructions.Richard Osborne2013-02-171-2/+18
* Move MRI liveouts to XCore return instructions.Jakob Stoklund Olesen2013-02-051-2/+2
* [XCore] Add missing l2rus instructions.Richard Osborne2013-01-271-1/+8
* [XCore] Add missing l2r instructions.Richard Osborne2013-01-271-1/+12
* [XCore] Add missing 1r instructions.Richard Osborne2013-01-271-6/+21
* [XCore] Add missing 0r instructions.Richard Osborne2013-01-271-3/+44
* Add instruction encodings / disassembly support for l4r instructions.Richard Osborne2013-01-251-17/+12
* Use the correct format in the STW / SETPSC instruction names.Richard Osborne2013-01-251-7/+7
* Fix order of operands for crc8_l4rRichard Osborne2013-01-251-2/+2
* Add instruction encodings / disassembly support for l5r instructions.Richard Osborne2013-01-251-11/+10
* Fix order of operands for l5r instructions.Richard Osborne2013-01-251-3/+3
* Use correct mnemonic / instruction name for ldivu.Richard Osborne2013-01-251-4/+3
* Add instruction encodings / disassembly support for l6r instructions.Richard Osborne2013-01-231-5/+4
* Add instruction encodings / disassembly support for u10 / lu10 instructions.Richard Osborne2013-01-221-10/+10
* Fix some incorrectly named u10 / lu10 instructions.Richard Osborne2013-01-211-25/+12
* Remove unused multiclass.Richard Osborne2013-01-211-12/+0
* Add instruction encodings / disassembly support for u6 / lu6 instructions.Richard Osborne2013-01-211-57/+30
* Add instruction encoding / disassembly support for ru6 / lru6 instructions.Richard Osborne2013-01-211-92/+71
* Use correct format for the LDAWCP instruction (u6).Richard Osborne2013-01-211-7/+3
* Add instruction encodings / disassembly support for l2rus instructions.Richard Osborne2013-01-201-21/+19
* Add instruction encodings / disassembly support for l3r instructions.Richard Osborne2013-01-201-47/+54
* Add instruction encodings / disassembler support for 2rus instructions.Richard Osborne2013-01-201-22/+23
* Add instruction encodings / disassembly support 3r instructions.Richard Osborne2013-01-201-54/+44
* Add instruction encodings / disassembly support for l2r instructions.Richard Osborne2012-12-171-28/+28
* Add instruction encodings for PEEK and ENDIN.Richard Osborne2012-12-171-8/+8
* Add instruction encodings / disassembly support for rus instructions.Richard Osborne2012-12-171-18/+19
* Add instruction encodings for ZEXT and SEXT.Richard Osborne2012-12-171-8/+8
* Add instruction encodings / disassembly support for 2r instructions.Richard Osborne2012-12-171-68/+66
* Add instruction encodings / disassembly support for 0r instructions.Richard Osborne2012-12-171-8/+8
* Add instruction encodings and disassembly for 1r instructions.Richard Osborne2012-12-161-33/+33