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path: root/lib/Target/XCore/XCoreInstrInfo.td
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* [XCore] Add missing 2r instructions.Richard Osborne2013-02-171-1/+9
* [XCore] Add TSETR instruction.Richard Osborne2013-02-171-1/+5
* [XCore] Add missing u10 / lu10 instructions.Richard Osborne2013-02-171-1/+12
* [XCore] Add missing u6 / lu6 instructions.Richard Osborne2013-02-171-2/+18
* Move MRI liveouts to XCore return instructions.Jakob Stoklund Olesen2013-02-051-2/+2
* [XCore] Add missing l2rus instructions.Richard Osborne2013-01-271-1/+8
* [XCore] Add missing l2r instructions.Richard Osborne2013-01-271-1/+12
* [XCore] Add missing 1r instructions.Richard Osborne2013-01-271-6/+21
* [XCore] Add missing 0r instructions.Richard Osborne2013-01-271-3/+44
* Add instruction encodings / disassembly support for l4r instructions.Richard Osborne2013-01-251-17/+12
* Use the correct format in the STW / SETPSC instruction names.Richard Osborne2013-01-251-7/+7
* Fix order of operands for crc8_l4rRichard Osborne2013-01-251-2/+2
* Add instruction encodings / disassembly support for l5r instructions.Richard Osborne2013-01-251-11/+10
* Fix order of operands for l5r instructions.Richard Osborne2013-01-251-3/+3
* Use correct mnemonic / instruction name for ldivu.Richard Osborne2013-01-251-4/+3
* Add instruction encodings / disassembly support for l6r instructions.Richard Osborne2013-01-231-5/+4
* Add instruction encodings / disassembly support for u10 / lu10 instructions.Richard Osborne2013-01-221-10/+10
* Fix some incorrectly named u10 / lu10 instructions.Richard Osborne2013-01-211-25/+12
* Remove unused multiclass.Richard Osborne2013-01-211-12/+0
* Add instruction encodings / disassembly support for u6 / lu6 instructions.Richard Osborne2013-01-211-57/+30
* Add instruction encoding / disassembly support for ru6 / lru6 instructions.Richard Osborne2013-01-211-92/+71
* Use correct format for the LDAWCP instruction (u6).Richard Osborne2013-01-211-7/+3
* Add instruction encodings / disassembly support for l2rus instructions.Richard Osborne2013-01-201-21/+19
* Add instruction encodings / disassembly support for l3r instructions.Richard Osborne2013-01-201-47/+54
* Add instruction encodings / disassembler support for 2rus instructions.Richard Osborne2013-01-201-22/+23
* Add instruction encodings / disassembly support 3r instructions.Richard Osborne2013-01-201-54/+44
* Add instruction encodings / disassembly support for l2r instructions.Richard Osborne2012-12-171-28/+28
* Add instruction encodings for PEEK and ENDIN.Richard Osborne2012-12-171-8/+8
* Add instruction encodings / disassembly support for rus instructions.Richard Osborne2012-12-171-18/+19
* Add instruction encodings for ZEXT and SEXT.Richard Osborne2012-12-171-8/+8
* Add instruction encodings / disassembly support for 2r instructions.Richard Osborne2012-12-171-68/+66
* Add instruction encodings / disassembly support for 0r instructions.Richard Osborne2012-12-171-8/+8
* Add instruction encodings and disassembly for 1r instructions.Richard Osborne2012-12-161-33/+33
* Replace ${:comment} with the comment symbol.Richard Osborne2012-12-161-6/+6
* Fix load/store SDNode flags.Jakob Stoklund Olesen2012-08-241-2/+2
* Remove tabs.Bill Wendling2012-07-191-3/+3
* Remove variable_ops from call instructions in most targets.Jakob Stoklund Olesen2012-07-131-5/+3
* Fix pattern for MKMSK instruction.Richard Osborne2012-06-131-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Fix 80 column violations.Richard Osborne2011-09-231-6/+12
* Mark LDWCP as having no side effects.Richard Osborne2011-09-121-1/+1
* Add Uses=[SP] to call instructions. This fixes a miscompilation with aRichard Osborne2011-08-241-2/+2
* Add intrinsics for SETEV, GETED, GETET.Richard Osborne2011-08-181-7/+21
* Add intrinsics for the zext / sext instructions.Richard Osborne2011-07-191-7/+13
* Add intrinsics for the testct, testwct instructions.Richard Osborne2011-07-191-1/+9
* Add intrinsics for the peek and endin instructions.Richard Osborne2011-07-191-1/+8
* Fix 80 column violations.Richard Osborne2011-05-311-2/+5
* Add XCore intrinsic for crc8.Richard Osborne2011-05-311-0/+6
* Add XCore intrinsic for crc32.Richard Osborne2011-05-311-1/+7
* Add XCore intrinsics for initializing / starting / synchronizing threads.Richard Osborne2011-03-311-6/+39