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	Commit message (Expand)	Author	Age	Files	Lines
*	This corrects the implementation of Thumb ADR instruction. There are three i...	Mihai Popa	2013-07-03	6	-8/+46
*	ARM: relax the atomic release barrier to "dmb ishst" on Swift	Tim Northover	2013-07-03	1	-1/+11
*	[SystemZ] Rename mapping table fields	Richard Sandiford	2013-07-03	2	-37/+37
*	[SystemZ] Fix caller-allocated save slot FIXME	Richard Sandiford	2013-07-03	3	-46/+21
*	[XCore] Whitespace fixes, no functionality change.	Richard Osborne	2013-07-03	1	-3/+3
*	[XCore] Add ISel pattern for LDWCP	Richard Osborne	2013-07-03	1	-8/+7
*	Added posix function gettimeofday to LibFunc::Func for all platforms but Wind...	Michael Gottesman	2013-07-03	1	-0/+2
*	SystemZInstrInfo.cpp: Tweak an assertion. [-Wunused-variable]	NAKAMURA Takumi	2013-07-03	1	-2/+2
*	[PowerPC] PR16512 - Support TLS call sequences in the asm parser	Ulrich Weigand	2013-07-02	2	-2/+26
*	[PowerPC] Rework TLS call operand processing	Ulrich Weigand	2013-07-02	6	-23/+40
*	[PowerPC] Remove VK_PPC_TLSGD and VK_PPC_TLSLD	Ulrich Weigand	2013-07-02	2	-6/+4
*	SystemZ: Fold variable into assertion.	Benjamin Kramer	2013-07-02	1	-2/+2
*	[PowerPC] Support TLS variables in debug info	Ulrich Weigand	2013-07-02	2	-0/+13
*	[DebugInfo] Allow getDebugThreadLocalSymbol to return MCExpr	Ulrich Weigand	2013-07-02	3	-3/+3
*	Hexagon: Avoid unused variable warnings in Release builds.	Benjamin Kramer	2013-07-02	1	-6/+2
*	Remove address spaces from MC.	Rafael Espindola	2013-07-02	8	-26/+18
*	[SystemZ] Use DSGFR over DSGR in more cases	Richard Sandiford	2013-07-02	4	-6/+12
*	[SystemZ] Use MVC to spill loads and stores	Richard Sandiford	2013-07-02	3	-13/+113
*	[SystemZ] Add the MVC instruction	Richard Sandiford	2013-07-02	8	-124/+243
*	[XCore] Fix instruction selection for zext, mkmsk instructions.	Richard Osborne	2013-07-02	2	-2/+2
*	Fix ARM EHABI compact model 1 and 2 without handlerdata.	Logan Chien	2013-07-02	1	-3/+13
*	Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling	Hal Finkel	2013-07-02	4	-35/+62
*	[mips] Add new InstrItinClasses for move from/to coprocessor instructions and	Akira Hatanaka	2013-07-02	4	-56/+70
*	[PowerPC] Add support for TLS data relocations	Ulrich Weigand	2013-07-01	1	-0/+9
*	Change if (cond) ... else llvm_unreachable("text") to assert(cond && "text") ...	Richard Trieu	2013-07-01	1	-7/+5
*	PR16493: DebugInfo with TLS on PPC crashing due to invalid relocation	David Blaikie	2013-07-01	2	-0/+9
*	[PowerPC] Support all condition register logical instructions	Ulrich Weigand	2013-07-01	1	-5/+32
*	Add a newline.	Chad Rosier	2013-07-01	1	-1/+1
*	Index: test/CodeGen/PowerPC/reloc-align.ll	Bill Schmidt	2013-07-01	2	-0/+27
*	[ARMAsmParser] Sort the ARM register lists based on the encoding value, not the	Chad Rosier	2013-07-01	1	-15/+23
*	[mips] Reverse the order of source operands of shift and rotate instructions ...	Akira Hatanaka	2013-07-01	2	-8/+8
*	[PowerPC] Also add "msync" alias	Ulrich Weigand	2013-07-01	1	-0/+1
*	[mips] Increase the number of floating point control registers available to 32.	Akira Hatanaka	2013-07-01	1	-4/+9
*	Add jump tables handling for MSP430.	Anton Korobeynikov	2013-07-01	2	-0/+11
*	Don't form PPC CTR loops for over-sized exit counts	Hal Finkel	2013-07-01	1	-0/+3
*	AArch64: correct CodeGen of MOVZ/MOVK combinations.	Tim Northover	2013-07-01	2	-10/+14
*	Revert r185339 (ARM: relax the atomic release barrier to "dmb ishst")	Tim Northover	2013-07-01	1	-5/+1
*	[PowerPC] Fix @got references to local symbols	Ulrich Weigand	2013-07-01	1	-0/+34
*	[PowerPC] Add "wait" instruction	Ulrich Weigand	2013-07-01	1	-0/+7
*	[PowerPC] Support "eieio" instruction	Ulrich Weigand	2013-07-01	2	-0/+9
*	[PowerPC] Add variants of "sync" instruction	Ulrich Weigand	2013-07-01	2	-5/+12
*	ARM: relax the atomic release barrier to "dmb ishst"	Tim Northover	2013-07-01	1	-1/+5
*	[NVPTX] Add support for module-scope inline asm	Justin Holewinski	2013-07-01	1	-0/+10
*	[NVPTX] We dont use NVBuiltin anymore	Justin Holewinski	2013-07-01	2	-3/+0
*	[NVPTX] Cut down on physical register defs	Justin Holewinski	2013-07-01	3	-28/+13
*	[NVPTX] 64-bit ADDC/ADDE are not legal	Justin Holewinski	2013-07-01	1	-0/+3
*	[NVPTX] Fix vector loads from parameters that span multiple loads, and fix so...	Justin Holewinski	2013-07-01	2	-156/+9
*	[NVPTX] Handle signext/zeroext attributes properly	Justin Holewinski	2013-07-01	1	-19/+25
*	[NVPTX] Add support for native SIGN_EXTEND_INREG where available	Justin Holewinski	2013-07-01	2	-4/+32
*	[NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu.	Justin Holewinski	2013-07-01	2	-112/+430