| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove the unaligned load intrinsics in favor of using native unaligned loads. | Bill Wendling | 2011-04-12 | 2 | -31/+0 |
| * | The Thumb2 RFE instructions need to have their second halfword fully specified. | Johnny Chen | 2011-04-12 | 2 | -6/+11 |
| * | Add bad register checks for Thumb2 Ld/St instructions. | Johnny Chen | 2011-04-12 | 1 | -0/+45 |
| * | The Thumb2 Ld, St, and Preload instructions with the i12 forms should have it... | Johnny Chen | 2011-04-12 | 2 | -0/+5 |
| * | Print out a debug message when the reglist fails the sanity check for Thumb L... | Johnny Chen | 2011-04-12 | 2 | -0/+29 |
| * | Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM | Cameron Zwarich | 2011-04-12 | 1 | -2/+22 |
| * | A8.6.16 B | Johnny Chen | 2011-04-12 | 1 | -0/+5 |
| * | Thumb disassembler was erroneously rejecting "blx sp" instruction. | Johnny Chen | 2011-04-11 | 2 | -2/+14 |
| * | Fix an error in the MBlaze delay slot filler. | Wesley Peck | 2011-04-11 | 1 | -1/+1 |
| * | Add scheduling information for the MBlaze backend. | Wesley Peck | 2011-04-11 | 16 | -228/+710 |
| * | Don't crash on invalid instructions when disassembling MBlaze code. | Wesley Peck | 2011-04-11 | 3 | -36/+115 |
| * | Fix the bug where the immediate shift amount for Thumb logical shift instruct... | Johnny Chen | 2011-04-11 | 1 | -6/+17 |
| * | Fix another using-CPSR-twice bug in my ADCS/SBCS cleanups, and make proper us... | Owen Anderson | 2011-04-11 | 1 | -2/+5 |
| * | Trivial comment fix. | Johnny Chen | 2011-04-11 | 2 | -2/+2 |
| * | Check invalid register encodings for LdFrm/StFrm ARM instructions and flag th... | Johnny Chen | 2011-04-11 | 1 | -0/+68 |
| * | Adding support for printing operands symbolically to llvm's public 'C' | Kevin Enderby | 2011-04-11 | 4 | -6/+139 |
| * | Don't include Operator.h from InstrTypes.h. | Jay Foad | 2011-04-11 | 2 | -0/+2 |
| * | Bugfix in the Cpp backend after API change on PHINode::Create. | Nicolas Geoffray | 2011-04-10 | 1 | -1/+1 |
| * | fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately, | Chris Lattner | 2011-04-09 | 2 | -0/+19 |
| * | Fix an apparent typo that made GCC complain | Matt Beaumont-Gay | 2011-04-08 | 1 | -1/+1 |
| * | Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is... | Evan Cheng | 2011-04-08 | 2 | -23/+12 |
| * | Check opcoe (dmb, dsb) instead of bitfields matching. | Johnny Chen | 2011-04-08 | 1 | -12/+1 |
| * | Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. | Johnny Chen | 2011-04-08 | 1 | -9/+10 |
| * | Sanity check the option operand for DMB/DSB. | Johnny Chen | 2011-04-08 | 2 | -8/+29 |
| * | Mark hasExtraDefRegAllocReq=1 on LDRD. | Jim Grosbach | 2011-04-08 | 1 | -1/+5 |
| * | Add sanity checking for bad register specifier(s) for the DPFrm instructions. | Johnny Chen | 2011-04-08 | 1 | -0/+30 |
| * | Replace the old algorithm that emitted the "print the alias for an instruction" | Bill Wendling | 2011-04-07 | 4 | -5/+22 |
| * | Add option to emit @llvm.trap as a function call instead of a trap instructio... | Evan Cheng | 2011-04-07 | 1 | -1/+23 |
| * | Fix indentation. | Akira Hatanaka | 2011-04-07 | 1 | -2/+2 |
| * | Update ATUsed every time after expandRegLargeImmPair is called. | Akira Hatanaka | 2011-04-07 | 1 | -4/+8 |
| * | Fixed encoding for VEXTqf | Mon P Wang | 2011-04-07 | 1 | -2/+2 |
| * | Fix handling of functions with internal linkage. | Akira Hatanaka | 2011-04-07 | 1 | -8/+27 |
| * | Add sanity checking for invalid register encodings for signed/unsigned extend... | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | Add sanity checking for invalid register encodings for saturating instructions. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | Add some more comments about checkings of invalid register numbers. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector... | Tanya Lattner | 2011-04-07 | 1 | -0/+6 |
| * | Sanity check MSRi for invalid mask values and reject it as invalid. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| * | The ARM disassembler was not recognizing USADA8 instruction. Need to add che... | Johnny Chen | 2011-04-07 | 1 | -3/+5 |
| * | Change -arm-divmod-libcall to a target neutral option. | Evan Cheng | 2011-04-07 | 2 | -6/+7 |
| * | Should also check SMLAD for invalid register values. | Johnny Chen | 2011-04-07 | 1 | -6/+12 |
| * | Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for ... | Owen Anderson | 2011-04-06 | 1 | -1/+8 |
| * | Cleanups from Jim: remove redundant constraints and a dead FIXME. | Owen Anderson | 2011-04-06 | 1 | -11/+5 |
| * | Tidy up. | Jim Grosbach | 2011-04-06 | 1 | -2/+1 |
| * | A8.6.393 | Johnny Chen | 2011-04-06 | 1 | -26/+47 |
| * | A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" | Johnny Chen | 2011-04-06 | 1 | -1/+14 |
| * | Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong. | Johnny Chen | 2011-04-06 | 2 | -1/+3 |
| * | Add another case we are not optimizing. | Rafael Espindola | 2011-04-06 | 1 | -0/+30 |
| * | The original issue has been fixed by not doing unnecessary sign extensions. | Rafael Espindola | 2011-04-06 | 1 | -14/+17 |
| * | Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function. | Johnny Chen | 2011-04-06 | 1 | -7/+3 |
| * | Reapply r128946 (pseudoization of various instructions), and fix the extra im... | Owen Anderson | 2011-04-05 | 2 | -65/+42 |
