| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672. | Chris Lattner | 2005-12-03 | 1 | -0/+14 |
| * | bah, must generate all results | Andrew Lenharth | 2005-12-02 | 1 | -2/+8 |
| * | cycle counter fix | Andrew Lenharth | 2005-12-02 | 1 | -0/+6 |
| * | add a note | Chris Lattner | 2005-12-02 | 1 | -0/+6 |
| * | Don't remove two operand, two result nodes from the binary ops map. These | Chris Lattner | 2005-12-01 | 1 | -36/+39 |
| * | Promote line and column number information for our friendly 64-bit targets. | Chris Lattner | 2005-12-01 | 1 | -3/+10 |
| * | IA64 doesn't support the LOCATION node, and for some reason the ISelPattern | Chris Lattner | 2005-12-01 | 1 | -0/+3 |
| * | Make sure these get added into the codegenmap when appropriate | Chris Lattner | 2005-12-01 | 1 | -4/+5 |
| * | This is a bugfix for SelectNodeTo. In certain situations, we could be | Chris Lattner | 2005-12-01 | 1 | -0/+110 |
| * | major think-o | Andrew Lenharth | 2005-12-01 | 1 | -5/+10 |
| * | Support multiple ValueTypes per RegisterClass, needed for upcoming vector | Nate Begeman | 2005-12-01 | 11 | -38/+49 |
| * | Cosmetic change, better reflects actual values | Nate Begeman | 2005-12-01 | 1 | -6/+5 |
| * | Fix a regression caused by a patch earlier today | Chris Lattner | 2005-12-01 | 1 | -1/+2 |
| * | Flags where I think I need them, quick, before the nightly tester starts | Andrew Lenharth | 2005-12-01 | 1 | -23/+42 |
| * | Proper support for shifts with register shift value. | Evan Cheng | 2005-12-01 | 2 | -44/+24 |
| * | Use a getCopyToReg() variant to generate a flaggy CopyToReg node. | Evan Cheng | 2005-12-01 | 1 | -8/+2 |
| * | SelectNodeTo now returns its result, we must pay attention to it. | Chris Lattner | 2005-11-30 | 1 | -40/+29 |
| * | Pay attn to the node returned by SelectNodeTo | Chris Lattner | 2005-11-30 | 1 | -37/+28 |
| * | SelectNodeTo now returns its result, we must pay attention to it. | Chris Lattner | 2005-11-30 | 1 | -20/+18 |
| * | SelectNodeTo now returns N. Use it instead of return N directly. | Chris Lattner | 2005-11-30 | 1 | -108/+81 |
| * | Make SelectNodeTo return N | Chris Lattner | 2005-11-30 | 1 | -35/+49 |
| * | Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll | Chris Lattner | 2005-11-30 | 1 | -2/+6 |
| * | Fix a bug where we didn't realize that vaarg reads memory. This fixes | Chris Lattner | 2005-11-30 | 1 | -0/+7 |
| * | Fix a typo in my latest change | Nate Begeman | 2005-11-30 | 1 | -2/+2 |
| * | No longer track value types for asm printer operands, and remove them as | Nate Begeman | 2005-11-30 | 8 | -89/+92 |
| * | CALLSEQ_START/END nodes don't get memoized, do not add them in when | Chris Lattner | 2005-11-30 | 1 | -0/+4 |
| * | remove redundant code | Andrew Lenharth | 2005-11-30 | 1 | -14/+2 |
| * | At long last, you can say that f32 isn't supported for setcc | Andrew Lenharth | 2005-11-30 | 1 | -1/+28 |
| * | Make typesafe that which isn't: FCMOVxx | Andrew Lenharth | 2005-11-30 | 4 | -26/+52 |
| * | FPSelect and more custom lowering | Andrew Lenharth | 2005-11-30 | 5 | -25/+69 |
| * | First chunk of actually generating vector code for packed types. These | Nate Begeman | 2005-11-30 | 2 | -13/+63 |
| * | All sorts of stuff. | Andrew Lenharth | 2005-11-30 | 7 | -32/+203 |
| * | add support for custom lowering SINT_TO_FP | Andrew Lenharth | 2005-11-30 | 1 | -0/+13 |
| * | Fix a problem with llvm-ranlib that (on some platforms) caused the archive | Reid Spencer | 2005-11-30 | 5 | -72/+174 |
| * | Fix a bug in a recent patch that broke shifts | Chris Lattner | 2005-11-30 | 1 | -3/+3 |
| * | Added support to STORE and shifts to DAG to DAG isel. | Evan Cheng | 2005-11-30 | 1 | -8/+88 |
| * | Fixed a bug introduced by my last commit: TargetGlobalValues should key on | Evan Cheng | 2005-11-30 | 1 | -7/+13 |
| * | Added an index field to GlobalAddressSDNode so it can represent X+12, etc. | Evan Cheng | 2005-11-30 | 3 | -3/+23 |
| * | Fixed a minor bug: - -offset != offset iff offset == MININT | Evan Cheng | 2005-11-30 | 1 | -1/+1 |
| * | Represent the encoding of the SPR instructions as they actually are, so | Nate Begeman | 2005-11-29 | 2 | -8/+18 |
| * | Add more X86 ISel patterns. | Evan Cheng | 2005-11-29 | 1 | -407/+463 |
| * | Hook up one type, v4f32, to the VR RegisterClass for now. | Nate Begeman | 2005-11-29 | 1 | -0/+6 |
| * | Add the remainder of the AltiVec 4 x float instructions. Further | Nate Begeman | 2005-11-29 | 2 | -14/+61 |
| * | Add support for a new STRING and LOCATION node for line number support, patch | Chris Lattner | 2005-11-29 | 4 | -2/+113 |
| * | No targets support line number info yet. | Chris Lattner | 2005-11-29 | 4 | -0/+12 |
| * | Add the majority of the vector machien value types we expect to support, | Nate Begeman | 2005-11-29 | 5 | -7/+19 |
| * | Fixed a comment bug: | Evan Cheng | 2005-11-29 | 1 | -1/+1 |
| * | refix typo | Chris Lattner | 2005-11-29 | 1 | -1/+1 |
| * | don't say this is i128, because it isn't yet. Hopefully nate will change | Chris Lattner | 2005-11-29 | 1 | -1/+1 |
| * | revert my change for the time being, which broke the build | Chris Lattner | 2005-11-29 | 1 | -1/+1 |
