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* Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ...Evan Cheng2010-10-287-8/+8
* - Assign load / store with shifter op address modes the right itinerary classes.Evan Cheng2010-10-287-8/+8
* Shifter ops are not always free. Do not fold them (especially to formEvan Cheng2010-10-271-9/+63
* SelectionDAG shuffle nodes do not allow operands with different numbers ofBob Wilson2010-10-271-0/+18
* FileCheck'izeJim Grosbach2010-10-261-2/+3
* When the "true" and "false" blocks of a diamond if-conversion are the same,Bob Wilson2010-10-261-0/+31
* Add support for emitting ARM file attributes.Rafael Espindola2010-10-251-0/+19
* tidy upJim Grosbach2010-10-221-3/+2
* Remove duplicate test.Jim Grosbach2010-10-221-9/+0
* tidy up.Jim Grosbach2010-10-221-33/+33
* FileCheck-ize a few tests.Jim Grosbach2010-10-222-21/+26
* putback r116983 and fix simple-fp-encoding.ll testsAndrew Trick2010-10-212-2/+3
* Revert r116983, which is breaking all the buildbots.Owen Anderson2010-10-212-3/+2
* Add missing scheduling itineraries for transfers between core registers and V...Evan Cheng2010-10-212-2/+3
* Re-enable register pressure aware machine licm with fixes. Hoist() may haveEvan Cheng2010-10-191-65/+0
* Revert r116781 "- Add a hook for target to determine whether an instruction defDaniel Dunbar2010-10-191-0/+65
* - Add a hook for target to determine whether an instruction def isEvan Cheng2010-10-191-65/+0
* Support alignment for NEON vld-lane and vst-lane instructions.Bob Wilson2010-10-192-39/+59
* Revert r116220 - thus turning arm fast isel back on by default.Eric Christopher2010-10-181-2/+2
* ARM instructions that are both predicated and set the condition codesBob Wilson2010-10-151-0/+47
* Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudosJim Grosbach2010-10-141-1/+1
* Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx'Jim Grosbach2010-10-141-1/+1
* Found a bug turning this on by default. Disable again for now.Eric Christopher2010-10-111-2/+2
* Remove now non-existent option.Eric Christopher2010-10-111-2/+2
* Correct some load / store instruction itinerary mistakes:Evan Cheng2010-10-091-1/+1
* Simplify test and move into a generic "crash" ll file.Bill Wendling2010-10-092-118/+29
* Check to make sure that the iterator isn't at the beginning of the basic blockBill Wendling2010-10-091-0/+118
* Change register allocation order for ARM VFP and NEON registers to put theBob Wilson2010-10-0815-100/+129
* Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.Jim Grosbach2010-10-071-2/+2
* - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng2010-10-062-3/+3
* Try again to disable critical edge splitting in CodeGenPrepare.Jakob Stoklund Olesen2010-09-301-2/+2
* Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()Jason W Kim2010-09-301-0/+13
* Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.Bob Wilson2010-09-291-2/+2
* do not compare actual branch labels; this may fix llvm-gcc-x86_64-darwin10-cr...Gabor Greif2010-09-291-3/+3
* improve heuristics to find the 'and' corresponding to 'tst' to also catch opp...Gabor Greif2010-09-291-8/+12
* Add a subtarget hook for reporting the misprediction penalty. Use this to pro...Owen Anderson2010-09-281-1/+1
* User proper libcall names & condcodes while compiling for ARM EABI.Anton Korobeynikov2010-09-281-1/+1
* Part one of switching to using a more sane heuristic for determining if-conve...Owen Anderson2010-09-281-2/+1
* Add a command line option "-arm-strict-align" to disallow unaligned memoryBob Wilson2010-09-281-0/+1
* Revert "Disable codegen prepare critical edge splitting. Machine instruction ...Jakob Stoklund Olesen2010-09-271-3/+3
* Explicitly disable CGP critical edge splitting for this test so it won't breakJakob Stoklund Olesen2010-09-271-1/+1
* Don't depend on basic block numbering.Jakob Stoklund Olesen2010-09-271-7/+8
* Enable code placement optimization pass for ARM.Evan Cheng2010-09-242-3/+52
* Set alignment operand for NEON VST instructions.Bob Wilson2010-09-235-42/+64
* Set alignment operand for NEON VLD instructions.Bob Wilson2010-09-234-36/+53
* Disable codegen prepare critical edge splitting. Machine instruction passes nowEvan Cheng2010-09-231-3/+3
* OptimizeCompareInstr should avoid iterating pass the beginning of the MBB whe...Evan Cheng2010-09-211-0/+84
* Simplify ARM callee-saved register handling by removing the distinctionJim Grosbach2010-09-201-1/+1
* Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64Bob Wilson2010-09-171-0/+26
* Teach the (non-MC) instruction printer to use the cannonical names for push/pop,Jim Grosbach2010-09-173-6/+9
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