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* Reapply r141365 now that PR11107 is fixed.Bill Wendling2011-10-101-3/+8
* Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame toBill Wendling2011-10-101-8/+3
* When getting the number of bits necessary for addressing modeBill Wendling2011-10-101-1/+1
* Peephole optimization for ABS on ARM.Anton Korobeynikov2011-10-071-3/+8
* Convert more tests to new atomic instructions.Eli Friedman2011-09-261-13/+1
* Disable these tests harder. They're XFAIL'd, but that means they still run, andNick Lewycky2011-09-061-1/+2
* Revert r131152, r129796, r129761. This code is currently consideredDan Gohman2011-09-011-0/+3
* Change some ARM subtarget features to be single bit yes/no in order to sink t...Evan Cheng2011-07-071-1/+1
* Add support for the 'h' constraint.Eric Christopher2011-06-301-0/+7
* rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which isChris Lattner2011-06-181-2/+2
* manually upgrade a bunch of tests to modern syntax, and remove some thatChris Lattner2011-06-172-150/+0
* Don't use register classes larger than TLI->getRegClassFor(VT).Jakob Stoklund Olesen2011-06-161-0/+24
* FileCheck-ize test, and make it work on EABI hosts, like clang-native-arm-cor...Eli Friedman2011-06-161-7/+34
* Move this test to CodeGen/Thumb. rdar://problem/9416774Stuart Hastings2011-05-111-0/+60
* Fix more register and coalescing dependencies.Jakob Stoklund Olesen2011-05-041-1/+1
* Be careful about scheduling nodes above previous calls. It increase usages ofEvan Cheng2011-04-261-20/+0
* Make tests register allocation independent again.Jakob Stoklund Olesen2011-04-191-1/+1
* Follow up on r127913. Fix Thumb revsh isel. rdar://9286766Evan Cheng2011-04-141-0/+56
* Fix Thumb and Thumb2 tests to be register allocator independent.Jakob Stoklund Olesen2011-03-311-12/+15
* Provide a legal pointer register class when targeting thumb1.Jakob Stoklund Olesen2011-03-311-1/+1
* Roll r127459 back in:Cameron Zwarich2011-03-111-1/+1
* Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar2011-03-111-1/+1
* Optimize trivial branches in CodeGenPrepare, which often get created from theCameron Zwarich2011-03-111-1/+1
* Sorry, several patches in one.Evan Cheng2011-01-201-41/+0
* Spill R4 if it's going to be used to restore SP from FP.Evan Cheng2011-01-161-0/+17
* Thumb1 had two patterns for the same load-from-constant-pool instruction.Jim Grosbach2010-12-151-3/+3
* If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG messag...Devang Patel2010-12-061-24/+19
* Fix epilogue codegen to avoid leaving the stack pointer in an invalidEvan Cheng2010-11-222-8/+23
* These tests are looking for library function names thatDale Johannesen2010-11-172-2/+2
* Do not use MEMBARRIER_MCR for any Thumb code.Bob Wilson2010-11-091-0/+1
* Overhaul memory barriers in the ARM backend. Radar 8601999.Bob Wilson2010-10-301-5/+5
* Try again to disable critical edge splitting in CodeGenPrepare.Jakob Stoklund Olesen2010-09-301-1/+1
* Revert "Disable codegen prepare critical edge splitting. Machine instruction ...Jakob Stoklund Olesen2010-09-271-1/+1
* Disable codegen prepare critical edge splitting. Machine instruction passes nowEvan Cheng2010-09-231-1/+1
* Re-enable usage of the ARM base pointer. r113394 fixed the known failures.Jim Grosbach2010-09-081-1/+1
* disable for the moment while tracking down a few Thumb2-O0 failure that lookJim Grosbach2010-09-081-1/+1
* Re-apply r112883:Jim Grosbach2010-09-031-1/+1
* Revert "For ARM stack frames that utilize variable sized objects and have eit...Daniel Dunbar2010-09-031-1/+1
* For ARM stack frames that utilize variable sized objects and have eitherJim Grosbach2010-09-021-1/+1
* Update test for 112609Jim Grosbach2010-08-311-1/+1
* Correct bogus module triple specifications.Duncan Sands2010-08-301-1/+1
* Enable pre-RA virtual frame base register allocation. rdar://8277890Jim Grosbach2010-08-261-2/+2
* Fix test and re-enable it.Evan Cheng2010-08-111-4/+4
* Temporarily disable some failing tests, until they can beDan Gohman2010-08-111-2/+2
* Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.)Evan Cheng2010-08-111-6/+6
* Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bitEvan Cheng2010-08-111-5/+12
* - Add subtarget feature -mattr=+db which determine whether an ARM cpu has theEvan Cheng2010-08-111-0/+17
* Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function...Evan Cheng2010-08-101-7/+22
* Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FPDaniel Dunbar2010-08-101-22/+7
* Fix ARM hasFP() semantics. It should return true whenever FP register isEvan Cheng2010-08-101-7/+22