aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen
Commit message (Expand)AuthorAgeFilesLines
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-131-2/+2
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-131-1/+1
* Fix test case added in patch fixing PR14314Michael Liao2012-11-121-4/+4
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-121-0/+2
* Fix PR14314Michael Liao2012-11-122-4/+17
* [NVPTX] Add more precise PTX/SM target attributesJustin Holewinski2012-11-1210-0/+60
* Convert an improper CodeGen test to a MC test.Evan Cheng2012-11-101-25/+0
* xfail a bad test. This is a MC test but it's dependent on a codegen optimizat...Evan Cheng2012-11-101-0/+2
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-102-15/+0
* Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper2012-11-101-5/+47
* [NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski2012-11-091-0/+25
* Fix assertions in updateRegMaskSlots().Jakob Stoklund Olesen2012-11-091-0/+45
* Recommit modified r167540.Amara Emerson2012-11-081-2/+2
* Add support of RTM from TSX extensionMichael Liao2012-11-081-0/+30
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-071-0/+63
* misched: Heuristics based on the machine model.Andrew Trick2012-11-071-0/+230
* On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand2012-11-052-1/+99
* Add support for the PowerPC-specific inline asm Z constraint and y modifier.Hal Finkel2012-11-051-0/+14
* [PATCH] PowerPC: Expand load extend vector operationsAdhemerval Zanella2012-11-051-0/+155
* [mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka2012-11-031-0/+16
* [mips] Set flag isAsCheapAsAMove flag on instruction LUi.Akira Hatanaka2012-11-031-0/+25
* [mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka2012-11-031-4/+18
* [mips] Fix bug in test case. Disable machine LICM to prevent instruction fromAkira Hatanaka2012-11-021-2/+3
* Vext Lowering was missing opportunitiesQuentin Colombet2012-11-021-0/+33
* [mips] Use register number instead of name to print register $AT.Akira Hatanaka2012-11-023-13/+13
* [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directiveAkira Hatanaka2012-11-021-0/+11
* test/CodeGen/X86/fp-fast.ll: Add +avx.NAKAMURA Takumi2012-11-011-1/+1
* Add a few more simple fast-math constant propagations and cancellations.Owen Anderson2012-11-011-0/+20
* (For X86) Enhancement to add-carray/sub-borrow (adc/sbb) optimization.Shuxin Yang2012-10-312-1/+13
* [mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enablesAkira Hatanaka2012-10-311-0/+26
* Test case for r167039. Check that tail-call optimization is disabled forAkira Hatanaka2012-10-311-0/+23
* Implement ADJCALLSTACKUP and ADJCALLSTACKDOWNReed Kotler2012-10-311-26/+58
* This patch addresses an ABI compatibility issue with empty aggregateBill Schmidt2012-10-311-0/+51
* X86 SSE: update rsqrtss and rcpss to use two source operands andManman Ren2012-10-301-0/+36
* X86 MMX: optimize transfer from mmx to i32Manman Ren2012-10-301-0/+14
* [mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka2012-10-301-1/+65
* PowerPC: Expand FSRQT for vector typesAdhemerval Zanella2012-10-301-0/+71
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-301-2/+2
* PowerPC: More support for Altivec compare operationsAdhemerval Zanella2012-10-301-14/+350
* Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg2012-10-301-84/+0
* Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler2012-10-302-3/+3
* Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chanceJakub Staszak2012-10-301-5/+9
* Revert r166971. It causes buildbot failure. To be investigated.Jakub Staszak2012-10-291-9/+5
* llvm/test/CodeGen/X86/vec_shuffle-30.ll: Try to unbreak builds - assuming +avx.NAKAMURA Takumi2012-10-291-1/+1
* Allow to fold vector load if there is more than one bitcast, so in the case:Jakub Staszak2012-10-291-5/+9
* This patch solves a problem with passing varargs parameters under the PPC64Bill Schmidt2012-10-291-0/+23
* Implement patterns for extloadi8 and extloadi16Reed Kotler2012-10-291-0/+69
* In various places throughout the code generator, there were specialUlrich Weigand2012-10-291-1/+2
* Remove redundant test case from r166949, per Eli's suggestion.Chad Rosier2012-10-291-107/+0
* [ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] isChad Rosier2012-10-291-0/+107