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* NEON VST4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-241-17/+39
* NEON VLD4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-241-19/+39
* NEON VST3(single element from one lane) assembly parsing.Jim Grosbach2012-01-241-0/+35
* NEON VST3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-231-19/+39
* NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-232-65/+73
* Intel syntax: Robustify parsing of memory operand's displacement experssion.Devang Patel2012-01-231-2/+4
* NEON VLD3 lane-indexed assembly parsing and encoding.Jim Grosbach2012-01-231-11/+33
* Add support for .cfi_signal_frame. Fixes pr11762.Rafael Espindola2012-01-231-0/+23
* Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI]Devang Patel2012-01-231-1/+3
* Simplify some NEON assembly pseudo definitions.Jim Grosbach2012-01-231-8/+8
* Intel syntax: Parse segment registers.Devang Patel2012-01-231-0/+2
* Intel syntax: Robustify register parsing.Devang Patel2012-01-201-0/+2
* Intel syntax: Parse ... PTR [-8]Devang Patel2012-01-201-1/+2
* Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.Devang Patel2012-01-201-1/+4
* NEON use vmov.i32 to splat some f32 values into vectors.Jim Grosbach2012-01-201-0/+8
* Post process 'and', 'sub' instructions and select better encoding, if available.Devang Patel2012-01-191-0/+8
* Intel syntax: There is no need to create unary expr for simple negative displ...Devang Patel2012-01-191-0/+4
* Post process 'xor', 'or' and 'cmp' instructions and select better encoding, i...Devang Patel2012-01-191-0/+22
* Add testcase.Jim Grosbach2012-01-191-0/+13
* Thumb2 alternate syntax for LDR(literal) and friends.Jim Grosbach2012-01-181-0/+27
* Process instructions after match to select alternative encoding which may be ...Devang Patel2012-01-181-0/+24
* Thumb2 relaxation for LDR(literal).Jim Grosbach2012-01-181-0/+13
* MC tweak symbol difference resolution for non-local symbols.Jim Grosbach2012-01-173-5/+7
* Tidy up.Jim Grosbach2012-01-171-2/+2
* Intel syntax: Fix parser match class to check memory operand size.Devang Patel2012-01-171-0/+2
* Intel syntax: Parse "BYTE PTR [RDX + RCX]"Devang Patel2012-01-171-0/+2
* Intel syntax: Do not unncessarily create plus expression for memory operand d...Devang Patel2012-01-171-0/+2
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-171-0/+8
* Intel syntax: Robustify memory operand parsing.Devang Patel2012-01-171-0/+8
* Add new test.Devang Patel2012-01-131-0/+10
* Remove test case, as Chris suggested.Devang Patel2012-01-121-23/+0
* Add test case to check intel syntax parsing.Devang Patel2012-01-121-0/+23
* The error check for using -g with a .s file already containing dwarf .fileKevin Enderby2012-01-111-0/+9
* Add big endian mips support. Based on a patch by Jack Carter.Rafael Espindola2012-01-111-0/+2
* Add the skeleton of an asm parser for mips.Rafael Espindola2012-01-111-0/+5
* Various crash reporting tools have a problem with the dwarf generated forKevin Enderby2012-01-101-8/+17
* Split Finish into Finish and FinishImpl to have a common place to do end ofRafael Espindola2012-01-071-0/+5
* Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper2011-12-301-2/+5
* Add FMA4 instructions to disassembler.Craig Topper2011-12-301-0/+6
* Implement cfi_restore. Patch by Brian Anderson!Rafael Espindola2011-12-291-0/+42
* Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 ins...Craig Topper2011-12-291-0/+12
* Implement .cfi_escape. Patch by Brian Anderson!Rafael Espindola2011-12-291-0/+42
* Expose FMA3 instructions to the disassembler.Craig Topper2011-12-291-0/+24
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-221-0/+12
* Fix incorrect relocation generation. Patch by Kristof Beyls.Rafael Espindola2011-12-221-0/+23
* ARM assembler should accept shift-by-zero for any shifted-immediate operand.Jim Grosbach2011-12-221-0/+17
* Local dynamic TLS model for direct object output. Create the correct TLS MIPSAkira Hatanaka2011-12-221-0/+36
* ARM VFP optional data type on VMOV GPR<-->SPR.Jim Grosbach2011-12-211-0/+28
* Thumb2 assembly parsing of 'mov rd, rn, rrx'.Jim Grosbach2011-12-211-1/+2
* Thumb2 assembly parsing of 'mov(register shifted register)' aliases.Jim Grosbach2011-12-211-0/+25
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