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* [ms-inline asm] Add support for .att_syntax directive.Chad Rosier2012-09-101-2/+4
* Fix alignment of .comm and .lcomm on mingw32.Benjamin Kramer2012-09-071-0/+13
* Initial relocations test for the Mips standalone assembler.Jack Carter2012-09-071-0/+41
* MC: Overhaul handling of .lcommBenjamin Kramer2012-09-073-4/+30
* PR13754: llvm-mc/x86 crashes on .cfi directives without the % prefix for regi...Benjamin Kramer2012-09-071-0/+18
* The Mips standalone assembler aliased instruction support.Jack Carter2012-09-072-0/+27
* The Mips standalone assembler intial directive support.Jack Carter2012-09-071-0/+10
* The Mips standalone assembler fpu instruction support.Jack Carter2012-09-072-0/+166
* The Mips standalone assembler memory instruction support.Jack Carter2012-09-061-0/+41
* Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover2012-09-062-2/+6
* Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover2012-09-065-0/+93
* Use correct part of complex operand to encode VST1 alignment.Tim Northover2012-09-061-0/+77
* Mips specific llvm assembler support for branch and jump instructions.Jack Carter2012-09-061-0/+64
* Mips specific llvm assembler support for ALU instructions. This includesJack Carter2012-09-051-0/+81
* The instruction DINS may be transformed into DINSU or DEXTM dependingJack Carter2012-08-311-0/+29
* X86: Fix encoding of 'movd %xmm0, %rax'Jim Grosbach2012-08-311-0/+4
* The instruction DEXT may be transformed into DEXTU or DEXTM dependingJack Carter2012-08-281-0/+28
* Some instructions are passed to the assembler to beJack Carter2012-08-281-1/+4
* Fix mips' long branch pass.Akira Hatanaka2012-08-281-2/+5
* Add option disable-mips-delay-filler. Turn on mips' delay slot filler byAkira Hatanaka2012-08-223-4/+4
* For mips64 switch statements in subroutines could generate Jack Carter2012-08-221-0/+39
* Fix macros arguments with an underscore, dot or dollar in them. This is basedRafael Espindola2012-08-211-0/+21
* Make the wording in of the "expected identifier" error in the .macro directiveRafael Espindola2012-08-211-0/+9
* ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines.Jim Grosbach2012-08-132-8/+10
* Give this test an explicit triple.Nick Lewycky2012-08-121-1/+1
* When emitting the PC range in an FDE, use the same data encoding for both endsNick Lewycky2012-08-121-0/+28
* Another 32 to 64 bit sign extension bug.Jack Carter2012-08-091-4/+9
* llvm/test/MC/COFF/seh.s: Fixup corresponding to r161487.NAKAMURA Takumi2012-08-081-1/+0
* Add `.pushsection', `.popsection', and `.previous' directives to Darwin ASM.Bill Wendling2012-08-082-0/+29
* The define for 64 bit sign extension neglected to Jack Carter2012-08-071-0/+15
* The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64 Jack Carter2012-08-061-0/+18
* Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.Jack Carter2012-08-061-0/+27
* Support fpv4 for ARM Cortex-M4.Jiangning Liu2012-08-021-0/+4
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-022-1/+23
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-024-33/+235
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-024-0/+18
* Keep empty assembly macro argument values in the middle of the list.Jim Grosbach2012-07-301-0/+12
* Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cppKevin Enderby2012-07-301-0/+44
* Make l/q suffixes on AVX forms of scalar convert instructions consistent with...Craig Topper2012-07-264-36/+36
* Make x86 asm parser to check for xmm vs ymm for index register in gather inst...Craig Topper2012-07-183-0/+39
* Doubleword Shift Left Logical Plus 32Jack Carter2012-07-161-0/+45
* The Mips specific relocation R_MIPS_GOT_DISP Jack Carter2012-07-131-0/+18
* test case for revision 160084: Alignment filling between Mips function unitsJack Carter2012-07-131-0/+23
* Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck.Akira Hatanaka2012-07-128-760/+694
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-102-1/+41
* Reverse assembler/disassembler operand order for gather instructions.Craig Topper2012-07-102-16/+16
* Revert r159938 (and r159945) to appease the buildbots.Chad Rosier2012-07-091-21/+0
* Reapply r158846.Akira Hatanaka2012-07-094-160/+172
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-091-0/+21
* Prevent ARM assembler from losing a right shift by #32 applied to a registerRichard Barton2012-07-091-0/+33
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