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* Remove 'site.exp' building from both CMake and configure+make.Chandler Carruth2012-06-285-62/+14
| | | | | | | | | | | This is another vestige of the DejaGNU roots. There were FIXMEs in the lit setup to add a 'lit.site.cfg', which has been around for quite some time now, so I've properly switched the handling of the 4 things actually used in site.exp to go through lit.site.cfg now. No more parsing of the .exp file, one fewer configure-style generated file, etc., etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159313 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the last vestiges of the '-lit' and '-dg' test runner split byChandler Carruth2012-06-281-9/+9
| | | | | | | | removing '-lit' qualifiers from make rules. I've left a legacy 'check-local-lit' rule in case build scripts have this encoded somewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159311 91177308-0d34-0410-b5e6-96231b3b80d8
* Rip out legacy DejaGNU support from our Makefiles. This hasn't been theChandler Carruth2012-06-271-22/+0
| | | | | | | default in forever, and hasn't even worked since most of the .exp files were removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159307 91177308-0d34-0410-b5e6-96231b3b80d8
* LLVM-GCC is dead. Really. I promise. ;]Chandler Carruth2012-06-271-2/+0
| | | | | | | More importantly, these files don't even have the variable that these lines purport to substite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159304 91177308-0d34-0410-b5e6-96231b3b80d8
* This allows hello world to be compiled for Mips 64 direct object.Jack Carter2012-06-271-0/+39
| | | | | | | | | | | | It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocations as well. This passes make check. Jack git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159302 91177308-0d34-0410-b5e6-96231b3b80d8
* This allows hello world to be compiled for Mips 64 direct object.Jack Carter2012-06-271-9/+29
| | | | | | | | | | | | It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocations as well. This passes make check. Jack git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159301 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r159136 due to PR13124.Matt Beaumont-Gay2012-06-271-14/+0
| | | | | | | | | | | Original commit message: If a constant or a function has linkonce_odr linkage and unnamed_addr, mark it hidden. Being linkonce_odr guarantees that it is available in every dso that needs it. Being a constant/function with unnamed_addr guarantees that the copies don't have to be merged. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159272 91177308-0d34-0410-b5e6-96231b3b80d8
* Some reassociate optimizations create new instructions, which they insert justDuncan Sands2012-06-271-0/+14
| | | | | | | | | | | | before the expression root. Any existing operators that are changed to use one of them needs to be moved between it and the expression root, and recursively for the operators using that one. When I rewrote RewriteExprTree I accidentally inverted the logic, resulting in the compacting going down from operators to operands rather than up from operands to the operators using them, oops. Fix this, resolving PR12963. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159265 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach assembler to handle capitalised operation values for DSB instructionsRichard Barton2012-06-271-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159259 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up the 'check' CMake build rule a bit, notable renaming it toChandler Carruth2012-06-271-19/+28
| | | | | | | | | | | | | | | | | | | | | | | | | 'check-llvm'. Don't worry! 'check' still works! =] To rationalize the names of targets used to run tests, the vague plan is the following: make check-llvm # run LLVM reg/unit tests (currently 'check') make check-clang # run Clang reg/unit tests (currently 'clang-test') make check-rt # run CompilerRT reg/unit tests make check-asan # run ASan reg/unit tests (subset of -rt) make check-tsan # run TSan reg/unit tests (subset of -rt) make check-all # run as much of the above as is available The last one respects what projects are checked out and built for a given tree. Personally, I would like to eventually make 'check' be an alias for 'check-all'. For now however, it is an alias for 'check-llvm', and thus no behavior has changed. While this patch and my plan only really apply to CMake, I think it might be good to similarly rationalize the naming scheme for the Make builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159258 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for r159240.Akira Hatanaka2012-06-271-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159242 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a instcombine transform that (no longer?) makes sense:Evan Cheng2012-06-262-28/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | // C - zext(bool) -> bool ? C - 1 : C if (ZExtInst *ZI = dyn_cast<ZExtInst>(Op1)) if (ZI->getSrcTy()->isIntegerTy(1)) return SelectInst::Create(ZI->getOperand(0), SubOne(C), C); This ends up forming sext i1 instructions that codegen to terrible code. e.g. int blah(_Bool x, _Bool y) { return (x - y) + 1; } => movzbl %dil, %eax movzbl %sil, %ecx shll $31, %ecx sarl $31, %ecx leal 1(%rax,%rcx), %eax ret Without the rule, llvm now generates: movzbl %sil, %ecx movzbl %dil, %eax incl %eax subl %ecx, %eax ret It also helps with ARM (and pretty much any target that doesn't have a sext i1 :-). The transformation was done as part of Eli's r75531. He has given the ok to remove it. rdar://11748024 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159230 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix llc's -print-before=pass and -print-after=pass.Rafael Espindola2012-06-261-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159227 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-263-0/+94
| | | | | | | | | | | | | Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
* There are a number of generic inline asm operand modifiers thatJack Carter2012-06-261-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | up to r158925 were handled as processor specific. Making them generic and putting tests for these modifiers in the CodeGen/Generic directory caused a number of targets to fail. This commit addresses that problem by having the targets call the generic routine for generic modifiers that they don't currently have explicit code for. For now only generic print operands 'c' and 'n' are supported.vi Affected files: test/CodeGen/Generic/asm-large-immediate.ll lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/NVPTX/NVPTXAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/XCore/XCoreAsmPrinter.cpp lib/Target/X86/X86AsmPrinter.cpp lib/Target/Hexagon/HexagonAsmPrinter.cpp lib/Target/CellSPU/SPUAsmPrinter.cpp lib/Target/Sparc/SparcAsmPrinter.cpp lib/Target/MBlaze/MBlazeAsmPrinter.cpp lib/Target/Mips/MipsAsmPrinter.cpp MSP430 isn't represented because it did not even run with the long existing 'c' modifier and it was not apparent what needs to be done to get it inline asm ready. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
* Replacing zero-sized alloca's with a null pointer is too aggressive, insteadDuncan Sands2012-06-261-1/+7
| | | | | | | | | | | | | | | | | merge all zero-sized alloca's into one, fixing c43204g from the Ada ACATS conformance testsuite. What happened there was that a variable sized object was being allocated on the stack, "alloca i8, i32 %size". It was then being passed to another function, which tested that the address was not null (raising an exception if it was) then manipulated %size bytes in it (load and/or store). The optimizers cleverly managed to deduce that %size was zero (congratulations to them, as it isn't at all obvious), which made the alloca zero size, causing the optimizers to replace it with null, which then caused the check mentioned above to fail, and the exception to be raised, wrongly. Note that no loads and stores were actually being done to the alloca (the loop that does them is executed %size times, i.e. is not executed), only the not-null address check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159202 91177308-0d34-0410-b5e6-96231b3b80d8
* Shuffle optimization for AVX/AVX2.Elena Demikhovsky2012-06-261-0/+21
| | | | | | | | | | | | | | | | | | | | The current patch optimizes frequently used shuffle patterns and gives these instruction sequence reduction. Before: vshufps $-35, %xmm1, %xmm0, %xmm2 ## xmm2 = xmm0[1,3],xmm1[1,3] vpermilps $-40, %xmm2, %xmm2 ## xmm2 = xmm2[0,2,1,3] vextractf128 $1, %ymm1, %xmm1 vextractf128 $1, %ymm0, %xmm0 vshufps $-35, %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[1,3],xmm1[1,3] vpermilps $-40, %xmm0, %xmm0 ## xmm0 = xmm0[0,2,1,3] vinsertf128 $1, %xmm0, %ymm2, %ymm0 After: vshufps $13, %ymm0, %ymm1, %ymm1 ## ymm1 = ymm1[1,3],ymm0[0,0],ymm1[5,7],ymm0[4,4] vshufps $13, %ymm0, %ymm0, %ymm0 ## ymm0 = ymm0[1,3,0,0,5,7,4,4] vunpcklps %ymm1, %ymm0, %ymm0 ## ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159188 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some duplicate instructions that exist only to given different ↵Craig Topper2012-06-262-12/+12
| | | | | | mnemonics for the assembler. Use InstAlias instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159184 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable the new LoopInfo algorithm by default.Andrew Trick2012-06-265-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | The primary advantage is that loop optimizations will be applied in a stable order. This helps debugging and unit test creation. It is also a better overall implementation without pathologically bad performance on deep functions. On large functions (llvm-stress --size=200000 | opt -loops) Before: 0.1263s After: 0.0225s On deep functions (after tweaking llvm-stress, thanks Nadav): Before: 0.2281s After: 0.0227s See r158790 for more comments. The loop tree is now consistently generated in forward order, but loop passes are applied in reverse order over the program. If we have a loop optimization that prefers forward order, that can easily be achieved by adding a different type of LoopPassManager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159183 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some ugly hacks for inline asm operands which name a specific register ↵Eli Friedman2012-06-251-3/+16
| | | | | | a bit more thorough. PR13196. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159176 91177308-0d34-0410-b5e6-96231b3b80d8
* revert my previous commit (r159173), since as Eli pointed out, it's ↵Nuno Lopes2012-06-251-1/+1
| | | | | | perfectly ok to mark realloc as noalias git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159175 91177308-0d34-0410-b5e6-96231b3b80d8
* do not set realloc() as NotAlias, since it can return the same pointer. This ↵Nuno Lopes2012-06-251-1/+1
| | | | | | whole thing should be upgraded to use the MemoryBuiltin interface anyway.. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159173 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: update peephole optimization.Manman Ren2012-06-251-0/+12
| | | | | | | | | | | | More condition codes are included when deciding whether to remove cmp after a sub instruction. Specifically, we extend from GE|LT|GT|LE to GE|LT|GT|LE|HS|LS|HI|LO|EQ|NE. If we have "sub a, b; cmp b, a; movhs", we should be able to replace with "sub a, b; movls". rdar: 11725965 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159166 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the objc_autoreleasedReturnValue optimization code to locateDan Gohman2012-06-251-4/+31
| | | | | | | | the call correctly even in the case where it is an invoke. This fixes rdar://11714057. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159157 91177308-0d34-0410-b5e6-96231b3b80d8
* Enforce stricter liveness rules for PHIs.Jakob Stoklund Olesen2012-06-251-0/+26
| | | | | | | | | | | | | Verify that all paths from the entry block to a virtual register read pass through a def. Enable this check even when MRI->isSSA() is false. Verify that the live range of a virtual register is live out of all predecessor blocks, even for PHI-values. This requires that PHIElimination sometimes inserts IMPLICIT_DEF instruction in predecessor blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159150 91177308-0d34-0410-b5e6-96231b3b80d8
* Run ProcessImplicitDefs on SSA form where it can be much simpler.Jakob Stoklund Olesen2012-06-251-2/+2
| | | | | | | | | | | Implicitly defined virtual registers can simply have the <undef> bit set on all uses, and copies can be turned into implicit defs recursively. Physical registers are a bit trickier. We handle the common case where a physreg def is used by a nearby instruction in the same basic block. For more complicated cases, just leave the IMPLICIT_DEF instruction in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159149 91177308-0d34-0410-b5e6-96231b3b80d8
* improve optimization of invoke instructions:Nuno Lopes2012-06-252-1/+46
| | | | | | | | - simplifycfg: invoke undef/null -> unreachable - instcombine: invoke new -> invoke expect(0, 0) (an arbitrary NOOP intrinsic; only done if the allocated memory is unused, of course) - verifier: allow invoke of intrinsics (to make the previous step work) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159146 91177308-0d34-0410-b5e6-96231b3b80d8
* PR13013: ELF Type identification fails for MSB type ELF files.Meador Inge2012-06-251-0/+11
| | | | | | | | | | Fix 'sys::IdentifyFileType' to work with big and little endian byte orderings when reading the ELF object file type. Initial patch by Stefan Hepp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159138 91177308-0d34-0410-b5e6-96231b3b80d8
* If a constant or a function has linkonce_odr linkage and unnamed_addr, mark itRafael Espindola2012-06-251-0/+14
| | | | | | | | hidden. Being linkonce_odr guarantees that it is available in every dso that needs it. Being a constant/function with unnamed_addr guarantees that the copies don't have to be merged. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159136 91177308-0d34-0410-b5e6-96231b3b80d8
* %RCX is not a function live-out in eh.return functions.Jakob Stoklund Olesen2012-06-241-0/+252
| | | | | | | | | | The function live-out registers must be live at all function returns, and %RCX is only used by eh.return. When a function also has a normal return, only %RAX holds a return value. This fixes PR13188. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159116 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow controlling vectorization of boolean values separately from other ↵Hal Finkel2012-06-241-0/+3
| | | | | | | | integer types. These are used as the result of comparisons, and often handled differently from larger integer types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159111 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dyn_cast + dereference pattern by replacing it with a cast and changingNick Lewycky2012-06-241-0/+18
| | | | | | | | the safety check to look for the same type we're going to actually cast to. Fixes PR13180! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159110 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a dangling reference to a deleted instruction. Fixes PR13185!Nick Lewycky2012-06-241-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159096 91177308-0d34-0410-b5e6-96231b3b80d8
* DAG legalisation can now handle illegal fma vector types by scalarisationPete Cooper2012-06-241-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159092 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow BBVectorize to fuse compare instructions.Hal Finkel2012-06-231-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159088 91177308-0d34-0410-b5e6-96231b3b80d8
* Add relocation types for Hexagon processor; patch by Sidney Manning ↵Marshall Clow2012-06-232-0/+10
| | | | | | <sidneym@codeaurora.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159081 91177308-0d34-0410-b5e6-96231b3b80d8
* Extend the IL for selecting TLS models (PR9788)Hans Wennborg2012-06-234-0/+407
| | | | | | | | | | | | | | | This allows the user/front-end to specify a model that is better than what LLVM would choose by default. For example, a variable might be declared as @x = thread_local(initialexec) global i32 42 if it will not be used in a shared library that is dlopen'ed. If the specified model isn't supported by the target, or if LLVM can make a better choice, a different model may be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159077 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle aliases to tls variables in all architectures, not just x86.Rafael Espindola2012-06-231-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159058 91177308-0d34-0410-b5e6-96231b3b80d8
* (sub X, imm) gets canonicalized to (add X, -imm)Evan Cheng2012-06-231-0/+12
| | | | | | | | | | | | | | | | There are patterns to handle immediates when they fit in the immediate field. e.g. %sub = add i32 %x, -123 => sub r0, r0, #123 Add patterns to catch immediates that do not fit but should be materialized with a single movw instruction rather than movw + movt pair. e.g. %sub = add i32 %x, -65535 => movw r1, #65535 sub r0, r0, r1 rdar://11726136 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159057 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Add a better diagnostic for some out of range immediates.Jim Grosbach2012-06-222-8/+8
| | | | | | | | | | | As an example of how the custom DiagnosticType can be used to provide better operand-mismatch diagnostics, add a custom diagnostic for the imm0_15 operand class used for several system instructions. Update the tests to expect the improved diagnostic. rdar://8987109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159051 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the PPC isel instruction.Hal Finkel2012-06-221-0/+23
| | | | | | | The isel (integer select) instruction is supported on the 440 and A2 embedded cores and on the POWER7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159045 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheckize tests.Chad Rosier2012-06-222-2/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159044 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename fp-op fusion option (yet again) for compatibility with GCC option.Lang Hames2012-06-224-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159042 91177308-0d34-0410-b5e6-96231b3b80d8
* EmitZerofill should take a 64-bit size or else it's chopping off large ↵Evan Cheng2012-06-221-0/+11
| | | | | | zero-filled global. rdar://11729134 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159023 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert remaining part of r93200: "Disable folding sext(trunc(x)) -> x"Jakob Stoklund Olesen2012-06-221-6/+7
| | | | | | | | | | | This fixes PR5997. These transforms were disabled because codegen couldn't deal with other uses of trunc(x). This is now handled by the peephole pass. This causes no regressions on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159003 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/Generic/asm-large-immediate.ll: Mark it as XFAIL: powerpc, ↵NAKAMURA Takumi2012-06-221-1/+3
| | | | | | possibly due to r158939. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158994 91177308-0d34-0410-b5e6-96231b3b80d8
* Functions calling __builtin_eh_return must have a frame pointer.Jakob Stoklund Olesen2012-06-221-3/+24
| | | | | | | | | | | | | | The code in X86TargetLowering::LowerEH_RETURN() assumes that a frame pointer exists, but the frame pointer was forced by the presence of llvm.eh.unwind.init which isn't guaranteed. If llvm.eh.unwind.init is actually required in functions calling eh.return (is it?), we should diagnose that instead of emitting bad machine code. This should fix the dragonegg-x86_64-linux-gcc-4.6-test bot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158961 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM scheduling fix: compute predicated implicit use properly.Andrew Trick2012-06-221-3/+3
| | | | | | | | Minor drive by fix to cleanup latency computation. Calling getOperandLatency with a deliberately incorrect operand index does not give you the latency you want. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158959 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit relocations for DW_AT_location entries on systems which need it. This isNick Lewycky2012-06-221-0/+111
| | | | | | | a recommit of r127757. Fixes PR9493. Patch by Paul Robinson! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158957 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from aLang Hames2012-06-224-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | boolean flag to an enum: { Fast, Standard, Strict } (default = Standard). This option controls the creation by optimizations of fused FP ops that store intermediate results in higher precision than IEEE allows (E.g. FMAs). The behavior of this option is intended to match the behaviour specified by a soon-to-be-introduced frontend flag: '-ffuse-fp-ops'. Fast mode - allows formation of fused FP ops whenever they're profitable. Standard mode - allow fusion only for 'blessed' FP ops. At present the only blessed op is the fmuladd intrinsic. In the future more blessed ops may be added. Strict mode - allow fusion only if/when it can be proven that the excess precision won't effect the result. Note: This option only controls formation of fused ops by the optimizers. Fused operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic) will always be honored, regardless of the value of this option. Internally TargetOptions::AllowExcessFPPrecision has been replaced by TargetOptions::AllowFPOpFusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158956 91177308-0d34-0410-b5e6-96231b3b80d8
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