aboutsummaryrefslogtreecommitdiffstats
path: root/test
Commit message (Expand)AuthorAgeFilesLines
* This CL changes the function prologue and epilogue emitted on X86 when stack ...Alexey Samsonov2012-07-163-24/+48
* Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be ...Nadav Rotem2012-07-151-0/+8
* Teach getTargetVShiftNode about TargetConstant nodes.Nadav Rotem2012-07-151-0/+9
* llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll: Rewrite expressions to fit...NAKAMURA Takumi2012-07-151-1/+3
* Rename VBROADCASTSDrm into VBROADCASTSDYrm to match the naming convention.Nadav Rotem2012-07-151-0/+21
* AVX: Fix a bug in getTargetVShiftNode. The shift amount has to be a 128bit ve...Nadav Rotem2012-07-141-0/+31
* Add a dagcombine optimization to convert concat_vectors of undefs into a sing...Nadav Rotem2012-07-141-0/+17
* LSR Fix: check SCEV expression safety before expansion.Andrew Trick2012-07-131-0/+90
* This is one of the first steps at moving to replace target-dependent Joel Jones2012-07-132-18/+31
* The Mips specific relocation R_MIPS_GOT_DISP Jack Carter2012-07-131-0/+18
* test case for revision 160084: Alignment filling between Mips function unitsJack Carter2012-07-131-0/+23
* Restrict this to x86, hopefully fixing ARM buildbots.Duncan Sands2012-07-131-1/+1
* The end of the prologue should be marked with is_stmt.Eric Christopher2012-07-121-0/+28
* Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck.Akira Hatanaka2012-07-128-760/+694
* Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...Benjamin Kramer2012-07-121-0/+38
* The LIT tests below do not specify the exact cpu model and fail on AVX2 machi...Nadav Rotem2012-07-125-9/+9
* llvm/test/CodeGen/X86/rdrand.ll: Relax expression corresponding to Win64 CC.NAKAMURA Takumi2012-07-121-7/+7
* llvm/test/CMakeLists.txt: Add llvm-diff to deps.NAKAMURA Takumi2012-07-121-1/+3
* Use %s instead of the explicit name, the latter doesn't work in out-of-tree b...Benjamin Kramer2012-07-121-1/+1
* Add intrinsics for Ivy Bridge's rdrand instruction.Benjamin Kramer2012-07-121-0/+47
* The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type ofDuncan Sands2012-07-121-0/+20
* Update GATHER instructions to support 2 read-write operands. Patch from mysel...Craig Topper2012-07-121-0/+19
* Instcombine was transforming:Evan Cheng2012-07-121-0/+18
* ARM: Fix optimizeCompare to correctly check safe condition.Manman Ren2012-07-111-0/+19
* Fixed diff comparison.Stepan Dyatkovskiy2012-07-111-1/+1
* Test case for r160036.Akira Hatanaka2012-07-111-0/+22
* X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) pair.Manman Ren2012-07-111-0/+12
* Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.Akira Hatanaka2012-07-111-0/+25
* PR13326: Fix a subtle edge case in the udiv -> magic multiply generator.Benjamin Kramer2012-07-111-0/+21
* When ext-loading and trunc-storing vectors to memory, on x86 32bit systems, a...Nadav Rotem2012-07-115-9/+26
* Lower RETURNADDR node in Mips backend.Akira Hatanaka2012-07-111-0/+23
* Mips specific inline asm operand modifier 'L'.Jack Carter2012-07-101-1/+11
* Add newline.Chad Rosier2012-07-101-1/+1
* Add test case accidentally omitted from r160002.Chad Rosier2012-07-101-0/+242
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-07-103-5/+18
* Improve the loading of load-anyext vectors by allowing the codegen to loadNadav Rotem2012-07-103-12/+18
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-102-1/+41
* Reverse assembler/disassembler operand order for gather instructions.Craig Topper2012-07-102-16/+16
* Make register Mips::RA allocatable if not in mips16 mode.Akira Hatanaka2012-07-101-0/+288
* Revert r159938 (and r159945) to appease the buildbots.Chad Rosier2012-07-091-21/+0
* Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional move,...Owen Anderson2012-07-091-0/+26
* X86: implement functions to analyze & synthesize CMOV|SET|JccManman Ren2012-07-091-0/+17
* Reapply r158846.Akira Hatanaka2012-07-094-160/+172
* instcombine: merge the functions that remove dead allocas and dead mallocs/ca...Nuno Lopes2012-07-091-1/+2
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-091-0/+21
* Prevent ARM assembler from losing a right shift by #32 applied to a registerRichard Barton2012-07-091-0/+33
* Teach the assembler to use the narrow thumb encodings of various three-regist...Richard Barton2012-07-091-0/+807
* X86: Fix optimizeCompare to correctly check safe condition.Manman Ren2012-07-071-0/+18
* teach instcombine to remove allocated buffers even if there are stores, memcp...Nuno Lopes2012-07-065-15/+103
* revert r159851.Akira Hatanaka2012-07-064-172/+160
generated by cgit v1.1 at 2025-01-24 07:49:22 +0000