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* radeonsi: fix an off-by-one error in the bounds check for max_verticesNicolai Hähnle2016-12-151-1/+1
* radeonsi: do not kill GS with memory writesNicolai Hähnle2016-12-151-8/+22
* radeonsi: update all GSVS ring descriptors for new buffer allocationsNicolai Hähnle2016-12-151-1/+6
* radeonsi: disable the constant engine (CE) on Carrizo and StoneyMarek Olšák2016-12-141-1/+4
* radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-141-1/+17
* tgsi: fix the src type of TGSI_OPCODE_MEMBARMarek Olšák2016-12-141-0/+1
* radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-141-1/+5
* radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-141-5/+7
* radeonsi: fix incorrect FMASK checking in bind_sampler_statesMarek Olšák2016-12-141-4/+4
* radeonsi: always restore sampler states when unbinding sampler viewsMarek Olšák2016-12-141-3/+8
* cso: don't release sampler states that are boundMarek Olšák2016-12-141-1/+3
* radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-141-4/+12
* vc4: In a loop break/continue, jump if everyone has taken the path.Eric Anholt2016-12-141-10/+17
* radeonsi: apply the double EVENT_WRITE_EOP workaround to VI as wellMarek Olšák2016-12-141-2/+4
* radeonsi: add a tess+GS hang workaround for VI dGPUsMarek Olšák2016-12-141-2/+10
* radeonsi: apply a tessellation bug workaround for SIMarek Olšák2016-12-141-0/+6
* radeonsi: apply a TC L1 write corruption workaround for SIMarek Olšák2016-12-141-11/+23
* radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chipsMarek Olšák2016-12-144-4/+29
* radeonsi: consolidate max-work-group-size computationMarek Olšák2016-12-141-24/+19
* radeonsi: disable RB+ blend optimizations for dual source blendingMarek Olšák2016-12-141-0/+11
* radeonsi: set CB_BLEND1_CONTROL.ENABLE for dual source blendingMarek Olšák2016-12-141-0/+4
* radeonsi: always set all blend registersMarek Olšák2016-12-141-5/+5
* radeonsi: store group_size_variable in struct si_computeNicolai Hähnle2016-11-241-5/+8
* vc4: Fix register class handling of DDX/DDY arguments.Eric Anholt2016-11-241-1/+1
* vc4: Clamp the shadow comparison value.Eric Anholt2016-11-231-0/+9
* vc4: Don't abort when a shader compile fails.Eric Anholt2016-11-236-8/+32
* gallium/hud: protect against and initialization raceSteven Toth2016-11-144-8/+41
* gallium/hud: close a previously opened handleSteven Toth2016-11-143-1/+6
* gallium/hud: fix a problem where objects are free'd while in use.Steven Toth2016-11-144-55/+0
* vc4: Use Newton-Raphson on the 1/W write to fix glmark2 terrain.Eric Anholt2016-11-091-1/+1
* Revert "st/vdpau: use linear layout for output surfaces"Dave Airlie2016-11-091-1/+1
* radeonsi: fix an assertion failure in si_decompress_sampler_color_texturesMarek Olšák2016-11-091-1/+3
* radeonsi: fix BFE/BFI lowering for GLSL semanticsNicolai Hähnle2016-11-091-3/+34
* st/omx/dec: disable tunnel for size different caseLeo Liu2016-11-013-1/+11
* st/omx/dec: result buffers size should match codec decoder sizeLeo Liu2016-11-013-19/+18
* radeonsi: fix behavior of GLSL findLSB(0)Marek Olšák2016-11-011-4/+13
* radeonsi: set VGT_GS_ONCHIP_CNTL on CIK and laterMarek Olšák2016-11-011-0/+8
* nvc0/ir: fix emission of IMAD with NEG modifiersSamuel Pitoiset2016-11-012-2/+2
* nvc0/ir: fix emission of SHLADD with NEG modifiersSamuel Pitoiset2016-10-272-2/+2
* winsys/amdgpu: fix radeon_surf::macro_tile_index for imported texturesMarek Olšák2016-10-271-0/+17
* gallium/radeon: make sure the address of separate CMASK is aligned properlyMarek Olšák2016-10-271-2/+3
* gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_modeMarek Olšák2016-10-271-7/+7
* nvc0: use correct bufctx when invalidating CP texturesSamuel Pitoiset2016-10-271-1/+1
* st/nine: Fix locking CubeTexture surfaces.Axel Davy2016-10-271-0/+1
* st/nine: Fix mistake in Volume9 UnlockBoxAxel Davy2016-10-271-1/+1
* st/nine: Fix leak with integer and boolean constantsAxel Davy2016-10-271-21/+18
* nvc0: do not break 3D state by pushing MS coordinates on FermiSamuel Pitoiset2016-10-241-43/+44
* radeonsi: fix 64-bit loads from LDSNicolai Hähnle2016-10-241-1/+1
* nv50/ir: process texture offset sources as regular sourcesIlia Mirkin2016-10-241-53/+94
* nv50,nvc0: avoid reading out of bounds when getting bogus so infoIlia Mirkin2016-10-242-2/+8
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