summaryrefslogtreecommitdiffstats
path: root/libpixelflinger
Commit message (Collapse)AuthorAgeFilesLines
* Pixelflinger: Add AArch64 support to pixelflinger JIT.Ashok Bhat2013-12-1224-11/+4178
| | | | | | | | | | | | | | | | | See the comment-block at the top of Aarch64Assembler.cpp for overview on how AArch64 support has been implemented In addition, this commit contains [x] AArch64 inline asm versions of gglmul series of functions and a new unit test bench to test the functions [x] Assembly implementations of scanline_col32cb16blend and scanline_t32cb16blend for AArch64, with unit test bench Change-Id: I915cded9e1d39d9a2a70bf8a0394b8a0064d1eb4 Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* Pixelflinger: Support for handling 64-bit addresses in GGL AssemblerAshok Bhat2013-12-127-19/+80
| | | | | | | | | | | | | | | | | | | | | | GGLAssembler assumes addresses to be 32-bit and uses ARM 32-bit instructions to load/store/manipulate addresses. To support, 64-bit architectures, following changes has been done 1. ARMAssemblerInterface has been extended to support four new operations ADDR_LDR, ADDR_STR, ADDR_SUB, ADDR_ADD. Base class implements these virtual functions to use 32bit equivalent function. This avoids existing 32-bit Assembler backend implementations like ARMAssembler and MIPSAssembler from mapping the new functions to existing equivalent routines. This also allows 64-bit Architectures like AArch64 to override the function in their assembler backend implementations. 2. GGLAssembler code (spread over GGLAssembler.cpp, GGLAssembler.h and texturing.cpp) has been changed to use the new operations for address operations. Change-Id: I3d7eace4691e3e47cef737d97ac67ce6ef4fb18d Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* Pixelflinger: Fix issue of pointers being stored in intsAshok Bhat2013-12-123-6/+6
| | | | | | | | | | Pixelflinger's code makes assumptions, at certain places, that pointers can be stored as ints. This patch makes use of uintptr_t wherever pointers are stored as int or cast to int. Change-Id: Ie76f425cbc82ac038a747f77a95bd31774f4a8e8 Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* libpixelflinger: do not use anonymous structssynergy dev2013-11-251-5/+5
| | | | | | Avoiding the use of gnu extensions improves code portability Change-Id: Ie9e94e3ce030f52a22997f8a48de1e6c1c549894
* Add liblogYing Wang2013-04-091-2/+2
| | | | | Bug: 8580410 Change-Id: Iab3a9b4307f207c14a04a922cc7350c54e60e9ad
* move tinyutils into its own namespaceMathias Agopian2013-04-0125-130/+185
| | | | | | | | | I was fed-up with the constant conflicts in Eclipse with the "libutils" version. Also fix a few copyright notices. Change-Id: I8ffcb845af4b5d0d178f5565f64dfcfbfa27fcd6
* Remove unnecessary compiler pragma.Ian Rogers2012-08-291-8/+3
| | | | | | | | | | With dlmalloc 2.8.6 the compiler pragmas to suppress warnings are not necessary. Also fix compiler warning about redefinition of LOG_TAG. Depends upon: https://android-review.googlesource.com/42351 Change-Id: I50f70be31f4bd994b09083e722759464476c70b3
* Merge "Add MIPS support to pixelflinger."Jean-Baptiste Queru2012-08-2719-182/+3970
|\
| * Add MIPS support to pixelflinger.Paul Lind2012-08-1319-182/+3970
| | | | | | | | | | | | | | See the comment-block at the top of MIPSAssembler.cpp for implementation overview. Change-Id: Id492c10610574af8c89c38d19e12fafc3652c28a
* | Upgrade to dlmalloc 2.8.5.Ian Rogers2012-08-202-26/+67
|/ | | | | | | | | | Remove mspace functionality from cutils. Directly declare mspace from dlmalloc in code flinger's code cache, and manage without using morecore. Depends upon: https://android-review.googlesource.com/41717 Change-Id: If927254febd4414212c690f16509ef2ee1b44b44
* Add Mips support to libpixelflingerDuane Sand2012-05-303-1/+278
| | | | Change-Id: Ib81cb01b8d90ed1afa1fd54b3cc009d7fec0f814
* Prevent bit shifting if num bits is negativeBhanu Chetlapalli2012-01-251-1/+2
| | | | | | | | Causes OpenGL Software Renderer to generate incorrect window coordinates on MIPS & possibly x86 Change-Id: I3c51b6a5a4e6af75e9b31d9d47e4e4d894825888 Signed-off-by: Bhanu Chetlapalli <bhanu@mips.com>
* Rename LOG_ASSERT to ALOG_ASSERTSteve Block2012-01-171-6/+6
| | | | Change-Id: Iff15ac5e7ab226d437c08d23f18fd54e6793e65c
* Rename (IF_)LOGE(_IF) to (IF_)ALOGE(_IF)Steve Block2012-01-176-9/+9
| | | | Change-Id: I52fce957db06c281e2618daa4e2ecba19974f2eb
* Rename (IF_)LOGW(_IF) to (IF_)ALOGW(_IF)Steve Block2012-01-171-1/+1
| | | | Change-Id: I6c2a1d56dadb7e5c69e478f4d8c7d9f2127db2af
* Rename (IF_)LOGI(_IF) to (IF_)ALOGI(_IF)Steve Block2012-01-173-5/+5
| | | | Change-Id: I929ea38bc6fe6efeefa7870c8e7e4c19cd0029b3
* Rename (IF_)LOGD(_IF) to (IF_)ALOGD(_IF)Steve Block2012-01-171-8/+8
| | | | Change-Id: Ia0476219b71ece949595515ee07ea072ed349d73
* Rename (IF_)LOGV(_IF) to (IF_)ALOGV(_IF)Steve Block2012-01-171-4/+4
| | | | Change-Id: Ia9a357dec5ad12eea93fd03401a3b02b38e4e94f
* Fix DEBUG_NEEDS usageVladimir Chtchetkine2011-08-291-1/+1
| | | | Change-Id: Ic107c60080e55e1f9092f20fe3bd55e7592ca9fd
* pixelflinger: Provide more scanline shortcut functions.David 'Digit' Turner2011-04-161-40/+842
| | | | | | | | | | | | | | | | | | | This patch adds a dozen more "shortcut" scanline-processing functions to pixel-flingers. All of them avoid using the JIT for the corresponding operation (on ARM), or using the generic and _extremely_ slow 'scanline' function (on x86, where there is no JIT). The shortcuts were selected by running the system under emulation (build full_x86-eng, then launch emulator-x86), and correspond to operations that are in use when using the system's typical UI features. This makes it much more responsive and amenable to testing most applications, at least those that don't use OpenGL ES heavily. Note that HW OpenGLES emulation is under completion and should solve this problem entirely, though is not there yet. Change-Id: I9c73ba21ad158d6cc5532fabe7ed2419e00ecb3f
* am 4906db21: Merge "codeflinger: Correct misleading comment of STM instruction"Jean-Baptiste Queru2010-11-231-1/+1
|\ | | | | | | | | * commit '4906db21e041327042b87122b233e1f150618334': codeflinger: Correct misleading comment of STM instruction
| * Merge "codeflinger: Correct misleading comment of STM instruction"Jean-Baptiste Queru2010-11-231-1/+1
| |\
| | * codeflinger: Correct misleading comment of STM instructionKan-Ru Chen2010-08-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | According to the ARM Architecture Reference Manual, the comment on STM instruction should be in reverse order. Change-Id: I4af852a0478798ff7b02ab9c29c68e320ff78696 Signed-off-by: Kan-Ru Chen <kanru@0xlab.org>
* | | am 8e0e372a: Set PROT_EXEC on the whole pixelflinger code cache.Jean-Baptiste Queru2010-10-151-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Merge commit '8e0e372a388434a0553810e2b958e59a26a6bd96' into gingerbread-plus-aosp * commit '8e0e372a388434a0553810e2b958e59a26a6bd96': Set PROT_EXEC on the whole pixelflinger code cache.
| * | | Set PROT_EXEC on the whole pixelflinger code cache.Jean-Baptiste Queru2010-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer difference between word pointers is a number of words, and it needs to be multiplied by the size of a word to get a proper byte size. Without this, we tend to see crashes when the code crosses a page boundary. Bug: 3026204 Bug: 3097482 Change-Id: I37776d26d5afcdb1da71680de02fbb95e6548371
* | | | Manual mergeJean-Baptiste Queru2010-08-252-32/+31
|\ \ \ \ | | |/ / | |/| | | | | | Change-Id: I849703a709fe4bf9ea7181268221d9b648b2e73d
| * | | Copyright message changedDave Butcher2010-08-192-32/+31
| | |/ | |/| | | | | | | Change requested by Android Open Source Project
* | | am 5dfd90e5: Merge "pixelflinger: Fix function naming typo: gglBitBlti"Jean-Baptiste Queru2010-08-171-1/+1
|\ \ \ | |/ / | | | | | | | | | | | | | | | Merge commit '5dfd90e5c79774d9981d25ab4defbd1e1f652c34' into gingerbread-plus-aosp * commit '5dfd90e5c79774d9981d25ab4defbd1e1f652c34': pixelflinger: Fix function naming typo: gglBitBlti
| * | Merge "pixelflinger: Fix function naming typo: gglBitBlti"Jean-Baptiste Queru2010-08-161-1/+1
| |\ \
| | * | pixelflinger: Fix function naming typo: gglBitBltiJim Huang2010-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the functionality, the function gglBitBlti() implemented bit-block (image) transfer operation in which several bitmaps are combined into one using a raster operator. Renaming to gglBitBlit() should be explicit. Change-Id: I23886623b5421131cf7c7bfb8ec67c3809566c93
* | | | am 4ea1a52b: Merge "libpixelflinger: ARMv6 specific objects are not used. ↵Jean-Baptiste Queru2010-08-171-18/+0
|\ \ \ \ | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove." Merge commit '4ea1a52b1bbbd6e78c5909c75d773416108f5b84' into gingerbread-plus-aosp * commit '4ea1a52b1bbbd6e78c5909c75d773416108f5b84': libpixelflinger: ARMv6 specific objects are not used. Remove.
| * | | Merge "libpixelflinger: ARMv6 specific objects are not used. Remove."Jean-Baptiste Queru2010-08-161-18/+0
| |\ \ \
| | * | | libpixelflinger: ARMv6 specific objects are not used. Remove.Jim Huang2010-08-101-18/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to remove the generation of libpixelflinger_armv6, which contains the ARMv6 specific object - rotate90CW_4x4_16v6.o. But, libpixelflinger_armv6 is not actually used by other projects. Change-Id: I0e26fa2cf8b4dacfd208dd4279539c3e5b07580e
* | | | am 6090dacd: libpixelflinger: Move codeflinger test function to ↵Jim Huang2010-08-173-26/+51
|\ \ \ \ | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | test-opengl-codegen Merge commit '6090dacd1894429baaf13f7b30b2f6e9e2c1617f' into gingerbread-plus-aosp * commit '6090dacd1894429baaf13f7b30b2f6e9e2c1617f': libpixelflinger: Move codeflinger test function to test-opengl-codegen
| * | | libpixelflinger: Move codeflinger test function to test-opengl-codegenJim Huang2010-08-103-26/+51
| |/ / | | | | | | | | | | | | | | | | | | There is no need to include codeflinger test function in libpixelflinger. Instead, it should exist in test-opengl-codegen. Change-Id: Ic5b0bd1f754b2ac678d4e16565568c70ceb8d325
* | | merge from froyo-plus-aospThe Android Open Source Project2010-06-217-1/+49
|\ \ \ | |/ / | | / | |/ |/| Change-Id: Ie231effb4d9dfd63aa98ec08b269c31ce32aa1c0
| * merge from open-source masterThe Android Open Source Project2010-06-157-1/+49
| |\ | | | | | | | | | Change-Id: I1ec0e1e702687697eccd3bf6c4f115cac85e382c
| | * Fix build - cpu-features is ARM-specificJean-Baptiste Queru2010-06-151-0/+2
| | | | | | | | | | | | Change-Id: I66521f279545a249e3dcb645914f7b66f23cef21
| | * Adds support for UBFX to JIT and DisassemblerMartyn Capewell2010-05-287-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces UBFX instruction generation abilities to the Pixelflinger JIT, and also modifies the component extraction function to generate the instruction. The extract function contains defines to prevent generation of UBFX on pre-v7 cores. The JIT itself retains the ability to produce the instruction even on v5/6. This patch only generates UBFX when MOV, AND or BIC can't be used. Based on the TRM, this appears to be faster on A9 than using UBFX in all cases. On startup, Pixelflinger JITs three chunks of code. UBFX improves these as follows: 00000077:03515104_00000000_00000000 (Blends a single colour into an RGB565 buffer.) Before: 27 inst/pixel, After: 24 inst/pixel, Improvement: 12.5% 00000077:03545404_00000A01_00000000 (Blends RGBA8888 texture into an RGB565 buffer using alpha.) Before: 30 inst/pixel, After: 27 inst/pixel, Improvement: 11.1% 00000077:03545404_00000A04_00000000 (Blends RGB565 texture into an RGB565 buffer using alpha.) Before: 29 inst/pixel, After: 27 inst/pixel, Improvement: 7.4%
* | | Allow pixelflinger to work when NX (No Execute) is enabled.Nick Kralevich2010-05-072-7/+33
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Instead of allocating memory from the (non executable) heap, allocate memory using mspace and ensure that we use mprotect to mark it as PROT_EXEC. This allows pixelflinger to continue to work even when NX protections are enabled. Testing: Using the ApiDemos market app, verify that Apidemos -> Graphics -> OpenGL ES -> GLSurfaceView works when "adb shell setprop debug.egl.hw 0" is set. Change-Id: Ib569cd2543c6fa25688ee76325a712bc2347450b
* | merge from open-source masterThe Android Open Source Project2010-05-051-1/+1
|\ \ | |/ | | | | Change-Id: Ic4cfffc3c8d465224b062cef7bcfe5827441057c
| * cpu-features.h is only available for ARMBruce Beare2010-05-041-1/+1
| | | | | | | | Change-Id: I1e8001a1875bfd9cebfe18dfd757556b55c8213c
* | merge from open-source masterThe Android Open Source Project2010-05-0311-2/+415
|\ \ | |/ | | | | Change-Id: Ibc1c58aa757910f2b00acf6883127dd027f01d73
| * fix sim buildJean-Baptiste Queru2010-05-031-0/+2
| | | | | | | | Change-Id: Ide300eafbcbbc6dfae25fe86188302c6676c4a3b
| * Fix LDM addressing mode disassemblyMartyn Capewell2010-04-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Pixelflinger disassembler does not handle LDM addressing modes correctly, assuming that the P and U bits in the instruction mean the same in both LDM and STM. This results in the disassembler producing sequences like: stmfd r13!, {r4-r11, r14} ... ... ... ldmea r13!, {r4-r11, r14} This small patch fixes it by EORing the P and U bits with the Load/Store bit. Change-Id: Ic7a1556642c4e29415fc3697019f1239b6c26fc2
| * Merge "Adds UXTB16 support to Pixelflinger"Jean-Baptiste Queru2010-04-297-1/+128
| |\
| | * Adds UXTB16 support to PixelflingerMartyn Capewell2009-12-077-1/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add support for UXTB16 to the disassembler * Add encoding of the UXTB16 instruction to the Pixelflinger JIT. Introducing the UXTB16 instruction allows removal of some masking code, and is beneficial from a pipeline point of view - lots of UXTB16 followed by MUL sequences. Also, further rescheduling and use of SMULWB brings extra performance improvements. * Use UXTB16 in bilinear filtered texturing Uses UXTB16 to extract channels for SIMD operations, rather than creating and ANDing with masks. Saves a register and is faster on A8, as UXTB16 result can feed into first stage of multiply, unlike AND. Also, used SMULWB rather than SMULBB, which allows removal of MOVs used to rescale results. Code has been scheduled for A8 pipeline, specifically aiming to allow multiplies to issue in pipeline 0, for efficient dual issue operation. Testing on SpriteMethodTest (http://code.google.com/p/apps-for-android/) gives 8% improvement (12.7 vs. 13.7 fps.) SMULBB to SMULWB trick could be used in <v6 code path, but this hasn't been implemented.
| * | NEON shortcut for flat colour blending into 16-bitMartyn Capewell2009-12-074-0/+284
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a shortcut for the needs descriptor 00000077:03515104_00000000_00000000. It requires blending a single 32-bit colour value into a 16-bit framebuffer. It's used when fading out the screen, eg. when a modal requester pops-up. The PF JIT produces code for this using 24 instructions/pixel. The NEON implementation requires 2.1 instructions/pixel. Performance hasn't been benchmarked, but the improvement is quite visible. This code has only been tested by inspection of the fading effect described above, when press+holding a finger on the home screen to pop up the Shortcuts/Widgets/Folders/Wallpaper requester. Along with the NEON version, a fallback v5TE implementation is also provided. This ARM version of col32cb16blend is not fully optimised, but is a reasonable implementation, and better than the version produced by the JIT. It is here as a fallback, if NEON is not available.
| * eclair snapshotJean-Baptiste Queru2009-11-123-28/+51
| |
* | fix [2448319] out of bounds array index in fogMathias Agopian2010-02-161-0/+1
| |
generated by cgit v1.1 at 2025-01-12 22:12:13 +0000