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* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-032-4/+33
* Don't override subreg functions in targets without subregisters.Jakob Stoklund Olesen2012-05-032-44/+46
* Extensions of Hexagon V4 instructions.Sirish Pande2012-05-039-1339/+4107
* replace 'break's with 'return 0' in visitCallInst code for objectsize, since ...Nuno Lopes2012-05-031-5/+5
* Use correct variable in this example. Pointed out by waynix on IRC.Duncan Sands2012-05-031-1/+1
* Use 'unsigned' instead of 'int' in a few places dealing with counts of vector...Craig Topper2012-05-031-3/+3
* Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the ...Craig Topper2012-05-033-22/+37
* Fix two-address pass's aggressive instruction commuting heuristics. It's meantEvan Cheng2012-05-033-17/+28
* Added TargetRegisterInfo::getAllocatableClass.Andrew Trick2012-05-034-8/+45
* Whitespace cleanup.Bill Wendling2012-05-021-87/+80
* [docs] Include the Kaleidescope tutorial in the Sphinx docs build.Daniel Dunbar2012-05-0220-52/+26
* Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just...Owen Anderson2012-05-022-0/+27
* For Intel Atom, use ILP scheduling always, instead of ILP for 64 bitPreston Gurd2012-05-021-4/+4
* Change the Intel Atom detection code to recognizePreston Gurd2012-05-022-3/+5
* Teach DAG combine that multiplication by 1.0 can always be constant folded.Owen Anderson2012-05-022-0/+12
* Add tools/lld to .gitignore.Michael J. Spencer2012-05-021-0/+2
* ARM: Add missing two-operand VBIC aliases.Jim Grosbach2012-05-022-0/+7
* Move llvm-tblgen's StringMatcher into the TableGen library so it canDouglas Gregor2012-05-026-4/+4
* [llvm-c] Make a few function declarations proper prototypesAnders Waldenborg2012-05-021-6/+6
* This patch continues the work of adding instruction latencies for X86 Atom,Preston Gurd2012-05-024-68/+171
* Revert r155853Manman Ren2012-05-022-37/+0
* [tsan] typo and style (thanks to Nick Lewycky)Kostya Serebryany2012-05-021-9/+9
* The value held in the vector may be RAUW'ed by some of the canonicalizationBill Wendling2012-05-022-2/+53
* Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.Richard Barton2012-05-025-33/+26
* Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support fo...Craig Topper2012-05-025-36/+104
* Update SmallVector to support move semantics if the host does.John McCall2012-05-022-14/+231
* Fix unintentional use of operator bool.John McCall2012-05-021-1/+1
* Fix the implementation of MachOObjectFile::isSectionZeroInit so it follows th...Eli Friedman2012-05-021-4/+6
* Tidy up. Naming conventions.Jim Grosbach2012-05-011-16/+16
* Remove unneeded break.Jakub Staszak2012-05-011-1/+0
* Use dyn_cast instead of checking opcode and cast.Jakub Staszak2012-05-011-2/+1
* Remove trailing spaces.Jakub Staszak2012-05-011-43/+43
* Strip the pointer casts off of allocas so that the selection DAG can find them.Bill Wendling2012-05-012-1/+18
* Target independent Hexagon Packetizer fix.Sirish Pande2012-05-012-67/+68
* ARM: Add a few missing add->sub aliases w/ 'w' suffix.Jim Grosbach2012-05-012-0/+23
* ARM: allow vanilla expressions for movw/movt.Jim Grosbach2012-05-012-4/+21
* This patch marks the X86 floating point stack registers ST0-ST7 as reservedPreston Gurd2012-05-011-0/+10
* MC: Unknown assembler directives are now hard errors.Jim Grosbach2012-05-013-4/+4
* MC: Remove errant EatToEndOfStatement() in asm parser.Jim Grosbach2012-05-011-3/+1
* X86: optimization for max-like structManman Ren2012-05-012-0/+82
* X86: Use StackRegister instead of FrameRegister in getFrameIndexReference (to...Alexey Samsonov2012-05-013-0/+56
* Move MipsDisassembler classes into an anonymous namespace.Benjamin Kramer2012-05-011-0/+4
* Regression test for PR2960.Jay Foad2012-05-011-0/+13
* Value-initialize global to avoid global construction.Benjamin Kramer2012-05-011-2/+2
* RuntimeDyld cleanup:Eli Bendersky2012-05-014-65/+77
* YAMLParser: get rid of global ctors & dtors.Benjamin Kramer2012-05-012-13/+18
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-0113-71/+69
* Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.Craig Topper2012-05-011-9/+9
* RuntimeDyld code cleanup:Eli Bendersky2012-05-016-30/+38
* Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B...Craig Topper2012-05-011-9/+8