aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/Hexagon
Commit message (Expand)AuthorAgeFilesLines
* Change if (cond) ... else llvm_unreachable("text") to assert(cond && "text") ...Richard Trieu2013-07-011-7/+5
* Change assert(0 && "text") to llvm_unreachable(0 && "text")Richard Trieu2013-06-281-2/+2
* Fix broken asserts that never fire.Richard Trieu2013-06-281-2/+2
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-222-3/+3
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-193-12/+12
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-162-15/+0
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-151-2/+2
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-079-19/+25
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-2/+2
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-311-2/+2
* Order CALLSEQ_START and CALLSEQ_END nodes.Andrew Trick2013-05-291-2/+3
* Hexagon: Typo fix.Jyotsna Verma2013-05-281-5/+5
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-255-45/+45
* Hexagon: Make helper functions static.Benjamin Kramer2013-05-232-3/+5
* Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC.Jyotsna Verma2013-05-211-1/+0
* Add LLVMContext argument to getSetCCResultTypeMatt Arsenault2013-05-181-1/+1
* Don't cast away constness.Benjamin Kramer2013-05-171-2/+2
* Remove dead calls to addFrameMove.Rafael Espindola2013-05-161-25/+0
* Hexagon: Pass to replace tranfer/copy instructions into combine instructionJyotsna Verma2013-05-145-0/+686
* Hexagon: Add patterns to generate 'combine' instructions.Jyotsna Verma2013-05-141-0/+87
* Hexagon: ArePredicatesComplement should not restrict itself to TFRs.Jyotsna Verma2013-05-141-5/+31
* Hexagon: Remove dead-code after unconditional return from addPreSched2.Jyotsna Verma2013-05-141-3/+0
* Suppress GCC compiler warnings in release builds about variables that are onlyDuncan Sands2013-05-131-0/+1
* Remove the MachineMove class.Rafael Espindola2013-05-132-4/+6
* Change getFrameMoves to return a const reference.Rafael Espindola2013-05-111-5/+3
* Fix unused variable error.Jyotsna Verma2013-05-101-2/+1
* Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.Jyotsna Verma2013-05-104-707/+81
* Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.Jyotsna Verma2013-05-108-703/+170
* Remove unused argument.Rafael Espindola2013-05-103-6/+4
* Remove unused function.Rafael Espindola2013-05-102-11/+0
* Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.Jyotsna Verma2013-05-093-593/+46
* Hexagon: Use relation map for getMatchingCondBranchOpcode() and Jyotsna Verma2013-05-091-535/+5
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-077-2/+199
* Reverting r181331.Jyotsna Verma2013-05-076-196/+3
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-076-3/+196
* Hexagon: Set accessSize and addrMode on all load/store instructions.Jyotsna Verma2013-05-074-68/+125
* Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek2013-05-066-17/+79
* Cleanup of the HexagonTargetMachine setup.Krzysztof Parzyszek2013-05-061-29/+34
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-066-407/+307
* Make references to HexagonTargetMachine "const".Krzysztof Parzyszek2013-05-066-25/+26
* Use consistent function names.Krzysztof Parzyszek2013-05-043-3/+3
* Fix missing include in Hexagon code for Release+AssertsReid Kleckner2013-05-031-0/+1
* reverting r180953Jyotsna Verma2013-05-025-305/+404
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-025-404/+305
* Hexagon - Add peephole optimizations for zero extends.Pranav Bhandarkar2013-05-022-0/+40
* Hexagon: Honor __builtin_expect by using branch probabilities.Jyotsna Verma2013-05-024-37/+122
* Hexagon: Use multiclass for Jump instructions.Jyotsna Verma2013-05-0114-263/+336
* Hexagon: Clear isKill flag on the predicate register inJyotsna Verma2013-05-011-1/+5
* Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.Jyotsna Verma2013-04-232-176/+149
* Hexagon: Define relations for GP-relative instructions.Jyotsna Verma2013-04-231-15/+17
generated by cgit v1.1 at 2024-08-30 04:11:57 +0000