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* Change if (cond) ... else llvm_unreachable("text") to assert(cond && "text") ...Richard Trieu2013-07-011-7/+5
* PR16493: DebugInfo with TLS on PPC crashing due to invalid relocationDavid Blaikie2013-07-012-0/+9
* [PowerPC] Support all condition register logical instructionsUlrich Weigand2013-07-011-5/+32
* Add a newline.Chad Rosier2013-07-011-1/+1
* Index: test/CodeGen/PowerPC/reloc-align.llBill Schmidt2013-07-012-0/+27
* [ARMAsmParser] Sort the ARM register lists based on the encoding value, not theChad Rosier2013-07-011-15/+23
* [mips] Reverse the order of source operands of shift and rotate instructions ...Akira Hatanaka2013-07-012-8/+8
* [PowerPC] Also add "msync" aliasUlrich Weigand2013-07-011-0/+1
* [mips] Increase the number of floating point control registers available to 32.Akira Hatanaka2013-07-011-4/+9
* Add jump tables handling for MSP430.Anton Korobeynikov2013-07-012-0/+11
* Don't form PPC CTR loops for over-sized exit countsHal Finkel2013-07-011-0/+3
* AArch64: correct CodeGen of MOVZ/MOVK combinations.Tim Northover2013-07-012-10/+14
* Revert r185339 (ARM: relax the atomic release barrier to "dmb ishst")Tim Northover2013-07-011-5/+1
* [PowerPC] Fix @got references to local symbolsUlrich Weigand2013-07-011-0/+34
* [PowerPC] Add "wait" instructionUlrich Weigand2013-07-011-0/+7
* [PowerPC] Support "eieio" instructionUlrich Weigand2013-07-012-0/+9
* [PowerPC] Add variants of "sync" instructionUlrich Weigand2013-07-012-5/+12
* ARM: relax the atomic release barrier to "dmb ishst"Tim Northover2013-07-011-1/+5
* [NVPTX] Add support for module-scope inline asmJustin Holewinski2013-07-011-0/+10
* [NVPTX] We dont use NVBuiltin anymoreJustin Holewinski2013-07-012-3/+0
* [NVPTX] Cut down on physical register defsJustin Holewinski2013-07-013-28/+13
* [NVPTX] 64-bit ADDC/ADDE are not legalJustin Holewinski2013-07-011-0/+3
* [NVPTX] Fix vector loads from parameters that span multiple loads, and fix so...Justin Holewinski2013-07-012-156/+9
* [NVPTX] Handle signext/zeroext attributes properlyJustin Holewinski2013-07-011-19/+25
* [NVPTX] Add support for native SIGN_EXTEND_INREG where availableJustin Holewinski2013-07-012-4/+32
* [NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu.Justin Holewinski2013-07-012-112/+430
* [NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit v...Justin Holewinski2013-07-011-1/+2
* R600: Fix an unitialized variable in R600InstrInfo.cppVincent Lejeune2013-06-301-1/+1
* X86: POP*rmm: move address operand to (ins) from (outs).Ahmed Bougacha2013-06-301-3/+3
* NVPTX: Fold otherwise unused variable into assert.Benjamin Kramer2013-06-291-2/+2
* R600: Unbreak GCC build.Benjamin Kramer2013-06-291-1/+2
* R600: Support schedule and packetization of trans-only instVincent Lejeune2013-06-297-90/+246
* R600: Bank Swizzle now display SCL equivalentVincent Lejeune2013-06-293-12/+12
* Change assert(0 && "text") to llvm_unreachable(0 && "text")Richard Trieu2013-06-281-2/+2
* PPC: Ignore spill/restore requests for VRSAVE (except on Darwin)Hal Finkel2013-06-281-0/+12
* Fix broken asserts that never fire.Richard Trieu2013-06-281-2/+2
* Remove unused memberDavid Blaikie2013-06-281-4/+0
* R600/SI: Add processor types for each CIK variantTom Stellard2013-06-281-0/+3
* DebugInfo: PR14728: TLS supportDavid Blaikie2013-06-281-0/+6
* Fix a PPC rlwimi instruction-selection bugHal Finkel2013-06-281-2/+2
* Fix an off-by-one error. Also make the code a little more explicit in what itChad Rosier2013-06-281-3/+4
* Remove unused variables.Eric Christopher2013-06-281-4/+0
* [NVPTX] Select -1 instead of 1 when anyextend'ing i1 typesJustin Holewinski2013-06-281-3/+3
* [NVPTX] Add (1.0 / sqrt(x)) => rsqrt(x) generation when allowable by FP flagsJustin Holewinski2013-06-281-1/+12
* [NVPTX] Calling conventions fixJustin Holewinski2013-06-281-24/+40
* [NVPTX] Add support for cttz/ctlz/ctpopJustin Holewinski2013-06-282-0/+74
* [NVPTX] Clean up comparison/select/convert patterns and factor out PTX instru...Justin Holewinski2013-06-288-949/+1129
* [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rath...Justin Holewinski2013-06-2810-859/+1243
* [NVPTX] Add support for vectorized function return valuesJustin Holewinski2013-06-281-27/+137
* [NVPTX] Clean up handling of formal arguments and enable generation of vector...Justin Holewinski2013-06-281-114/+202
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