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path: root/lib/Target/Mips/Mips64InstrInfo.td
Commit message (Expand)AuthorAgeFilesLines
* Doubleword Shift Left Logical Plus 32Jack Carter2012-07-161-0/+5
* Make register Mips::RA allocatable if not in mips16 mode.Akira Hatanaka2012-07-101-1/+1
* 1. introduce MipsPat in place of Pat in order to exclude those fromAkira Hatanaka2012-06-141-47/+50
* Add definitions of 32/64-bit unaligned load/store instructions for Mips.Akira Hatanaka2012-06-021-0/+12
* This patch adds a predicate to existing mips32 and mips64 so that thoseAkira Hatanaka2012-05-221-15/+25
* Delete blank line.Akira Hatanaka2012-04-181-1/+0
* Add disassembler to MIPS. Akira Hatanaka2012-04-171-19/+35
* Revert r153924. There were buildbot failures.Akira Hatanaka2012-04-031-35/+19
* MIPS disassembler support.Akira Hatanaka2012-04-031-19/+35
* Changes for migrating to using register mask operands.Akira Hatanaka2012-03-011-7/+0
* remove blanks, and some code formatJia Liu2012-02-281-2/+2
* Add an option to use a virtual register as the global base register instead ofAkira Hatanaka2012-02-241-6/+6
* Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. Akira Hatanaka2012-01-251-31/+0
* 64-bit sign extension in register instructions.Akira Hatanaka2012-01-241-0/+4
* Rename immLUiOpnd.Akira Hatanaka2012-01-041-1/+1
* - Define base classes for Jump-and-link instructions and make 32-bit and 64-bitAkira Hatanaka2012-01-041-26/+9
* If target ABI is N64, LEA should be daddiu.Akira Hatanaka2011-12-241-1/+1
* Add definition of DSBH (Double Swap Bytes within Halfwords) and Akira Hatanaka2011-12-201-0/+6
* 32-to-64-bit sext_inreg pattern.Akira Hatanaka2011-12-201-0/+5
* Add 64-bit extload patterns.Akira Hatanaka2011-12-201-2/+12
* 32-to-64-bit sign extension pattern.Akira Hatanaka2011-12-201-0/+2
* Add patterns for matching immediates whose lower 16-bit is cleared. TheseAkira Hatanaka2011-12-191-0/+2
* Remove definitions of double word shift plus 32 instructions. Assembler orAkira Hatanaka2011-12-191-21/+9
* Remove unused predicate.Akira Hatanaka2011-12-191-3/+0
* Rename WrapperPIC. It is now used for both pic and static.Akira Hatanaka2011-12-091-6/+6
* Implement 64-bit support for thread local storage handling.Akira Hatanaka2011-12-081-0/+5
* Modify class ReadHardware and add definition of 64-bit version of instructionAkira Hatanaka2011-12-071-0/+2
* 32 to 64-bit anyext pattern.Akira Hatanaka2011-12-071-0/+4
* 32 to 64-bit zext pattern.Akira Hatanaka2011-12-071-0/+5
* 64-bit WrapperPICPat patterns.Akira Hatanaka2011-12-071-0/+6
* Fix 64-bit immediate patterns.Akira Hatanaka2011-12-071-2/+21
* Add definitions of 64-bit extract and insert instrucions and makeAkira Hatanaka2011-12-051-0/+3
* Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpoolAkira Hatanaka2011-11-161-1/+18
* 64-bit jump register instruction.Akira Hatanaka2011-11-161-0/+1
* 32-to-64-bit extended load.Akira Hatanaka2011-11-141-5/+10
* 64-bit arbitrary immediate pattern.Akira Hatanaka2011-11-121-0/+4
* 64-bit atomic instructions.Akira Hatanaka2011-11-111-0/+28
* Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.Akira Hatanaka2011-11-111-0/+9
* 64-bit versions of jal, jalr and bal.Akira Hatanaka2011-11-111-0/+26
* Add definition of 64-bit load upper immediate.Akira Hatanaka2011-11-071-0/+1
* Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emittedAkira Hatanaka2011-11-071-2/+2
* Make the type of shift amount i32 in order to reduce the number of shiftAkira Hatanaka2011-11-071-3/+3
* Add 64-bit to 32-bit trunc pattern.Akira Hatanaka2011-11-071-0/+5
* Redefine count-leading 0s and 1s instructions.Akira Hatanaka2011-10-171-13/+2
* Redefine mfhi/lo and mthi/lo instructions.Akira Hatanaka2011-10-171-22/+4
* Redefine multiply and divide instructions.Akira Hatanaka2011-10-171-13/+6
* Add definition of a base class for logical shift/rotate instructions with twoAkira Hatanaka2011-10-171-12/+4
* Add definition of a base class for logical shift/rotate immediate instructionsAkira Hatanaka2011-10-171-18/+18
* Add definition of immZExt5_64 and redefine immZExt5 as an ImmLeaf.Akira Hatanaka2011-10-171-4/+8
* Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it.Akira Hatanaka2011-10-121-9/+1
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