| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | implement TII::insertNoop | Chris Lattner | 2006-03-05 | 1 | -1/+0 |
| * | Compile this: | Chris Lattner | 2006-03-01 | 1 | -7/+15 |
| * | kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC | Nate Begeman | 2006-02-17 | 1 | -8/+14 |
| * | Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/ | Nate Begeman | 2006-02-12 | 1 | -2/+4 |
| * | PHI and INLINEASM are now built-in instructions provided by Target.td | Chris Lattner | 2006-01-27 | 1 | -3/+0 |
| * | ahem :) | Chris Lattner | 2006-01-12 | 1 | -1/+1 |
| * | Add bswap, rotl, and rotr nodes | Nate Begeman | 2006-01-11 | 1 | -3/+6 |
| * | Remove a comment that no longer applies. | Nate Begeman | 2006-01-10 | 1 | -1/+0 |
| * | add ret void support back | Chris Lattner | 2006-01-09 | 1 | -0/+4 |
| * | New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace | Evan Cheng | 2006-01-09 | 1 | -9/+5 |
| * | Added initial support for DEBUG_LABEL allowing debug specific labels to be | Jim Laskey | 2006-01-05 | 1 | -4/+7 |
| * | Add unique id to debug location for debug label use (work in progress.) | Jim Laskey | 2006-01-04 | 1 | -3/+4 |
| * | Add support for generating v4i32 altivec code | Nate Begeman | 2005-12-30 | 1 | -2/+10 |
| * | Added field noResults to Instruction. | Evan Cheng | 2005-12-26 | 1 | -9/+10 |
| * | * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. | Evan Cheng | 2005-12-23 | 1 | -3/+6 |
| * | Flip the meaning of FPContractions to reflect Requires<[]> change. | Evan Cheng | 2005-12-20 | 1 | -1/+1 |
| * | Pattern-match return. Includes gross hack! | Nate Begeman | 2005-12-20 | 1 | -3/+9 |
| * | Convert load/store over to being pattern matched | Nate Begeman | 2005-12-19 | 1 | -77/+117 |
| * | Added source file/line correspondence for dwarf (PowerPC only at this point.) | Jim Laskey | 2005-12-16 | 1 | -0/+9 |
| * | Add a second vector type to the VRRC register class, and fix some patterns | Nate Begeman | 2005-12-16 | 1 | -3/+3 |
| * | Use the new predicate support that Evan Cheng added to remove some code | Nate Begeman | 2005-12-14 | 1 | -10/+24 |
| * | Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS. | Evan Cheng | 2005-12-14 | 1 | -4/+11 |
| * | Add support for fmul node of type v4f32. | Nate Begeman | 2005-12-14 | 1 | -0/+13 |
| * | Prepare support for AltiVec multiply, divide, and sqrt. | Nate Begeman | 2005-12-13 | 1 | -2/+12 |
| * | Remove type casts that are no longer needed | Chris Lattner | 2005-12-11 | 1 | -4/+4 |
| * | Add support for TargetConstantPool nodes to the dag isel emitter, and use | Nate Begeman | 2005-12-10 | 1 | -1/+4 |
| * | Add support patterns to many load and store instructions which will | Nate Begeman | 2005-12-09 | 1 | -47/+93 |
| * | Use new PPC-specific nodes to represent shifts which require the 6-bit | Chris Lattner | 2005-12-06 | 1 | -3/+22 |
| * | Add some explicit type casts so that tblgen knows the type of the shift | Chris Lattner | 2005-12-05 | 1 | -5/+5 |
| * | Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen | Chris Lattner | 2005-12-04 | 1 | -3/+12 |
| * | Finish moving uncond br over to .td file, remove from .cpp file. | Chris Lattner | 2005-12-04 | 1 | -1/+1 |
| * | Define BR in the .td file now that Evan made tblgen smarter. | Chris Lattner | 2005-12-04 | 1 | -4/+8 |
| * | Represent the encoding of the SPR instructions as they actually are, so | Nate Begeman | 2005-11-29 | 1 | -6/+8 |
| * | Add the remainder of the AltiVec 4 x float instructions. Further | Nate Begeman | 2005-11-29 | 1 | -14/+47 |
| * | Small tweaks noticed while on the plane. | Nate Begeman | 2005-11-26 | 1 | -4/+3 |
| * | Some first bits of AltiVec stuff: Instruction Formats, Encodings, and | Nate Begeman | 2005-11-23 | 1 | -0/+49 |
| * | disentangle call operands from branch operands a bit | Chris Lattner | 2005-11-17 | 1 | -1/+4 |
| * | Generate LA and ADDIS when possible. | Chris Lattner | 2005-11-17 | 1 | -4/+6 |
| * | Add an initial hack at legalizing GlobalAddress into the appropriate nodes | Chris Lattner | 2005-11-17 | 1 | -0/+8 |
| * | LI could theoretically be used for the lo-part of a global address, just like | Chris Lattner | 2005-11-17 | 1 | -1/+1 |
| * | Patch to clean up function call pseudos and support the BLA instruction, | Nate Begeman | 2005-11-16 | 1 | -7/+6 |
| * | add support for branch on ordered/unordered. | Chris Lattner | 2005-10-28 | 1 | -0/+4 |
| * | autogen undef | Chris Lattner | 2005-10-25 | 1 | -3/+6 |
| * | Allow pseudos to have patterns, no functionality change | Chris Lattner | 2005-10-25 | 1 | -11/+11 |
| * | Autogen fsel | Chris Lattner | 2005-10-25 | 1 | -2/+6 |
| * | Autogen a few new ppc-specific nodes | Chris Lattner | 2005-10-25 | 1 | -3/+11 |
| * | Instead of aborting if not a case we can handle specially, break out and | Chris Lattner | 2005-10-21 | 1 | -1/+0 |
| * | Match rotate. This does actually match the rotates in an rc5 cipher, but I | Nate Begeman | 2005-10-21 | 1 | -0/+3 |
| * | Add some more patterns for i64 on ppc | Nate Begeman | 2005-10-20 | 1 | -6/+12 |
| * | Added InstrSchedClass to each of the PowerPC Instructions. | Jim Laskey | 2005-10-19 | 1 | -172/+173 |
