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path: root/lib/Target/SystemZ/SystemZRegisterInfo.td
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* [SystemZ] Fix parsing of inline asm registersRichard Sandiford2013-07-121-1/+3
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-311-3/+4
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-311-1/+1
* [SystemZ] Rename PSW to CCRichard Sandiford2013-05-221-2/+2
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+150
* Remove the SystemZ backend.Dan Gohman2011-10-241-205/+0
* Allocate SystemZ callee-saved registers backwards: R13-R6Jakob Stoklund Olesen2011-06-171-7/+13
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-41/+13
* Remove custom allocation orders in SystemZ.Jakob Stoklund Olesen2011-06-151-259/+8
* Remove the DwarfNumbers from the subregisters. They should use DW_OP_bit_pieceRafael Espindola2011-05-301-48/+48
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-12/+12
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-24/+24
* Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndicesJakob Stoklund Olesen2010-05-281-6/+4
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-31/+18
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-18/+31
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-31/+18
* Remove NumberHack entirely.Jakob Stoklund Olesen2010-05-251-5/+5
* Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen2010-05-241-16/+16
* Replace the tablegen RegisterClass field SubRegClassList with an alist-like dataJakob Stoklund Olesen2010-05-241-5/+6
* Use SubRegIndex in SystemZ.Jakob Stoklund Olesen2010-05-241-5/+7
* Out GR128 regclass is not a 'real' i128 one.Anton Korobeynikov2009-07-161-1/+1
* Add FP regsAnton Korobeynikov2009-07-161-19/+88
* Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide...Anton Korobeynikov2009-07-161-5/+13
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-161-2/+2
* Add proper register aliasesAnton Korobeynikov2009-07-161-18/+22
* Fix thinkoAnton Korobeynikov2009-07-161-8/+6
* Fix epic bug with invalid regclass for R0DAnton Korobeynikov2009-07-161-1/+1
* More register pairs (now 32 bit ones)Anton Korobeynikov2009-07-161-0/+53
* Add even-odd register pairsAnton Korobeynikov2009-07-161-1/+62
* Change register allocation order to reduce amount of callee-saved regs to be ...Anton Korobeynikov2009-07-161-18/+98
* Change register allocation order, so R0 will be allocated the last among scra...Anton Korobeynikov2009-07-161-2/+2
* Add shifts and reg-imm address matchingAnton Korobeynikov2009-07-161-0/+54
* Add bunch of 32-bit patterns... Uffff :)Anton Korobeynikov2009-07-161-0/+1
* Add 32 bit subregsAnton Korobeynikov2009-07-161-21/+82
* Add add reg-reg and reg-imm patternsAnton Korobeynikov2009-07-161-1/+9
* Let's start another backend :)Anton Korobeynikov2009-07-161-0/+93
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