| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update LLVM for rebase to r212749. | Stephen Hines | 2014-07-21 | 1 | -2/+5 |
| * | Update LLVM for 3.5 rebase (r209712). | Stephen Hines | 2014-05-29 | 1 | -2/+25 |
| * | Update to LLVM 3.5a. | Stephen Hines | 2014-04-24 | 1 | -21/+32 |
| * | X86: Add a description for AMD bdver3 aka Steamroller. | Benjamin Kramer | 2013-11-04 | 1 | -0/+8 |
| * | Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar, | Yunzhong Gao | 2013-10-16 | 1 | -6/+6 |
| * | Rename this feature to "cx16" to match gcc's flag name. Apparently these strings | Nick Lewycky | 2013-10-05 | 1 | -1/+1 |
| * | Adding a feature flag to the llvm backend for x86 TBM instruction set. | Yunzhong Gao | 2013-09-24 | 1 | -1/+4 |
| * | Remove unused code, which had been commented out. | Preston Gurd | 2013-09-17 | 1 | -5/+0 |
| * | Make F16C feature flag imply AVX rather than just checking both at the patterns. | Craig Topper | 2013-09-16 | 1 | -1/+2 |
| * | Adds support for Atom Silvermont (SLM) - -march=slm | Preston Gurd | 2013-09-13 | 1 | -9/+15 |
| * | Partial support for Intel SHA Extensions (sha1rnds4) | Ben Langmuir | 2013-09-12 | 1 | -0/+3 |
| * | X86: Add a description of the Intel Atom Silvermont CPU. | Benjamin Kramer | 2013-08-30 | 1 | -0/+9 |
| * | Rename features to match what gcc and clang use. | Rafael Espindola | 2013-08-23 | 1 | -3/+3 |
| * | Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av5... | Craig Topper | 2013-08-21 | 1 | -4/+4 |
| * | Added encoding prefixes for KNL instructions (EVEX). | Elena Demikhovsky | 2013-07-28 | 1 | -3/+6 |
| * | I'm starting to commit KNL backend. I'll push patches one-by-one. This patch ... | Elena Demikhovsky | 2013-07-24 | 1 | -0/+19 |
| * | X86: Add target description for btver2; make autodetection logic aware of AVX. | Benjamin Kramer | 2013-05-03 | 1 | -1/+6 |
| * | This patch adds the X86FixupLEAs pass, which will reduce instruction | Preston Gurd | 2013-04-25 | 1 | -0/+3 |
| * | [asm parser] Add support for predicating MnemonicAlias based on the assembler | Chad Rosier | 2013-04-18 | 1 | -0/+6 |
| * | Add support of RDSEED defined in AVX2 extension | Michael Liao | 2013-03-28 | 1 | -0/+2 |
| * | Add the Haswell machine model. | Nadav Rotem | 2013-03-28 | 1 | -1/+1 |
| * | For the current Atom processor, the fastest way to handle a call | Preston Gurd | 2013-03-27 | 1 | -1/+6 |
| * | Add HLE target feature | Michael Liao | 2013-03-26 | 1 | -1/+4 |
| * | Enable SandyBridgeModel for all modern Intel P6 descendants. | Jakob Stoklund Olesen | 2013-03-26 | 1 | -34/+43 |
| * | Add PREFETCHW codegen support | Michael Liao | 2013-03-26 | 1 | -0/+2 |
| * | added basic support for Intel ADX instructions | Kay Tiong Khoo | 2013-02-14 | 1 | -0/+2 |
| * | Pad Short Functions for Intel Atom | Preston Gurd | 2013-01-08 | 1 | -3/+6 |
| * | Revert revision 171524. Original message: | Nadav Rotem | 2013-01-05 | 1 | -6/+3 |
| * | The current Intel Atom microarchitecture has a feature whereby when a function | Preston Gurd | 2013-01-04 | 1 | -3/+6 |
| * | Make '-mtune=x86_64' assume fast unaligned memory accesses. | Chandler Carruth | 2012-12-15 | 1 | -1/+2 |
| * | Revert "Make '-mtune=x86_64' assume fast unaligned memory accesses." | Chandler Carruth | 2012-12-10 | 1 | -2/+1 |
| * | Make '-mtune=x86_64' assume fast unaligned memory accesses. | Chandler Carruth | 2012-12-10 | 1 | -1/+2 |
| * | Address a FIXME and update the fast unaligned memory feature for newer | Chandler Carruth | 2012-12-10 | 1 | -7/+7 |
| * | Add support of RTM from TSX extension | Michael Liao | 2012-11-08 | 1 | -1/+4 |
| * | Atom has SIMD instruction set extension up to SSSE3 | Michael Liao | 2012-10-25 | 1 | -1/+1 |
| * | Fix 80-column violation | Craig Topper | 2012-10-03 | 1 | -2/+2 |
| * | Add support for AMD Geode. | Roman Divacky | 2012-09-12 | 1 | -0/+1 |
| * | Generic Bypass Slow Div | Preston Gurd | 2012-09-04 | 1 | -1/+5 |
| * | Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well. | Anitha Boyapati | 2012-08-16 | 1 | -2/+2 |
| * | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34... | Anitha Boyapati | 2012-08-16 | 1 | -2/+2 |
| * | I'm introducing a new machine model to simultaneously allow simple | Andrew Trick | 2012-07-07 | 1 | -2/+2 |
| * | Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang. | Craig Topper | 2012-06-03 | 1 | -2/+2 |
| * | X86: Rename the CLMUL target feature to PCLMUL. | Benjamin Kramer | 2012-05-31 | 1 | -8/+8 |
| * | Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B... | Craig Topper | 2012-05-01 | 1 | -9/+8 |
| * | Make XOP imply AVX as its needed to legalize the registers types. | Craig Topper | 2012-05-01 | 1 | -1/+2 |
| * | Make CLMUL and AES imply SSE2 since its needed to legalize the type. | Craig Topper | 2012-05-01 | 1 | -2/+4 |
| * | Enable AVX and FMA4 for AMD Bulldozer processors. | Craig Topper | 2012-05-01 | 1 | -5/+5 |
| * | Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei... | Craig Topper | 2012-04-26 | 1 | -6/+4 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang. | Evan Cheng | 2012-02-07 | 1 | -1/+3 |
