Commit message (Expand) | Author | Age | Files | Lines | |
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* | X86 itinerary properties. | Andrew Trick | 2012-06-05 | 1 | -1/+6 |
* | whitespace | Andrew Trick | 2012-06-05 | 1 | -1/+1 |
* | Added X86 Atom latencies to X86InstrMMX.td. | Preston Gurd | 2012-05-11 | 1 | -0/+39 |
* | Added X86 Atom latencies for instructions in X86InstrInfo.td. | Preston Gurd | 2012-05-10 | 1 | -2/+72 |
* | Adds Intel Atom scheduling latencies to X86InstrSystem.td. | Preston Gurd | 2012-05-04 | 1 | -1/+67 |
* | This patch continues the work of adding instruction latencies for X86 Atom, | Preston Gurd | 2012-05-02 | 1 | -1/+41 |
* | This patch adds X86 instruction itineraries for non-pseudo opcodes in | Preston Gurd | 2012-03-19 | 1 | -2/+13 |
* | Intel Atom instruction itineraries for mov sign extension and mov zero extens... | Andrew Trick | 2012-02-29 | 1 | -0/+11 |
* | This patch adds instruction latencies for the SSE instructions | Preston Gurd | 2012-02-27 | 1 | -2/+149 |
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
* | Instruction scheduling itinerary for Intel Atom. | Andrew Trick | 2012-02-01 | 1 | -0/+136 |