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* Stop leaking register infos in the disassemblers.Benjamin Kramer2013-08-031-2/+2
* Remove the Copied parameter from MemoryObject::readBytes.Benjamin Kramer2013-05-241-2/+2
* [XCore] Remove '-' from back branch asm syntax.Richard Osborne2013-05-051-0/+9
* [XCore] Make use of the target independent global address offset folding.Richard Osborne2013-05-041-10/+0
* [XCore] The RRegs register class is a superset of GRRegs.Richard Osborne2013-04-041-0/+17
* [XCore] Add missing 2r instructions.Richard Osborne2013-02-171-0/+18
* [XCore] Add TSETR instruction.Richard Osborne2013-02-171-0/+21
* [XCore] Add missing l2rus instructions.Richard Osborne2013-01-271-0/+6
* Add instruction encodings / disassembly support for l4r instructions.Richard Osborne2013-01-251-0/+49
* Use the correct format in the STW / SETPSC instruction names.Richard Osborne2013-01-251-1/+1
* Add instruction encodings / disassembly support for l5r instructions.Richard Osborne2013-01-251-0/+39
* Add instruction encodings / disassembly support for l6r instructions.Richard Osborne2013-01-231-0/+25
* Add instruction encoding / disassembly support for ru6 / lru6 instructions.Richard Osborne2013-01-211-0/+10
* Add instruction encodings / disassembly support for l2rus instructions.Richard Osborne2013-01-201-1/+48
* Add instruction encodings / disassembly support for l3r instructions.Richard Osborne2013-01-201-8/+105
* Add instruction encodings / disassembler support for 2rus instructions.Richard Osborne2013-01-201-0/+57
* Add instruction encodings / disassembly support 3r instructions.Richard Osborne2013-01-201-30/+120
* Add instruction encodings / disassembly support for l2r instructions.Richard Osborne2012-12-171-4/+70
* Fix parameter name in prototypes in XCoreDisassembler.Richard Osborne2012-12-171-3/+3
* Add instruction encodings / disassembly support for rus instructions.Richard Osborne2012-12-171-0/+66
* Add instruction encodings / disassembly support for 2r instructions.Richard Osborne2012-12-171-1/+66
* Update comments to match recommended doxygen style.Richard Osborne2012-12-171-7/+6
* Add instruction encodings and disassembly for 1r instructions.Richard Osborne2012-12-162-3/+66
* Add XCore disassembler.Richard Osborne2012-12-164-0/+109