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* Allocate virtual registers in ascending order.Jakob Stoklund Olesen2012-04-023-7/+22
* During two-address lowering, rescheduling an instruction does not untieLang Hames2012-04-021-0/+24
* This commit contains a few changes that had to go in together.Nadav Rotem2012-04-011-1/+1
* ARM target should allow codegenprep to duplicate ret instructions to enable t...Evan Cheng2012-03-301-0/+42
* Change the constant in this testcase so that it results in a constant poolLang Hames2012-03-291-3/+3
* ARM has a peephole optimization which looks for a def / use pair. The defEvan Cheng2012-03-261-0/+33
* Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnuEli Bendersky2012-03-251-8/+1
* Remove -enable-lsr-nested in time for 3.1.Andrew Trick2012-03-221-640/+0
* [fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271%Chad Rosier2012-03-221-0/+9
* Fix test case from r153135.Chad Rosier2012-03-201-1/+1
* Perform mul combine when multiplying wiht negative constants.Anton Korobeynikov2012-03-191-0/+42
* [fast-isel] Address Eli's comments for r152847. Specifically, add a test caseChad Rosier2012-03-151-0/+19
* ARM case-insensitive checking for APSR_nzcv.Jim Grosbach2012-03-153-4/+4
* Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints onLang Hames2012-03-152-27/+3
* DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) toEvan Cheng2012-03-131-0/+16
* Extend r148086 to check for [r +/- reg] address mode. This fixes queens perfo...Evan Cheng2012-03-061-4/+8
* Add <imp-def> operands when reloading into physregs.Jakob Stoklund Olesen2012-03-061-0/+1
* Split fpscr into two registers: FPSCR and FPSCR_NZCV.Lang Hames2012-03-061-0/+36
* updated patch for the ARM fused multiply add/subSebastian Pop2012-03-051-9/+41
* Use <def,undef> operands when spilling NEON bundles.Jakob Stoklund Olesen2012-03-041-0/+53
* Do trivial CSE of dead BBs during codegen preparation.Bill Wendling2012-03-042-3/+3
* Fix RA-dependent test.Jakob Stoklund Olesen2012-03-031-3/+3
* Neuter the optimization I implemented with r107852 and r108258 which turn someEvan Cheng2012-03-011-33/+30
* Revert r151816 as Jim has the appropriate fix.Chad Rosier2012-03-011-2/+2
* Fix testcases from r151807.Chad Rosier2012-03-011-2/+2
* Add missing triple for tests.Jim Grosbach2012-03-011-1/+1
* Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even ...James Molloy2012-03-011-0/+15
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre...Daniel Dunbar2012-02-281-30/+0
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-281-0/+30
* Handle regmasks in MachineCSE.Jakob Stoklund Olesen2012-02-281-0/+31
* test commit. removing unnecessary whitespace.Kristof Beyls2012-02-241-1/+1
* Thumb2 size reduction fix for tied operands of tMUL.Jim Grosbach2012-02-241-3/+3
* When emitting a cmp with 0 for a lowered select, mask out the highDan Gohman2012-02-241-0/+19
* Make tests less sensitive to scheduling changes.Jakob Stoklund Olesen2012-02-232-5/+5
* Fix to make sure that a comdat group gets generated correctly for a static me...Anton Korobeynikov2012-02-231-0/+16
* Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bitsEvan Cheng2012-02-231-2/+2
* Optimize a couple of common patterns involving conditional moves where the falseEvan Cheng2012-02-231-0/+46
* Proper support for a bastardized darwin-eabi hybird ABI.Evan Cheng2012-02-211-0/+3
* [fast-isel] Add support for returning non-legal types with no sign- or zero-Chad Rosier2012-02-171-0/+9
* Replace all instances of dg.exp file with lit.local.cfg, since all tests are ...Eli Bendersky2012-02-162-5/+13
* Tighten physical register invariants: Allocatable physical registers canLang Hames2012-02-141-1/+1
* RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-102-2/+2
* [fast-isel] Add support for SUBs with non-legal types.Chad Rosier2012-02-081-0/+38
* Add comment to test case.Chad Rosier2012-02-081-0/+2
* [fast-isel] Add support for ORs with non-legal types.Chad Rosier2012-02-081-0/+36
* [fast-isel] Add support for indirect branches.Chad Rosier2012-02-071-0/+17
* [fast-isel] Add support for ADDs with non-legal types.Chad Rosier2012-02-061-0/+40
* [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.Chad Rosier2012-02-041-0/+44
* [fast-isel] Add support for FPToUI. Also add test cases for FPToSI.Chad Rosier2012-02-031-0/+52
* [fast-isel] Add support for selecting UIToFP.Chad Rosier2012-02-031-0/+94