| Commit message (Expand) | Author | Age | Files | Lines |
* | The define for 64 bit sign extension neglected to | Jack Carter | 2012-08-07 | 1 | -0/+15 |
* | The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64 | Jack Carter | 2012-08-06 | 1 | -0/+18 |
* | Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST. | Jack Carter | 2012-08-06 | 1 | -0/+27 |
* | Support fpv4 for ARM Cortex-M4. | Jiangning Liu | 2012-08-02 | 1 | -0/+4 |
* | Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ... | Jiangning Liu | 2012-08-02 | 2 | -1/+23 |
* | Fix #13138, a bug around ARM instruction DSB encoding and decoding issue. | Jiangning Liu | 2012-08-02 | 4 | -33/+235 |
* | Fix #13241, a bug around shift immediate operand for ARM instruction ADR. | Jiangning Liu | 2012-08-02 | 4 | -0/+18 |
* | Keep empty assembly macro argument values in the middle of the list. | Jim Grosbach | 2012-07-30 | 1 | -0/+12 |
* | Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cpp | Kevin Enderby | 2012-07-30 | 1 | -0/+44 |
* | Make l/q suffixes on AVX forms of scalar convert instructions consistent with... | Craig Topper | 2012-07-26 | 4 | -36/+36 |
* | Make x86 asm parser to check for xmm vs ymm for index register in gather inst... | Craig Topper | 2012-07-18 | 3 | -0/+39 |
* | Doubleword Shift Left Logical Plus 32 | Jack Carter | 2012-07-16 | 1 | -0/+45 |
* | The Mips specific relocation R_MIPS_GOT_DISP | Jack Carter | 2012-07-13 | 1 | -0/+18 |
* | test case for revision 160084: Alignment filling between Mips function units | Jack Carter | 2012-07-13 | 1 | -0/+23 |
* | Fix check strings in test/MC/Disassembler/Mips/* and run FileCheck. | Akira Hatanaka | 2012-07-12 | 8 | -760/+694 |
* | Fix instruction description of VMOV (between two ARM core registers and two s... | Richard Barton | 2012-07-10 | 2 | -1/+41 |
* | Reverse assembler/disassembler operand order for gather instructions. | Craig Topper | 2012-07-10 | 2 | -16/+16 |
* | Revert r159938 (and r159945) to appease the buildbots. | Chad Rosier | 2012-07-09 | 1 | -21/+0 |
* | Reapply r158846. | Akira Hatanaka | 2012-07-09 | 4 | -160/+172 |
* | Fix instruction description of VMOV (between two ARM core registers and two s... | Richard Barton | 2012-07-09 | 1 | -0/+21 |
* | Prevent ARM assembler from losing a right shift by #32 applied to a register | Richard Barton | 2012-07-09 | 1 | -0/+33 |
* | Teach the assembler to use the narrow thumb encodings of various three-regist... | Richard Barton | 2012-07-09 | 1 | -0/+807 |
* | revert r159851. | Akira Hatanaka | 2012-07-06 | 4 | -172/+160 |
* | Reapply r158846. | Akira Hatanaka | 2012-07-06 | 4 | -160/+172 |
* | Add aliases for pblendvb, blendvpd, and blendvps instructions with the implic... | Craig Topper | 2012-07-03 | 1 | -0/+26 |
* | Pass the correct ELFOSABI enumeration to the MipsELFObjectWriter constructor | Jack Carter | 2012-07-02 | 1 | -0/+3 |
* | Fix the remaining TCL-style quotes found in the testsuite. This is | Chandler Carruth | 2012-07-02 | 7 | -7/+7 |
* | Convert the uses of '|&' to use '2>&1 |' instead, which works on old | Chandler Carruth | 2012-07-02 | 70 | -72/+72 |
* | Convert all tests using TCL-style quoting to use shell-style quoting. | Chandler Carruth | 2012-07-02 | 39 | -39/+39 |
* | X86: add more GATHER intrinsics in LLVM | Manman Ren | 2012-06-29 | 2 | -3/+45 |
* | This allows hello world to be compiled for Mips 64 direct object. | Jack Carter | 2012-06-27 | 1 | -0/+39 |
* | Teach assembler to handle capitalised operation values for DSB instructions | Richard Barton | 2012-06-27 | 1 | -0/+6 |
* | X86: add GATHER intrinsics (AVX2) in LLVM | Manman Ren | 2012-06-26 | 2 | -0/+14 |
* | Remove some duplicate instructions that exist only to given different mnemoni... | Craig Topper | 2012-06-26 | 2 | -12/+12 |
* | PR13013: ELF Type identification fails for MSB type ELF files. | Meador Inge | 2012-06-25 | 1 | -0/+11 |
* | ARM: Add a better diagnostic for some out of range immediates. | Jim Grosbach | 2012-06-22 | 2 | -8/+8 |
* | Revert r158846. | Akira Hatanaka | 2012-06-20 | 4 | -172/+160 |
* | In MipsDisassembler.cpp, instead of defining register class tables, use the ones | Akira Hatanaka | 2012-06-20 | 4 | -160/+172 |
* | Have ARM ELF use correct reloc for "b" instr. | Jan Wen Voung | 2012-06-19 | 1 | -1/+11 |
* | ARM: Define generic HINT instruction. | Jim Grosbach | 2012-06-18 | 2 | -8/+34 |
* | Implement irpc. Extracted from a patch by the PaX team. I just added the test. | Rafael Espindola | 2012-06-16 | 1 | -0/+9 |
* | Fix the encoding of the armv7m (MClass) for MSR registers other than aspr, | Kevin Enderby | 2012-06-15 | 1 | -10/+10 |
* | Factor macro argument parsing into helper methods and add support for .irp. | Rafael Espindola | 2012-06-15 | 2 | -0/+18 |
* | Replace assertion failure for badly formatted CPS instrution with error message. | Richard Barton | 2012-06-14 | 1 | -0/+6 |
* | Correct decoder for T1 conditional B encoding | Richard Barton | 2012-06-06 | 1 | -1/+10 |
* | Add lit.local.cfg to run the tests in test/MC/Disassembler/Mips. | Akira Hatanaka | 2012-05-31 | 1 | -0/+6 |
* | Add intrinsics, code gen, assembler and disassembler support for the SSE4a ex... | Benjamin Kramer | 2012-05-29 | 3 | -0/+61 |
* | Refactor data-in-code annotations. | Jim Grosbach | 2012-05-18 | 2 | -1/+34 |
* | Fixed a bug in llvm-objdump when disassembling using -macho option for a binary | Kevin Enderby | 2012-05-18 | 1 | -0/+5 |
* | Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing | Kevin Enderby | 2012-05-17 | 1 | -4/+28 |