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path: root/lib/Target/Mips/MipsInstrFPU.td
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* [mips] Split SelectAddr, which was used to match address patterns, into twoAkira Hatanaka2013-02-151-4/+38
| | | | | | | | | | | | functions. Set AddedComplexity to determine the order in which patterns are matched. This simplifies selection of floating point loads/stores. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175300 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Set flag neverHasSideEffects flag on some of the floating point ↵Akira Hatanaka2013-01-251-12/+8
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173401 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch tackles the problem of parsing Mips Jack Carter2013-01-121-3/+13
| | | | | | | | | | | | | | | | | | | | register names in the standalone assembler llvm-mc. Registers such as $A1 can represent either a 32 or 64 bit register based on the instruction using it. In addition, based on the abi, $T0 can represent different 32 bit registers. The problem is resolved by the Mips specific AsmParser td definitions changing to work together. Many cases of RegisterClass parameters are now RegisterOperand. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172284 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass Akira Hatanaka2012-12-201-4/+3
| | | | | | | parameter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Delete all floating point instruction classes that are no longer used.Akira Hatanaka2012-12-131-118/+0
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170084 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of floating point comparison instructions.Akira Hatanaka2012-12-131-9/+14
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170077 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of floating point branch instructions.Akira Hatanaka2012-12-131-2/+13
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170076 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of floating point indexed load and store instructions.Akira Hatanaka2012-12-131-14/+29
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170075 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of floating point multiply-add/sub instructions.Akira Hatanaka2012-12-131-12/+29
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170073 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of floating point load and store instructions.Akira Hatanaka2012-12-131-10/+23
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170072 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of move from/to coprocessor instructions.Akira Hatanaka2012-12-131-21/+17
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170071 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of two register operand floating point instructions.Akira Hatanaka2012-12-131-41/+73
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170069 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Modify definitions of three register operand floating point instructionsAkira Hatanaka2012-12-131-8/+26
| | | | | | | | and separate encoding information from the rest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170066 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Move classes that do not belong in MipsInstrFormats.td intoAkira Hatanaka2012-12-131-0/+23
| | | | | | | | MipsInstrFPU.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170061 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Set isCommutable flag in a more explicit way.Akira Hatanaka2012-12-131-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170060 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Remove fmt from the parameter list of classes FMADDSUB and FNMADDSUB.Akira Hatanaka2012-12-131-16/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170057 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Remove single-precision floating point instruction from multiclassAkira Hatanaka2012-12-131-7/+10
| | | | | | | | FFR2P_M. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170055 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Remove single-precision floating point instructions from multiclassesAkira Hatanaka2012-12-131-41/+48
| | | | | | | | | FFR1_W_M and FFR1P_M. The new instruction definitions have one-to-one correspondence with the instructions in the ISA manual. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170053 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Shorten predicate name.Akira Hatanaka2012-12-071-32/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169579 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add predicate HasFPIdx for floating-point indexed load instructionAkira Hatanaka2012-11-151-1/+1
| | | | | | | | support and use it in place of HasMips32r2Or64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168089 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka2012-11-031-6/+7
| | | | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td andAkira Hatanaka2012-09-151-12/+12
| | | | | | | | | | | | use load/store fragments defined in TargetSelectionDAG.td in place of them. Unaligned loads/stores are either expanded or lowered to target-specific nodes, so instruction selection should see only aligned load/store nodes. No changes in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163960 91177308-0d34-0410-b5e6-96231b3b80d8
* Add stub methods for mips assembly matcher. Akira Hatanaka2012-08-171-2/+2
| | | | | | | Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
* Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whetherAkira Hatanaka2012-07-311-9/+7
| | | | | | | | | or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and PseudoSE (mips32/64 pseudo) classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined asAkira Hatanaka2012-07-311-21/+15
| | | | | | | | | | | single-precision load and store. Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect to map unaligned floating point load/store nodes to these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. introduce MipsPat in place of Pat in order to exclude those fromAkira Hatanaka2012-06-141-30/+40
| | | | | | | | | | | being used by Mips16 or Micro Mips 2. clean up a few lines too long encountered Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158470 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch adds a predicate to existing mips32 and mips64 so that thoseAkira Hatanaka2012-05-221-32/+36
| | | | | | | | | | | | | | | | | | | | instruction encodings can be excluded during mips16 processing. This revision fixes the issue raised by Jim Grosbach. bool hasStandardEncoding() const { return !inMips16Mode(); } When micromips is added it will be bool StandardEncoding() const { return !inMips16Mode()&& !inMicroMipsMode(); } No additional testing is needed other than to assure that there is no regression from this patch. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
* Add disassembler to MIPS. Akira Hatanaka2012-04-171-25/+43
| | | | | | | | Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka2012-04-111-3/+4
| | | | | | | | otherwise expand FNEG during legalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154546 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-111-0/+1
| | | | | | | | Invalid operation is signaled if the operand of these instructions is NaN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r153924. There were buildbot failures.Akira Hatanaka2012-04-031-43/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153925 91177308-0d34-0410-b5e6-96231b3b80d8
* MIPS disassembler support.Akira Hatanaka2012-04-031-25/+43
| | | | | | | Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153924 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bugs which were introduced when support for base+index floating point loadsAkira Hatanaka2012-03-011-2/+15
| | | | | | | | | | | | | and stores was added. - SelectAddr should return false if Parent is an unaligned f32 load or store. - Only aligned load and store nodes should be matched to select reg+imm floating point instructions. - MIPS does not have support for f64 unaligned load or store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151843 91177308-0d34-0410-b5e6-96231b3b80d8
* remove blanks, and some code formatJia Liu2012-02-281-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for floating point base register + offset register addressing modeAkira Hatanaka2012-02-281-0/+46
| | | | | | | | load and store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151611 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary template parameters.Akira Hatanaka2012-02-271-15/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151540 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix instruction predicates that were not set correctly.Akira Hatanaka2012-02-271-8/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151538 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of floating point multiply add/sub and negative multiplyAkira Hatanaka2012-02-251-8/+52
| | | | | | | | add/sub instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151415 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove trailing whitespace. Add newline.Akira Hatanaka2012-02-161-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150706 91177308-0d34-0410-b5e6-96231b3b80d8
* Pattern for f32 to i64 conversion.Akira Hatanaka2012-01-241-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148869 91177308-0d34-0410-b5e6-96231b3b80d8
* Various Mips64 floating point instruction patterns.Akira Hatanaka2011-11-071-3/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144019 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definition of the base class for floating point comparison instructionsAkira Hatanaka2011-11-071-8/+8
| | | | | | | | and add Mips64's version too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144018 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of 64-bit instructions which move data between integer andAkira Hatanaka2011-11-071-0/+8
| | | | | | | | floating pointer registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144016 91177308-0d34-0410-b5e6-96231b3b80d8
* Final patch that completes old JIT support for Mips:Bruno Cardoso Lopes2011-10-181-20/+32
| | | | | | | | | | | | | | | | -Fix binary codes and rename operands in .td files so that automatically generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct encoding for instructions. -Define new class FMem for instructions that access memory. -Define new class FFRGPR for instructions that move data between GPR and FPU general and control registers. -Define custom encoder methods for memory operands, and also for size operands of ext and ins instructions. -Only static relocation model is currently implemented. Patch by Sasa Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
* Move class and instruction definitions for conditional moves to a seperate file.Akira Hatanaka2011-10-171-53/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
* Make changes necessary for supporting floating point load and store instructionsAkira Hatanaka2011-10-111-11/+29
| | | | | | | | | that have 64-bit pointers or access the 32 x 64-bit floating pointer register file. Update functions in MipsInstrInfo.cpp too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141623 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify definition of FP move instructions.Akira Hatanaka2011-10-081-4/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476 91177308-0d34-0410-b5e6-96231b3b80d8
* Define classes and multiclasses for FP binary instructions.Akira Hatanaka2011-10-081-15/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475 91177308-0d34-0410-b5e6-96231b3b80d8
* Define multiclasses for FP-to-FP instructions.Akira Hatanaka2011-10-081-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141474 91177308-0d34-0410-b5e6-96231b3b80d8
* Define classes for FP unary instructions and multiclasses for FP-to-fixed pointAkira Hatanaka2011-10-081-64/+47
| | | | | | | conversion instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2024-09-11 21:20:40 +0000